DE10160931C2 - Method for operating an ultrasonic counter, comparator circuit and ultrasonic counter - Google Patents

Description

The present invention relates on the one hand to a method for operating an ul traschallzähler using at least one comparator after the Preamble of claim 1, on the other hand, a comparator circuit for the on sentence in an ultrasonic counter according to the preamble of claim 9 and egg ultrasonic counter.

DE 195 30 054 C2 describes a method for ultrasound measurement of through flows of flowing fluids using a comparator known. The comparator is used here, from a sinusoidal voltage a square wave signal, d. H. to generate a digital output signal. Commercially available comparators are used in the field of ultrasonic counter technology used. However, these have device-specific offset voltages, i. H. error from 1-20 mV. The position of the si shifts due to an offset voltage Nuclear vibration to the zero point (i.e. to the reference line). This equipment gene offset voltage is also from various influences such. B. Tempe temperature, operating voltage, etc. Come the amplitudes of reception signals from the ultrasonic transducer of an ultrasonic counter in the order of magnitude an offset voltage, an accurate measurement is no longer possible.

US Pat. No. 4,749,953 describes a comparator circuit with a minimized offset Known tension and drift. This circuit comprises a capacitor, which with a first input of the comparator and a switch for opening th of the first input of the comparator on a first input signal path or second input signal path of opposite polarity is connected. The error voltage is used to adjust or to reduce the offset voltage  of the comparator is first loaded onto the capacitor and - after actuation switch - the error voltage of the comparator with opposite Polarity added. This results in a comparison of the error voltage between the two inputs of the comparator. The amount of span to be added However, voltage does not result from the change in the output signal of the compa rators derived.

US 5 847 670 A shows a circuit for compensating an offset voltage a comparator, which corresponds in principle to the circuit described above. Again, the amount of voltage to be added does not change tion of the output signal of the comparator derived.

The object of the present invention is a novel method for the operation of an ultrasonic counter which be in the preamble of claim 1 to provide the written type, in spite of having a device Offset voltage an accurate measurement even with amplitudes in the order of magnitude receiving signals remains possible. It is also the job of the front lying invention, a suitable comparator circuit for this and one with the comparator circuit equipped ultrasound counter len.

The present object is achieved in the method according to the invention in that, in order to adjust or reduce an offset voltage U _{offset of} the comparator, a voltage is added to the second input which compensates or at least reduces the offset voltage U _offset . The idea is to equalize or at least reduce the offset voltage by adding up a voltage at the second input of the comparator, so that the order of magnitude difference between the amplitudes of the input signals of the received signals and the offset voltage increases again or the offset voltage is completely eliminated becomes.

The level of the voltage to be added is derived according to the invention from the change in the output signal U _{a of} the comparator. The effect of the added voltage which reduces the offset voltage is detected, so to speak, on the output signal U _a, ie its change.

Advantageously, in continuation of this idea, the level of the voltage to be added is derived from the pulse duty factor TH: TL at the output of the comparator in such a way that the pulse duty factor TH: TL at the output of the comparator is reduced or assumes the value 1, whereby TH is the time specifies in which the voltage U _{e of} the input signal represents the condition U _e <U _ref and TL the time in which the voltage U _{e of} the input signal fulfills the condition U _e <U _ref .

The voltage at the second input of the comparator is increased expediently via the discharge of a capacitor. In particular, lets specify the level of the voltage to be added over the charging time t, rend a resistor is applied to the capacitor.

The voltage to be added is expediently determined in each case because at the beginning of the operation of the ultrasonic meter in the manner of a calibration (Calibration phase). During the actual measurement (measurement phase) the The capacitor voltage is then kept constant.

According to a further embodiment, an offset voltage U _{e (offset) is} applied specifically to the first input of the comparator. This offset voltage U _{e (offset)} should be higher than the, in particular maximum, device-specific offset voltage U _{offset of} the comparator. This ensures that the range of the voltage to be applied to the second input of the comparator is within the operating voltage limits.

Because the offset voltage is operational, i. H. depending on the temperature, Operating voltage etc. changes, it is further provided according to the invention that the Discharge the capacitor in a first step each time you start up, in one second step (calibration phase) charged over the charging time t and in one third step the voltage is added (measuring phase).

The above object is achieved in the comparator circuit according to the invention ge for an ultrasonic counter according to the preamble of claim 9 triggers that means for adding up a voltage at the second input of the com parators are provided.

Furthermore, means are advantageously provided for detecting the pulse duty factor TH: TL at the output of the comparator, TH determining the time in which the voltage U _{e of} the input signal represents the condition U _e <U _ref and TL the time in which the voltage U _{e of} the input signal fulfills the condition U _e <U _ref .

The means for detecting the duty cycle TH: TL expediently have se a time measuring unit, a counter, a generator and a control and ver work facility on.

The means for adding up a voltage expediently comprise one Capacitor and a resistor over a charging time t to the capacitor can be created.

According to a further embodiment, the capacitor and the resistor via a switching device with the operating voltage, with ground and with one Open switch position connectable.  

The present invention further includes an ultrasonic counter in which a comparator circuit according to one of claims 9-13 is provided.

An embodiment of the present invention is based on the drawing ren explained in more detail below. Show it

Fig. 1 is a greatly simplified schematic representation of a possible construction of an ultrasonic On counter for performing the method according to the invention,

Fig. 2 shows a possibility of realizing the means for adding a voltage on the comparator and

Fig. 3 shows the sinusoidal input signal at the first input of the comparator to explain the duty cycle TH: TL.

Reference numeral 1 in Fig. 1 denotes - only schematically - an ultrasonic counter in which the present invention is used. The mechanical components of the ultrasonic counter are not shown in FIG. 1 for the sake of clarity.

An ultrasound counter 1 comprises at least a first ultrasound transducer 14 , in particular a piezoceramic, by means of which vibrations are generated which run along the measuring section L and are received by a second ultrasound transducer 3 . The flow rate can be calculated by influencing the running time.

The signal emitted by the ultrasonic transducer 3 is a sinusoidal signal (sinusoidal voltage input signal U _e ), which is transformed into a square wave signal, ie digital output signal U _a , by means of a comparator 2 .

This digital output signal is then fed to means 9 for signal processing and further processing. The means 9 for signal processing and further processing comprise a gate circuit 13 , a control and processing unit 11 , a counter 15 , a time measuring device 10 and a generator 12 . These are the usual components used in conventional ultrasonic meters for signal processing and further processing.

The comparator comprises a first input 4 , at which the sinusoidal voltage input signal U _e from the ultrasound transducer 3 is present, and a second input at which the reference voltage U _ref (switching threshold) is present.

According to the invention, means 8 for adding up a voltage are present at the second input 5 of the comparator 2 . These means 8 for adding up a voltage serve to add up to the second input 5 of the comparator 3 a voltage which compensates or at least reduces the offset voltage U _offset .

In Fig. 2 is a concrete embodiment of these means is shown for adding a voltage. They include a capacitor 6 and a resistor 7 , which are present at the second input 5 of the comparator 2 . The capacitor 6 is in turn at the potential V _dd (operating voltage). The resistor 7 is optionally also via a switching device 16 at the potential V _dd (operating voltage), at ground (ground) or at an open position.

In the circuit shown in Fig. 2 it is also provided that the voltage input signal U _e fluctuates by a voltage which is slightly below the potential V _dd (operating voltage), ie there is a deliberately applied offset U _(offset) . In the embodiment of the invention, the offset compensation takes place in three phases according to the circuit according to FIG. 2:

preparatory phase

The position of the switching device 16 is at the potential V _dd (operating voltage), so that both poles are at V _dd and the capacitor 6 is discharged.

calibration phase

The switching device 16 is in the second switch position (ground), the capacitor being charged over a charging time t.

measuring phase

Then the switching device 16 is set to the third switching position (open, ie no potential). During this time, the capacitor voltage that is present at the second input 5 of the comparator 2 remains constant. During this measurement phase, an increased voltage, ie increased reference voltage U _ref , is therefore present at the second input 5 of the comparator 2 .

Since the device's own offset depends on the application due to temperature influences sen, weather influences, etc., is expediently every measurement an offset adjustment of the type described above.

The degree of charge of the capacitor 6 , that is, the level of the voltage to be added takes place via the specification of the charging time t, during which the resistor 7 on the capacitor 6 in the second switch position (ground) is applied to the switching device 16 . The duration of the charging time t, ie the calibration phase, is expediently determined from the pulse duty factor TH: TL of the voltage input signal U _e .

If the pulse duty factor TH: TL <1, the DC voltage component at the first input 4 of the comparator 2 is higher than at the second input 5 . This means that the capacitor voltage is too high and the capacitor 6 has been charged too long. The calibration phase, ie the charging time t must therefore be shortened. If the pulse duty factor TH: TL <1, the DC voltage component at the first input 4 of the comparator 2 is lower than at the second input 5 . The capacitor voltage was therefore too low, the charging time t was too short, the charging time t, ie the calibration phase must be extended.

Due to the setting of the charging time t as a function of the duty cycle, the difference in the actual position of the voltage input signal U _e compared to the reference voltage U _ref (switching threshold) is reduced or even equal (duty cycle TH: TL = 1). In the latter case, a complete offset adjustment has taken place.

The advantage of the method described above, the comparator in this regard circuit or an ultrasonic counter, such a comparator circuit used, is that about the duty cycle TH: TL, which with existing where system resources are easy to identify, a signal for implementation offset adjustment can be used. This can reduce the measuring accuracy of ultrasonic meters using conventional comparators with a device Genem offset can be significantly improved.

Claims (13)

1. A method of operating an ultrasonic counter ( 1 ) using at least one comparator ( 2 ) for flanking a sinusoidal voltage input signal U _{e of} an ultrasonic transducer ( 3 ), the comparator ( 2 ) having a first input ( 4 ) for the voltage input signal U _e from Ultrasonic transducer ( 3 ) and a second input ( 5 ) for the reference voltage U _ref , characterized in that a voltage is added to the second input ( 5 ) to adjust or reduce an offset voltage U _{offset of} the comparator ( 2 ) is, which compensates for the offset voltage U _offset or at least reduced, and the level of the voltage to be added is derived from the change in the output signal U _{a of} the comparator ( 2 ). 2. The method according to claim 1, characterized in that the amount of the voltage to be added from the pulse duty factor TH: TL at the output of the comparator ( 2 ) is set so that the duty ratio TH: TL at the output of the comparator ( 2 ) is reduced or assumes the value 1, where TH specifies the time in which the voltage U _{e of} the input signal fulfills the condition U _e <U _ref and TL represents the time in which the voltage U _{e of} the input signal fulfills the condition U _e <U _ref , 3. The method according to claim 2, characterized in that the increase in voltage by discharging a capacitor ( 16 ) it follows. 4. The method according to claim 3, characterized in that the level of the voltage to be added to the capacitor ( 6 ) is predetermined over the charging time t, during which the resistor ( 7 ) is applied to the capacitor ( 6 ). 5. The method according to claim 4, characterized in that the determination of the voltage to be added at the beginning of the operation of the ultrasonic counter ( 1 ) takes place in the manner of a calibration (calibration phase) and during the measurement (measuring phase) the capacitor voltage is constant. 6. The method according to any one of the preceding claims 4 or 5, characterized in that the capacitor ( 6 ) discharged in each startup in a first step, in a second step (calibration phase) over the charging time t charged and in a third step the Voltage is added (measuring phase). 7. The method according to any one of the preceding claims, characterized in that an offset voltage U _{e (offset) is} applied specifically to the first input ( 4 ) for the voltage input signal U _e and this offset voltage U _{e (offset) is} higher than the device's own offset voltage U _{offset of} the comparator ( 2 ). 8. Comparator circuit for an ultrasonic counter ( 1 ) with at least one comparator ( 2 ) for flanking a sinusoidal voltage input signal U _{e of} an ultrasonic transducer ( 3 ), the comparator ( 2 ) having a first input ( 4 ) for the voltage input signal U _e and a second Input ( 5 ) for the reference voltage U _ref , characterized in that means for adding up a voltage at the second input ( 5 ) are provided, by means of which the offset voltage U _{offset can be} compensated for or at least reduced and the level of the voltage to be added can be derived from the change in the output signal U _{a of} the comparator ( 2 ). 9. Comparator circuit according to claim 8, characterized in that means for detecting the pulse duty factor TH: TL are provided at the output of the comparator ( 2 ), TH determining the time in which the voltage U _{e of} the input signal fulfills the condition U _e < U _ref and TL represents the time in which the voltage Ue of the input signal fulfills the condition U _e <U _ref . 10. Comparator circuit according to claim 9, characterized in that the means for detecting the duty cycle TH: TL have a Zeitmeßeinrich device ( 10 ), a counter ( 15 ), a generator ( 12 ) and a control and processing device ( 11 ). 11. Comparator circuit according to claim 8-10, characterized in that the means for adding up a voltage comprise a capacitor ( 6 ) and a resistor ( 7 ) which can be applied to the capacitor ( 6 ) via a charging time t. 12. Comparator circuit according to claim 11, characterized in that the capacitor ( 6 ) and the resistor ( 7 ) via a switching device ( 16 ) with the operating voltage V _dd with ground and with an open switching position can be connected. 13. Ultrasonic counter using an ultrasonic transducer ( 3 ), means for signal processing ( 9 ), the means for signal processing ( 9 ) having at least one comparator ( 2 ) for flanking a sinusarti gene input signal, characterized in that a comparator circuit according to one of the claims 8-12 is provided.