DE10144116A1 - Method for managing speech buffers in circuit emulation services with dynamic bandwidth - Google Patents

Abstract

A method for managing buffers in a SAR (segmentation and rearrangement) device operating in DBCES (Dynamic Bandwidth Circuit Emulsification Service) mode determines at least one buffer limit for active channels. This depends on the number of active channels in the virtual circuit. Next, the buffer size for each active channel is set equal to the CDV (cell enlargement variation) plus the buffer limit for active channels. This prevents timeouts and timeouts from occurring when the number of active channels changes suddenly.

Description

This invention relates to telecommunications and, more specifically, circuit emulation services with dynamic bandwidth (DBCES; Dynamic Bandwidth Circular Emulation Service) in a cell-switched network, such as ATM.

ATM (Asynchronous Transfer Mode) is a service that tightens data in small packets Size or cells over a packet switched network. The cells become statistical  multiplexed and form on fixed physical connections between network nodes virtual circuits over the network between endpoints. ATM comprises a number of specifications, of which AAL1 (ATM adaptation layer 1) is a standard for trans port time-sensitive data, such as voice or video, via the virtual circuit between the endpoints. This is known as circuit emulation (CES) because of it provides a number of voice channels available to the user, for example time division multiplexed channels appear similar.

DBCES is a mode of using dynamic bandwidth in an ATM network based on the detection of which time slots of a given TDM connection are active and which are inactive. If an inactive state is detected in a specific time slot, the time slot is dropped by the next ATM structure and the bandwidth it uses used can be reused for other services. DBCES is in details in the ATM forum specification af-vtoa-0085.000 (July 1997).

Devices known as SAR (segmenting and rearranging) devices convert incoming data into cells and vice versa. The SARs include buffers for Save the cells to be processed.

When working in DBCES (Dynamic Bandwidth Circuit Emulation Service) mode, än the speed with which the cells arrive at the receiver changes when the number of the voice channels carried by the AAL1 cell stream changes. This Change in the arrival rate may fall below or exceed the speech puff cause at the receiver that receives the incoming cells, if not special ones Precautions are taken.

To address this problem, additional buffer allocations have been proposed add to avoid overruns or overflow, and an additional ver introduce a delay in the buffer to avoid shortfalls. As an alternative  Another solution is to star the buffer with a certain number of voice channels active to form an adequate buffer fill, however, the buffer can do not automatically recover from slip errors.

Finally, there is another solution that makes shortfalls and shortfalls easy to occur, but this would cause the recipient to receive incorrect data what translates into clicking noises in the received audio.

In a broad aspect, the invention provides a method for managing buffers in a SAR (segmenting and rearranging) device available in the DBCES Mode works by determining a limit for the active channel buffer for a virtu All switching depends on the number of active channels and the setting of the buffer size for each active channel equal to the CDV (cell delay variation) plus the buffer limit worth for active channels.

The amount of buffer is typically determined by the distance between the write pointer and the read pointer for the ring buffer. According to the invention, for any current value of active voice channels, N, a defined minimum number of active voice channels, MIN, and a desired cell delay variation tolerance, CVD, a desired The write pointer distance (slip pointer) is calculated from the read pointer. When starting or in the event of an error (i.e. falling below or exceeding), this desired Ab used to create a new value for the write pointer.

Allowing different definitions for MIN allows the user of the system to Compensate delay in the buffer for the bandwidth in the cell stream. The new computing the desired distance when N changes leaves the buffer any type Manage number of voice channels down to MIN. Patching mistakes automatically (without user CPU intervention) by using the correct  th buffer distance performed. The cell current can start with any initial value N act voice channels are started.

The introduction of the cell delay variation (CDV) in the calculation means that any a cell delay variation in the received cell stream no slip errors (i.e. Un violations or exceedances).

Typically, the distance is defined so that write pointer = read pointer + CDV + (47 / MIN) - (47 / N), using 47 because each cell in ATM AAL1 is approximately 47 Contains bytes of voice data.

The invention will now be described in more detail, by way of example only, with Be drawing on the accompanying drawings, wherein:

Figures 1a and 1b are block diagrams showing the ring buffers in SARs for both the SDT and DBCES modes of operation of a SAR; and

Figure 2 is a block diagram showing the rearrangement control structure for a SAR in a preferred implementation.

Structured data transfer mode (SDT) is a data transfer mode in AAL1, at which data is first structured into blocks, which are then divided into cells for transmission be segmented.

In a typical application, TDM data is interposed over a virtual ATM circuit rule a transmitting or segmentation device (TX_SAR) and a receiving or Rearrangement device (RX-SAR) which, as noted above, transmits data between Convert ATM cells and vice versa. The virtual circuit carries a number of channels that emulate a TDM service.  

The RX_SAR of the SDT is responsible for writing data from the received cell len in the rearrangement ring buffer while the TDM module reads the data from the buffers and outputs them as TDM channels. However, some buffer control is required because the RX_SAR of the SDT and the TDM work at different clock rates (the data are stored in the buffers are brought based on the cell arrival rate (which varies) while the data is out the buffers are read out at a constant rate by the output clock rate of the TDM (e.g. 2048 MHz).

In the SDT and DBCES operating modes, one of the main tasks is the RX_SAR of the SDT ensure that there are no shortfalls or overshoots between the RX_SAR of the SDT and a TDM module occur which the data in time division multiplexed channels transforms. Undershoot occurs when there is insufficient data in the buffer to supply the TDM module with the TDM rate. Exceeding occurs when the Buffer overflows because the cells arrive faster than the data from the TDM module be read out.

The RX_SAR of the SDT is responsible for maintaining a relationship between the Write pointer of the RX_SAR of the SDT and the read pointer of the TDM module. This tax tion is provided by a routine that every time the SDT's RX_SAR comes on write to the ring buffer, the distance between the write pointer and the read Pointer determined. Usually every letter occurs where the previous letter has ended and the write pointer simply advances when the bytes are written. However, when starting or when the algorithm of the RX_SAR of the SDT has decided, that a slip error (i.e. timeout or timeout) has occurred, or when switching from zero active channels to at least one active channel the RX_SAR of the SDT has an internally calculated write pointer value as the correct one Write pointer value.  

In these cases, regardless of the original write pointer value, the write Pointer is set to the slip pointer value, and data is reordered into Ring buffer written to the point to which the slip pointer points. The purpose of that Slip pointer is used, is a known relationship between the read and the Set up write pointers to allow multiple consecutive hatches moves (e.g. moving the write pointer further away from the read pointer to prevent shortfalls from occurring again and again).

The invention can be implemented in any suitable SAR device. A suitable SAR device is, for example, the MT90528 device from Mitel. Fig. 1 illustrates a circular buffer 10 for a RX_SAR SDT in the mode of operation. Data are stored in the buffer at the individual addresses 12 . The write pointer 16 determines where the incoming cells are written to. The read pointer 14 determines where the outgoing TDM data is read from.

Figure 1b shows a similar arrangement for the DBCES mode of operation.

Slip pointer values in SDT and DBCES operating mode

A predetermined distance is set between the read pointer and the write pointer hold. An explanation of the calculations is given below. Use the bills Rounding mathematics.

When the virtual circuit is configured for the base SDT ( Fig. 1a), the slip pointer is assigned to the RX_SAR of the SDT so that it is equal to the TDM read pointer + CDV (CDV is called "avg_lead" and is equal to the user-programmable "Ma ximum_Lead / 2"). CDV represents the cell delay variation with which cells on the virtual channel will arrive at the received SAR.

On average, cells should arrive at the RX_SAR of the SDT at a uniform rate ( Fig. 1a), so that the cell data is always written into the ring buffer at the time TDM read pointer + CDV. However, due to the cell delay variation, cells may arrive slower or faster than the average. So enough buffers must be provided in the ring buffers that if a cell arrives late there is enough (previously received) data in the buffer to ensure that the TDM module continues to read from the ring buffer at a steady rate can occur without falling short of time.

If the virtual channel is configured for DBCES and the bit DBCES_Control <2 <is not is set, the DBCES version of the slip pointer of the RX_SAR of the SDT is the same as the SDT version of the slip pointer (i.e. it is equal to TDM read pointer + CDV).

The problem with this situation is that if the number of N active channels on one virtual circuit arrive, changes, the arrival rate of the cells also changes. In in the case of two channels, for example, each cell takes two bytes from each TDM frame, so it takes about 24 frames to fill the useful area of a cell. A virtual one Four channel circuit takes 4 bytes from each TDM frame, making it only 12 frames needs to fill a cell. In the case of a single channel, only one byte of taken each frame, so you need a total of 47 TDM frames before a cell filled and ready to be transferred.

Assume that a cell arrives and is written into the ring buffer in place pointed to by the slip pointer (i.e., an average distance from the read Pointer), should not be undershot. However, if the number of active channels decreases on the virtual circuit, it will take a long time for a cell to is formed on the transmitter. Thus the cell arrival rate will decrease. The TDM module will continue to read from the ring buffer at its usual rate and will fall below  since there is not enough data in the buffer to allow the TDM module to continue read until the next cell arrives.

FIG. 2 shows the control structure for the DBCES format. The DBCES control field determines the amount of buffered data that the user wants to store in the rearrangement ring buffer of each channel. If it is set, bit <2 <controls whether this variable is used. Bits <1: 0 <represent the minimum delay buffering that is desired for each channel:
"00" = 47 bytes (therefore the minimum # of active channels in virtual circuit will be 1 );
"01" = 24 bytes (therefore the minimum # of active channels in virtual circuit 2 will be);
"10" = 16 bytes (therefore the minimum # of active channels in the virtual circuit will be 3 );
"11" = 12 bytes (therefore the minimum # of active channels in the virtual circuit will be 4 ).

According to the principles of the invention, when the virtual circuit is configured for DBCES and the DBCES_Control <2 <bit (see Fig. 2) is set, the write pointer of the RX_SAR of the SDT becomes TDM read pointer + CDV + buffer limit the CDV is set for active channels of the virtual circuit.

The active channel buffer limit for the virtual circuit is called the number of Bytes of DBCES buffering calculated by the user (as defined by setting the DBCES control field in the DBCES reordering control structure for the virtual circuit is configured), less the maximum number of bytes required for the virtual circuit can be written to any rearrangement ring buffer of the SDT, given the activity profile of the virtual circuit (e.g. if there are two active channels in  the virtual circuit gives a maximum of 24 bytes of data in a ring buffer the arrival of a cell).

DBCES control is used to provide "clean" buffering when the number of active channels in a virtual circuit can change by large amounts. When the user sets the DBCES control field, he or she defines the minimum number of bytes for buffering that the user always has in each rearrangement ring buffer of the SDT wants to have available for the virtual circuit. This extra buffering adds the ver However, there is a delay in data output on the TDM bus useful for preventing buffer shortfalls if the number of active channels increases changes in a virtual circuit.

A specific example is now considered.

Assume that the user has determined that the expected CDV between cells on the virtual circuit is 625 µs (5 bytes of data in the buffer). The user has also decided that he will allow the number of active channels in the virtual circuit to decrease to a minimum of 1 (which requires 47 bytes of additional data to be stored in the buffers). It is now assumed that there are four active channels in the virtual circuit initially. Therefore, if the formula above is used:
Distance from read pointer = CDV + buffer limit for active channels = 5 bytes + (47 bytes - 47 bytes / 4) = 40 bytes

The write pointer will start writing in one place (at startup or in Error state), which is 40 bytes before the read pointer. After receiving a cell a quarter of the cell, i.e. H. 12 bytes added to the buffer so that the write pointer then 52 bytes before the read pointer.  

In the event that a cell with N = 1 (ie only one channel) is sent, it takes 47 TDM frames for the cell to be put together at the reception in the receive buffer of the RX_SAR. During this time, 47 bytes of data are read from the read pointer from the buffer. Consequently, when the next cell arrives, the write pointer will still be 5 bytes before the read pointer, so no shortfall will occur.
Distance from read pointer = CDV = 5 bytes + buffer limit for active channel = 5 bytes + (47 bytes - 47 bytes / 1) = 5 bytes.

Without DBCES control, however, we would have:
Distance from the read pointer = CDV = 5 bytes.

In this case, if the number of active channels in the virtual circuit drops to one, the TDM module will store the data stored in the buffer within five frames read out and then start reading old data since no new cells have arrived. This would result in a shortfall.

The programmability of the desired buffering by the user can be seen by using a DBCES control field in each rearrangement control structure for DBCES, as can be seen in FIG. 2. The user has the option of either enabling this additional buffering or not, using bit <2 <of the DBCES control field.

Bits <1: 0 <of the DBCES control field are used to determine the size of the additional puf fers to select that in the rearrangement ring buffer of each channel within the virtual Circuit is required. The options are made available to the user rend on the minimum number of active channels transported on the virtual circuit become. The fewer active channels that are transported, the greater the amount of puf  fer, which will be required as the cell arrival rate decreases when there are fewer channels in of the virtual circuit (it takes longer to collect enough data to make a cell to fill). In the example, the user has four options: "00" - minimum 1 active channel; "01" - At least two active channels; "10" = minimum three active channels; "11" = minimum four active channels.

Different methods can be used to show or close CDV and MIN program (the example allows MIN = 1 channel to 4 channels and allows CDV = Maxi mum Lead / 2 (CDV ~ 125 µs - 64 ms). The method can be used together with an algorithm must be used for the detection of the shortfall and shortfall.

The invention thus provides an effective way of addressing the problem of overshoots and under Preventing hassles that may occur when the number in a DBCES service the channels is varied.

The obvious in the above description, iri of the drawing and in the claims Features of the invention can be used both individually and in any combination the realization of the invention may be essential.

Claims (10)

1. A method for managing buffers in a SAR (segmentation and rearrangement) device operating in the DBCES (Dynamic Bandwidth Circuit Emulation Service) mode, comprising:
Determining a buffer limit for active channels for a virtual circuit depending on the number of active channels; and
Set the size of the buffer for each active channel equal to the CDV (cell delay variation) plus the buffer limit for active channels. 2. The method of claim 1, wherein each buffer has a write pointer and a read Pointer and the distance between the write pointer and the read pointer Defines the buffer quantity. 3. The method of claim 1 or 2, wherein the buffer limit for active channels is the same the number of bytes of useful area data per cell divided by the minimum number number of allowed channels less the number of bytes of useful area data per cell di vid by the number of currently active channels. 4. The method of claim 3, wherein the buffer size is recalculated when the Number of channels changes so as to provide adequate buffer when next time there will be a change in the number of channels. 5. The method of claim 4, wherein the method can be activated by a Control bit in a control structure for the buffer is set. 6. The method according to claim 4, wherein the buffers are ring buffers. 7. The method of claim 1, wherein the DBCES implement in an ATM network is.   8. Control data structure for a SAR (segmentation and reordering) device capable of implementing the Dynamic Bandwidth Circuit Emulation Service (DBCES) mode with:
a one-bit control field that determines whether buffer management is active; and
Bits that set the minimum buffering for each channel; and
wherein the buffer size for each active channel is set equal to the CDV (cell delay variation) less the buffer limit for active channels, which depends on the number of active channels. 9. Control data structure according to claim 8, wherein the buffer limit for active channels equal to the number of bytes of useful area data per cell divided by the mini Male number of allowed channels less the number of bytes of the useful area data per Cell divided by the number of currently active channels. 10. The control data structure of claim 8, wherein the active channel buffer limit is 47 / MIN minus 47 / N, where MIN is the minimum number of N channels considered and where N is the number of currently active channels.