DE10142011B4 - Voltage sensor, circuit arrangement with a voltage sensor, and method for configuring and operating such a circuit arrangement - Google Patents

Abstract

A voltage sensor (100) for monitoring a supply voltage applied to a supply potential terminal (1) with respect to upper and lower limit values (Voben, Vunten), comprising:
A first comparison means (10) which compares a partial voltage of the supply voltage (VDD) with respect to the lower limit value (Vunten) with a first reference voltage (Vref) and outputs a first signal (11) when falling below,
- A second comparison means (20) which compares a partial voltage of the supply voltage (VDD) with respect to the upper limit (Voben) with a second reference voltage (Vref) and outputs a second signal (21) when exceeded,
- A voltage divider consisting of a first, second and third resistance element (R11, R2, R31), wherein the voltage divider between the supply potential terminal (1) and a reference potential terminal (2) is connected, for the evaluation of the upper and lower limit of the supply voltage (Voben , Vunten),
- A calibration means (30) which is coupled to the first and the second comparison means (10, 20) and a calibration of the first and / or the second comparison means ...

Description

The The invention relates to a voltage sensor for monitoring a voltage applied to a supply potential terminal Supply voltage to an upper and lower limit. The invention further relates to a circuit arrangement, such a Voltage sensor includes. Furthermore, a method for the configuration of the circuit arrangement and to the operation of the circuit arrangement or the voltage sensor described.

voltage sensors have the task of supplying the supply voltage to a supply potential terminal of the Schaltungsanordung to a given voltage range, by an upper and lower limit is defined to limit. Above or below this voltage or operating range is usually an internal reset is triggered, to avoid a malfunction of the circuit arrangement.

Known Circuit arrangements are common for the Operation with a supply voltage in the range of 2.7 V to 5.5 V designed. This voltage range represents the specification range the circuit arrangement in which the circuit arrangement work as intended got to.

Of the Voltage sensor is common designed so that he is set to a fixed upper limit. The supervision The upper limit is usually not critical because the distance the upper limit to the specification range of the circuit is big enough and the circuit arrangement therefore also with voltages above their Specification area works correctly. For common voltage sensors is the upper Limit 6.3V, with a maximum deviation of +/- 0.15V is tolerated.

Of the lower limit of the voltage sensor is in the above conditions set to a limit of 2.22V. The distance of the lower one Limit value of the voltage sensor from the lower limit of the specification range is big enough, So that the Function of the circuit arrangement even with supply voltages below of the specification area. For this reason the lower limit of the voltage sensor is also fixed.

It There is currently a big one Strive to the specification of a circuit arrangement expand, in particular, a company with ever smaller be expected to be permissible supply voltages. With others In other words, this means nothing else than that the lower value of the specification range to be shifted towards lower voltages. This results the problem that the Distance between the lower limit of the voltage sensor and the lower limit of the specification area becomes smaller and smaller.

conditioned could be due to manufacturing fluctuations the case occur that the actual Contact point of the lower limit of the voltage sensor already comes to rest in the specification area. This does not mean anything other than that Specification area is partially limited by the voltage sensor. Such a situation leads but already to trigger an internal reset, even if the supply voltage in the specified specification area.

Based on 3 , Which represents the course of Versorgunsspannung, this problem should be clarified again who the. Vunten and Voben denote the upper and lower limits of a voltage sensor. Furthermore, two specification ranges X and X 'are shown, which are assigned, for example, to two different circuit arrangements. The first specification area X extends from Vspez, down to Vspez, above, the specification area X 'extends from Vspez, down' to Vspez, above. The upper limit of the specification range is identical in the example chosen for both circuit arrangements, while the lower limits of the specification range differ. The upper and lower limits of the specification range are in both cases within the limits Vunten and Voben of the voltage sensor.

In practice, the lower and upper limits may each deviate upwards or downwards by a predetermined amount (eg +/- 10%). These deviations must then be within the limits of the voltage sensor. For the sake of clarity, it was waived these deviations in 3 take.

Furthermore, in the 3 a value Vgrenz drawn below which an operation of the circuit must be reliably prevented. This is necessary because during operation of the circuit arrangement with a supply voltage below Vgrenz due to possible malfunction of the circuit arrangement could be closed to their operation. An attacker who wants to spy on the circuit, therefore, tries to operate them with a supply voltage below Vgrenz.

To prevent this, the lower Limit value of the voltage sensor between Vgrenz and Vspez, below or Vspez, below 'be defined. However, the closer the lower limit of a specification range moves toward the V limit, the lower the range in which the lower limit value of the voltage sensor can be located. Consequently, for the circuit arrangement with the specification range X, a smaller range Z is available for the lower limit value of the voltage sensor than for the circuit arrangement with the specification range X '. This has a wider range Z 'for the voltage sensor.

As already explained above has been, the lower limit vunts may be due to manufacturing fluctuations the circuit both above Vspez, below and come to rest below Vgrenz. In the former case could be a internal reset in the specification area X will be triggered, which in any case is undesirable. In the latter case could the circuit arrangement with a supply voltage below be operated by Vgrenz without having an internal reset by triggered the voltage sensor would become. An attack or spying on the circuit That would be why possible and must be stopped become.

In JP 60211370 A is a circuit for detecting a clamping voltage level described, wherein by means of voltage divider a partial voltage of a voltage to be detected via comparators with respect to a lower limit value is compared with a reference voltage and when falling below a circuit via an alarm signal is triggered. A calibrator connected in series with the comparators makes it possible to increase or decrease the partial voltage.

Out WO 99/34223 discloses a circuit with voltage fluctuations two over a voltage divider obtained voltages can be monitored. The Voltages are the input signals of two comparators for comparison supplied with a reference voltage, when falling below the partial voltage at the first comparator or if exceeded the partial voltage at the second comparator, a signal is generated.

In FR 2 577 323 A1 a circuit for generating a signal is described in which an input voltage to one input of two flip-flops is adjusted and varied by means of potentiometers at the other inputs of two flip-flops.

US 5,561,578 describes a circuit construction for preventing a high voltage on an X-ray tube, wherein reference voltages are stored in a memory and these are applied via a switch, initiated via a CPU, to an input of a comparator for comparison operations.

DE 196 01 804 A1 describes a method and a system for monitoring a computing unit, which generates a reset signal if the supply voltage falls below a predetermined limit. For this purpose, a fixed code vergli chen with the contents of a volatile memory device and made a re-initialization in case of a deviation.

The Object of the present invention is therefore a Voltage sensor for monitoring a voltage applied to a supply potential terminal supply voltage to indicate an upper and a lower limit, too then reliable works when the distance between the allowed specification range and a threshold voltage is low.

Farther a circuit arrangement is to be specified, which has a high reliability even if the lower limit of the permissible operating voltage range very low values.

A Another object is a method for configuring the Circuit arrangement and a method for operating the circuit arrangement specify which ensure that even a low-power operation Supply voltages reliable possible is.

These Tasks are performed with a voltage sensor with the characteristics of independent claim 1, with a circuit arrangement according to the independent claim 14 and with the method according to claims 21 and 23 solved. advantageous Embodiments result from the dependent claims.

• – ein erstes Vergleichsmittel, das die Versorgungsspannung auf den unteren Grenzwert durch Bewertung mit einer ersten Referenzspannung vergleicht und bei Unterschreiten ein erstes Signal abgibt,
• – ein zweites Vergleichsmittel, das die Versorgungsspannung auf den oberen Grenzwert durch Bewertung mit einer zweiten Referenzspannung vergleicht und bei Überschreiten ein zweites Signal abgibt,
• – einen Spannungsteilers, bestehend aus einem ersten, zweiten und dritten Widerstandselement, wobei der Spannungsteiler zwischen dem Versorgungspotentialanschluß und einem Bezugspotentialanschluß verschaltet ist, zur Bewertung des oberen und unteren Grenzwertes der Versorgungsspannung,
• – ein Kalibrier-Mittel, das mit dem ersten und dem zweiten Vergleichsmittel gekoppelt ist und eine Kalibrierung des ersten und/oder des zweiten Vergleichsmittels ermöglicht, indem die zu bewertende Versorgungsspannung erhöht oder erniedrigt wird,
• – ein Kalibrier-Mittel aus einer ersten Kalibrier-Einrichtung und einer zweiten Kalibrier-Einrichtung, wobei die erste Kalibrier-Einrichtung dem ersten Vergleichsmittel und die zweite Kalibrier-Einrichtung dem zweiten Vergleichsmittel zugeordnet ist,
• – die erste Kalibrier-Einrichtung parallel zu einem Schaltelement verschaltet ist, das zwischen dem Versorgungspotentialanschluß und dem Knoten zwischen dem ersten und zweiten Widerstandselement des Spannungsteilers verschaltet ist und
• – die zweite Kalibrier-Einrichtung parallel zu einem zweiten. Schaltelement verschaltet ist, das zwischen dem Knoten zwischen dem zweiten und dem dritten Widerstandselement und dem Bezugspotentialanschluß verschaltet ist.

The voltage sensor according to the invention for monitoring a supply voltage applied to a supply potential connection to an upper and lower limit comprises the following features:

• A first comparison means which compares the supply voltage to the lower limit value by evaluation with a first reference voltage and outputs a first signal when falling below,
• - A second comparison means which compares the supply voltage to the upper limit value by evaluation with a second reference voltage and when exceeding a second Sig donate,
• A voltage divider consisting of a first, second and third resistance element, wherein the voltage divider is connected between the supply potential terminal and a reference potential terminal, for the evaluation of the upper and lower limit value of the supply voltage,
• A calibration means, which is coupled to the first and the second comparison means and permits a calibration of the first and / or the second comparison means, by increasing or decreasing the supply voltage to be evaluated,
• A calibration means comprising a first calibration device and a second calibration device, wherein the first calibration device is assigned to the first comparison device and the second calibration device is assigned to the second comparison device,
• - The first calibration device is connected in parallel with a switching element, which is connected between the supply potential terminal and the node between the first and second resistance element of the voltage divider, and
• - The second calibration device parallel to a second. Switching element is connected, which is connected between the node between the second and the third resistance element and the reference potential terminal.

fluctuations the lower and upper limit of the voltage sensor due of manufacturing dispersions are eliminated according to the invention by calibration, So that the Limits safely in the intended voltage range for lying come. The voltage sensor thus has in contrast to the prior Technology no more fixed limits, but configurable Limits. The limit values are chip-individual in the production test set to the intended limit.

By the first and second calibration means are achieved in that the upper and the lower limit of the voltage sensor independently can be calibrated.

There the voltage divider both the first and the second comparison means is assigned, results in a total of particularly simple circuitry Embodiment of the voltage sensor according to the invention. As resistive elements resistors are preferably used. It is, however Other components conceivable.

Prefers each of the first and second calibration devices has one Number of resistance elements, each with one connected in series Switching element, wherein the series circuits of resistance element and switching element are connected in parallel. The calibration facilities are thus constructed such that respective Resistor elements of the voltage divider further resistance elements be switched on. This will be at the voltage divider divided down declining voltages differently. This procedure makes it possible Manufacturing fluctuations, especially on the comparison devices act, balance.

Prefers is provided that only one of the switching elements of each calibration device to a specific Time is closed. By a suitable dimensioning It is then possible for the resistance elements to be connected to the voltage divider sloping voltages very precise adjust. It would be possible Naturally also, several of the switching elements of each of the calibration devices close.

Farther a gate is provided which has a first and a second input and having an output and the first input of the gate with the output of the first comparator and the second input of the gate is connected to the output of the second comparator and at the output of the gate an alarm signal can be tapped, if the first or the second comparison means the first or the second signal outputs.

Either the first and the second comparator are with a Reference voltage applied, which for the evaluation of the voltage divider tapped voltages used. The first and the second reference voltage of In principle, the first and the second comparison device can be arbitrarily selected. A particularly simple circuit structure arises when the first and second reference voltages are identical. As a reference voltage the bandgap voltage is preferably used. This has the advantage on that she independently of manufacturing variations is highly precise adjustable.

The invention thus proposes a voltage sensor which operates with flexibly adjustable limit values. In principle, the setting of the limits to compensate for manufacturing fluctuations is provided. However, the structure according to the invention also makes it possible for the lower limit value to be monitored of the supply voltage at which the first signal of the comparison device is triggered to be flexibly adjustable, depending on which switching element of one or both of the calibration devices is closed. Under flexible adjustable is understood in the present case that the lower limit not only in the millivolt range, but is arbitrarily adjustable. By configuring the potash Thus, for example, it is possible to set the voltage sensor to a lower limit value of 1.8 V or 2.7 V. The setting may already be predetermined during manufacture or it may be determined anew each time during the initialization of the voltage sensor.

It it turned out that it is particularly advantageous if the lowest to be monitored limit value of the supply voltage 1.55V. The lower limit of the specification range of current circuit arrangements is 1.62 V. This value results from the lower voltage value of the Operating range of 1.8 V minus a 10% maximum deviation down. The limit tension, below which the circuit arrangement will no longer be functional may, is 1.5 V. The range Z, within the lower limit of the voltage sensor may lie, thus extending from 1.5 V to 1.62 V. It is preferred the lower limit of the voltage sensor is set to 1.55V.

Of the upper to be monitored Limit value of the supply voltage at which the second signal of the Comparator triggered is, is preferably at 6.3 V.

Of the creates voltage sensor according to the invention the requirements for the flexible setting of the lower and / or upper limit value of the voltage sensor. The use of this flexibility is through the circuit arrangement according to the invention possible, preferably a voltage sensor of the type described above, a computing unit and at least one non-volatile memory device comprises the determination of the lower limit to be monitored is the Supply voltage through the arithmetic unit by reading a Value from the non-volatile Memory device is vornehmbar. The circuit arrangement according to the invention and in particular the method for their operation is in principle with any other sensor possible, whose limit or limits are variably configurable or are. In the non-volatile Memory device are thus stored values that are the chip individual Enable configuration of the voltage sensor. The configuration the voltage sensor itself is performed by the arithmetic unit, which reads out the corresponding values from the non-volatile memory device and the calibration means configured accordingly. Specifically, the calibration includes the information, which of the switching elements of one or each the calibration facilities must be closed.

to increase the safety of the circuit arrangement against spying the Circuit arrangement according to the invention and not closer designated components is further provided a read-only memory, in which a first identification value is stored. This first identification value serves while an initialization process to be queried whereby the operability the non-volatile Memory device to be checked can. Would the functionality classified as not given, this would have an impact on the Configuration of the voltage sensor. The term "configuration" is to be understood that the lower Area of the operating arrangement is then set so that the lower area the voltage sensor as possible is defined restrictively, as one starts from a spying. For example, the specification range may be adjusted by appropriate adjustment of the lower limit. In the event that the functionality the non-volatile Memory device is classified as positive, the voltage sensor is so configured that he compensates for the manufacturing fluctuations of its components and the Specification area is not cropped, but the functional area of the chip can not be left without the sensor responding. Of the first identification value is thus used to determine whether the circuit arrangement as a lower operating range, for example 2.7 V (it became the functionality the non-volatile Memory means denied) or 1.8 V (the functioning of the non-fleeting Memory device is given) has.

Preferably is in the non-volatile memory a second identification value stored for comparison with the first identification value in the read-only memory. For example, if the first and second identification values match, so the lower limit of the voltage sensor becomes a first Value configured. Voices the first and second identification value however, do not agree so the lower limit of the voltage sensor becomes a second, for example about configured to the first limit value. Corresponding is the configuration of the upper limit of the voltage sensor possible.

In a further preferred embodiment, the circuit arrangement further comprises a watchdog timer, which checks the functioning of the arithmetic unit and the at least one non-volatile memory device and causes an initialization of the circuit arrangement in case of malfunction. The task of the watchdog timer is to allow the configuration of the voltage sensor of the circuit arrangement only when the operability of the arithmetic unit, which is to make the configuration of the voltage sensor yes, and the at least one non-volatile memory device is checked. The name "Timer" already implements that this check must be made within a given period of time. If the correct functioning of the arithmetic unit and of the non-volatile memory device is not reported to the watchdog timer within this time period, a stop or an initialization, for example a reset, of the circuit arrangement is initiated.

Preferably are the arithmetic unit and the watchdog timer with a clock signal line connected, with the watchdog timer is decremented at each beat of a predetermined count and upon reaching another predetermined counter reading the initialization the circuit arrangement causes.

Especially It is advantageous if the watchdog timer consists of components, which is also at a supply voltage below the lowest limit the supply voltage are functional.

The inventive method for configuration of the circuit arrangement includes the configuration of the lowest to be monitored Limit value of the supply voltage Chip individual after production the circuit arrangement, wherein the configuration is the calibration the voltage sensor to summarizes. The chip-individual configuration takes place here by successive Activate, that is Shut down, one of the switching elements of one or both of the calibration devices, while achieving the desired lowest limit value in the non-volatile memory device the relevant switching element of one or both calibration devices representing Value is saved. The calibration of the voltage sensors is thus concluded that a switching element in question representing value in the non-volatile Memory device is stored. This value is at each initialization of the Circuit arrangements by the arithmetic unit callable. The arithmetic unit causes then that the the value corresponding switching element of the respective calibration device is closed, whereby the voltage sensor is configured.

The Configuration of the circuit arrangement further comprises the storing of the second identification value in the non-volatile Storage. Storing the first identification value in the read-only memory is done by a mask programming this Memory already during the production. Will the second identification value in the non-volatile Memory chosen such that he corresponds to the first identification value in the read-only memory, Thus it is already determined to which lower limit the voltage sensor is adjustable during initialization.

• – in einer ersten Phase wird die Funktionsfähigkeit der Recheneinheit und des Nur-Lese-Speichers überprüft,
• – in einer zweiten Phase wird der erste Identifikations-Wert in dem Nur-Lese-Speicher mit dem zweiten Identifikations-Wert aus dem nicht-flüchtigen Speicher in der Recheneinheit verglichen, wobei bei einer Übereinstimmung des ersten und des zweiten Identifikations-Wertes der den untersten Grenzwert der Versorgungsspannung repräsentierende Wert aus dem nicht-flüchtigen Speicher zur Konfiguration des Spannungssensors gelesen wird.

The method for operating the circuit arrangement comprises the following steps:

• - In a first phase, the functionality of the arithmetic unit and the read-only memory is checked,
• In a second phase, the first identification value in the read-only memory is compared with the second identification value from the non-volatile memory in the arithmetic unit, wherein when the first and second identification values match, the lowest Limit value representing the supply voltage is read from the non-volatile memory for the configuration of the voltage sensor.

Under the concept of the "lowest Limit value " understood here that this the lower limit of the voltage sensor corresponds, which is the lowest case can be adjusted. Since the term "lower limit value" denotes a flexibly adjustable value, the lowest limit sets the outermost lower limit, at which the voltage sensor must respond, dar. The lowest limit is therefore mostly in the vicinity from Vgrenz lie.

The described method for operating the circuit includes consequently, that at a match of the first and second identification values, the extremely possible lower limit value is configured in the voltage sensor, because then of the correct operability the non-volatile Memory device is assumed. Votes the first and the However, the second identification value of the voltage sensor does not match so the voltage sensor is configured to a lower limit, the over the lowest voltage value, since in this case a spying the circuit arrangement (and possibly other components) assumed becomes. The mismatch the first and second configuration value is due to the non-function of the non-volatile Close memory device.

The sees operating method according to the invention furthermore, that in the first phase of the watchdog timer from a first predetermined count up to an overflow counts wherein the arithmetic unit, the operability of the arithmetic unit and of the read-only memory until the overflow reaches the watchdog timer must have reported. Stepping through this process will ensure that not an attacker by disruption The code processing of the arithmetic unit prevents the voltage sensor is initialized correctly.

Furthermore, it is provided that in the second Phase of the watchdog timer from a second predetermined count to an overflow counts, the arithmetic unit must have reported the configuration of the voltage sensor until reaching the overflow to the watchdog timer. This creates a second barrier for a potential attacker. For the configuration of the voltage sensor namely only a limited, provided by the watchdog timer time is provided. If the configuration of the voltage sensor does not take place within the predetermined time period, the circuit arrangement is initialized by the watchdog timer. Preferably, the counting of the watchdog timer is a decrement and the second count during the second phase is greater than the first count during the first phase.

It is further provided that after Successfully going through the second phase of the watchdog timer is deactivated in the third phase and then no initialization the circuit can trigger more. It goes without saying by itself, that the second phase can only be completed if the first phase successfully completed.

The Invention will be explained in more detail with reference to the following drawings. Show it:

1 the basic structure of the voltage sensor according to the invention,

2 a schematic representation of the circuit arrangement according to the invention,

3 a representation of the problem underlying the invention,

4 a flow chart, based on the configuration of the circuit arrangement can be understood, and

5A and 5B a flow chart, based on the operation of the circuit arrangement can be understood.

The 1 shows a schematic diagram of the voltage sensor according to the invention. Between a supply potential connection 1 to which a supply potential VDD is applied, and a reference potential terminal 2 is a voltage divider consisting of the three resistive elements R11, R2, R31, arranged. A first comparator 10 is with his first entrance 12 is connected to the node between the first resistive element R11 and the second resistive element R2. The second entrance 13 of the first comparator 10 is subjected to a reference voltage VREF. Similarly, a first input 22 a second comparator 20 with the reference potential VREF or with the second input 13 of the first comparator 10 connected. The reference voltage VREF is preferably the bandgap voltage. A second entrance 23 of the second comparator 20 is connected to a node between the second resistance element R2 and the third resistance element R31. An exit 14 of the first comparator 10 is with a first entrance 41 a gate 40 connected. In the same way is an exit 24 of the second comparator 20 with a second entrance 42 of the gate 40 connected. At the exit 43 of the gate 40 can be an alarm signal 44 be tapped.

The principle of the voltage sensor is based on the comparison of a partial voltage of the external supply voltage VDD with the reference voltage. This partial voltage of the supply voltage is generated via the, in the present embodiment ohmic voltage divider. The first comparator 10 monitors the lower limit of the supply voltage while the second comparator 20 monitors the upper limit of the supply voltage. The voltage drops at the first input 12 of the first comparator 10 below the reference voltage VREF, so is at the output 14 a first signal 11 the gate 40 fed. The gate 40 is executed as an OR gate, so that at the output 43 an alarm signal is present. Analogous to this is the alarm signal 44 even when tapped at the second input 23 of the second comparator 20 voltage applied, the reference voltage VREF at the first input 22 exceeds.

Because the offset voltages of the comparators 10 . 20 directly into the switching thresholds and these offset voltages depend on process variations in the production, the invention provides, the switching threshold, that is to realize the lower limit of the voltage sensor adjustable. As in the present embodiment with a single voltage divider by the variation of the switching threshold of the first comparator 10 also the switching threshold of the second comparator 20 would shift, must also the switching threshold of the second comparator 20 to be changed with. This is the calibration means 30 provided, which is arranged parallel to the voltage divider. The calibration means 30 has two calibration devices for this purpose 31 . 32 on. The calibration device 31 is here the first comparator 10 , which monitors the lower limit of the voltage sensor assigned. Correspondingly, the calibration device is 32 the second comparator 20 , which monitors the upper limit of the voltage sensor assigned.

The two calibration devices 31 . 32 are identical. Each calibration device consists of a parallel connection of resistance elements R12,... R1n, wherein each of the resistance elements has a switching element S12,... S1n connected in series. The calibration device 31 is connected in parallel to a switching element S11. The switching element S11 is between the supply potential terminal 1 and the first resistor element R11 connected. Analogous to this is the second calibration device 32 a switching element 531 connected in parallel. The switching element S31 is connected between the third resistance element R31 and the reference potential terminal 2 arranged.

To calibrate the voltage sensor, more precisely to clean up the offset voltages of the first and second comparators 10 . 20 , one or more resistive elements R12, ... R1n or R32, ... R3n are "integrated" into the voltage divider. With suitable dimensioning of the resistance elements R12, ... R1n or R32, ... R3n, it is sufficient to activate only one resistance element in each case and thus to vary the partial voltages of the voltage divider. In practice, it has been found that sufficient accuracy is achieved with eight resistor elements per calibration device.

The dimensioning of the resistance elements of the calibration devices 31 . 32 is such that caused by process fluctuations offset fluctuations of the comparators 10 . 20 can be leveled. One of the resistance elements of the calibration devices 31 . 32 is preferably dimensioned such that when it is activated (that is, the series-connected switch is closed), the lower limit of the supply voltage to be monitored can be significantly shifted. If the voltage sensor is dimensioned such that the lower limit value is designed, for example, at 1.8 V, the voltage sensor is operated with the activation of the last-mentioned resistance element with a lower limit value of 3 V. The voltage sensor can then be used in circuit arrangements which basically have different specifications tion areas. In connection with the description of the method of operation of the voltage sensor integrated in a circuit arrangement, this functional feature will be better understood.

2 shows a schematic block diagram of the circuit arrangement according to the invention, the 1 includes described voltage sensor. The voltage sensor 100 is, as already in 1 described between a supply potential terminal 1 and a reference potential terminal 2 connected. The exit 43 the gate of the voltage sensor 100 is via a signal line with a computing unit 110 connected. In the event that the voltage sensor 100 an over or undervoltage is detected, an alarm signal 44 to the arithmetic unit 110 transmitted, whereby this brings the circuit arrangement, for example, in a secure state or triggers a reset signal. In what way the arithmetic unit 110 on the alarm signal 44 reacts, is in principle arbitrary and not essential to the invention. Via a signal line 113 is a read-only memory 130 with the arithmetic unit 110 connected. In the read-only memory 130 a first identification value is stored. With the arithmetic unit 110 is a non-volatile memory device 120 via a signal line 112 connected. In the non-volatile memory device 120 a second identification value is stored. In addition, a watchdog timer 140 provided, via a signal line 114 with the arithmetic unit 110 , via a signal line 116 with the read-only memory 130 and via a signal line 115 with the non-volatile memory device 120 connected is. Both the watchdog timer 140 as well as the arithmetic unit 110 are via a clock signal line 150 acted upon by a clock signal CLK.

The watchdog timer 140 increases the safety of the circuit arrangement against unwanted spying. In a first step, the watchdog timer checks whether the arithmetic unit 110 and the read-only memory are functional. If this is not the case, then a restart or an initialization, for example, a reset of the circuit arrangement caused by the watchdog timer. If the functionality of the two components mentioned is checked, then the configuration of the voltage sensor by the arithmetic unit 110 performed. For this purpose, the arithmetic unit reads 110 from the non-volatile memory device 120 Configuration values, eliminating the calibration facilities 31 . 32 be configured. The configuration comprises in this case which of the resistance elements R12,... R1n or R32,... R3n must be "integrated" into the voltage divider.

This configuration may differ from circuit arrangement to circuit arrangement, since manufacturing-related fluctuations cause different partial voltages of the voltage divider. For this reason, after the production of the circuit arrangement, it is determined individually which of the resistors of the calibration devices must be switched into the voltage divider. For this purpose, the switching elements of each calibration device are closed sequentially and by applying a variable supply voltage to the supply potential terminal 1 the lower limit is determined. After the desired lower limit has been reached, a value corresponding to the resistance element in the non-volatile memory 120 stored. This value will be for every configuration of the voltage sensor 100 used.

This in 4 The flow chart shown again illustrates this process. During fabrication of the circuitry, a first identification value is written to the read-only memory 130 the circuit stored. The storage of the first identification value can be realized as a mask programming of the read-only memory.

To the completion of the circuit finds the chip individual Configuration of the lowest to be monitored Limit value of the supply voltage instead. This process step comprises the successive one Activate each switching element of a calibration device. After this the resistive element has been located where the offset variation of the associated Comparator can be equalized, this is a resistance element corresponding value stored in the non-volatile memory. This is followed by the storage of a second identification value in the non-volatile Storage. With this step, the configuration of the the voltage sensor according to the invention comprehensive circuitry completed.

The method of operating the circuit arrangement according to the invention, which comprises the described voltage sensor, is disclosed in US Pat 5A and 5B shown. With the application of a supply voltage to the supply potential terminal is also a clock signal to the clock signal line 150 ( 2 ).

At this time, the watchdog timer starts decrementing from a first count value with every beat by 1 to an overflow. Alternatively, of course, the watchdog timer could also increment from 0 to a predetermined count. During the counting process of the watchdog timer, the arithmetic unit reads 110 Values from read-only memory 130 out. If the reading out of data is not possible, an initialization of the circuit arrangement takes place by the watchdog timer. In the case of correct readout of data from the read-only memory, the arithmetic unit reports the correct function to the watchdog timer. If the message occurs after the overflow of the watchdog timer, an initialization of the circuit arrangement also takes place. However, if the message is within the counting process of the watchdog timer, the first phase is completed successfully.

In In the second phase, the watchdog timer starts from a second count each beat by 1 to an overflow to decrement. Also in this case, the overflow be defined as 0. With the beginning of the counting process becomes the first Identification value read from the read-only memory. Farther finds a readout of the second identification value from the non-volatile Memory instead. The first and the second identification value become compared to each other. If these two values agree, so the voltage sensor is at the lowest limit which from the non-volatile Memory is configured as working correctly nonvolatile Memory is assumed. Corresponds to the first identification value not the second identification value, then the voltage sensor configured to a lower limit that is above the lowest limit is because a spying is assumed. After the successful Configuration of the voltage sensor informs the arithmetic unit Watchdog timer whose configuration. Only if the message before the overflow of the watchdog timer, the watchdog timer is deactivated. Deactivation is called the third phase. Is this done? Message not or after the overflow, such is an initialization of the circuitry by the watchdog timer caused or the circuit stopped.

1

Supply potential connection

2

Reference potential connection

10

comparator

11

first signal

12

first entrance

13

second entrance

14

output

20

comparator

21

second signal

22

first entrance

23

second entrance

24

output

30

Calibration means

31

Calibration device

32

Calibration device

40

gate

41

first entrance

42

second entrance

43

output

44

Alarm signal

100

voltage sensor

110

computer unit

111, ... 116

Signal- or bus line

120

non-volatile Storage

130

Read-only memory

140

Watchdog Timer

150

Clock signal line

VDD

supply voltage

Vref

reference voltage

R11 ... R1n

resistive element

R31 ... R3n

resistive element

S11 ... S1n

switching element

S31 ... S3n

switching element

Claims (28)

Voltage sensor ( 100 ) for monitoring a at a supply potential terminal ( 1 ) supply voltage with respect to an upper and a lower limit value (Voben, Vunten), comprising: - a first comparison means ( 10 ), which compares a partial voltage of the supply voltage (VDD) with respect to the lower limit (Vunten) with a first reference voltage (Vref) and falls below a first signal ( 11 ), - a second comparison means ( 20 ), which compares a partial voltage of the supply voltage (VDD) with respect to the upper limit value (Voben) with a second reference voltage (Vref) and, if a second signal is exceeded ( 21 ), - a voltage divider consisting of a first, second and third resistance element (R11, R2, R31), wherein the voltage divider between the supply potential terminal ( 1 ) and a reference potential terminal ( 2 ), for evaluating the upper and lower limits of the supply voltage (Voben, Vunten), - a calibration means ( 30 ), which with the first and the second comparison means ( 10 . 20 ) and a calibration of the first and / or the second comparison means ( 10 . 20 ) is increased or decreased by a partial voltage of the supply voltage (VDD), wherein - the calibration means from a first calibration device ( 31 ) and a second calibration device ( 32 ) and the first calibration device ( 31 ) the first comparison means ( 10 ) and the second calibration device ( 32 ) the second comparison means ( 20 ), - the first calibration device ( 31 ) is connected in parallel with a first switching element (S11) connected between the supply potential terminal (S11) 1 ) and the first resistance element (R11) of the voltage divider is connected and - the second calibration device ( 32 ) is connected in parallel with a second switching element (S31) connected between the third resistance element (R31) and the reference potential terminal (S31). 2 ) is interconnected. Voltage sensor according to Claim 1, characterized in that the first and the second calibration device ( 31 . 32 ) each having a number of resistive elements (R12, ... R1n; R32, ... R3n), each having a switching element connected in series therewith (S12, ... S1n, S32, ... S3n), wherein the series circuits Resistor element and switching element are connected in parallel. Voltage sensor according to claim 2, characterized that only one of the switching elements (S12, ... S1n; S32, ... S3n) of each calibration device closed at a certain time. Voltage sensor according to claim 2 or 3, characterized in that the first or second switching element (S11, S31) is closed (conductive) only when none of the switching elements (S12, ... S1n, S32, ... S3n) of the parallel connected calibration device ( 31 . 32 ) closed is. Voltage sensor according to one of Claims 1 to 4, characterized in that the first and the second comparison means ( 10 . 20 ) are implemented as first and second comparators, each having a first (inverting) (12, 22) and a second (non-inverting) input ( 13 . 23 ) and an output ( 14 . 24 ) exhibit. Voltage sensor according to claim 5, characterized in that the first input ( 12 ) of the first comparator is connected to the node of the first and second resistors (R11, R2) of the voltage divider. Voltage sensor according to Claim 5 or 6, characterized in that the second input ( 22 ) of the second comparator is connected to the node of the second and third resistors (R2, R31) of the voltage divider. Voltage sensor according to one of Claims 1 to 7, characterized in that a gate ( 40 ) is provided, which has a first and a second input ( 41 . 42 ) and an output ( 43 ) and the first input of the gate to the output of the first comparison device ( 14 ) and the second input of the gate with the output of the second comparator ( 24 ) and at the output of the gate an alarm signal ( 44 ) can be tapped if the first or the second comparison device ( 10 . 20 ) the first or the second signal ( 11 . 21 ). Voltage sensor according to one of claims 1 to 8, characterized in that the first and second reference voltages are identical. Voltage sensor according to one of claims 1 to 9, characterized in that the Reference voltage is the bandgap voltage. Voltage sensor according to one of claims 1 to 10, characterized in that the lower limit to be monitored (VUNTEN) of the supply voltage at which the first signal ( 11 ) of the first comparison device ( 10 ) is flexibly adjustable, depending on which switching element (S12, ... S1n, S32, ... S3n) of one or both of the calibration devices ( 31 . 32 ) is closed (conductive). Voltage sensor according to claim 11, characterized that the lowest to be monitored Limit value of the supply voltage is 1.55V. Voltage sensor according to one of claims 1 to 12, characterized in that the upper to be monitored Limit value of the supply voltage is 6.3V, at which the second signal the comparator triggered becomes. Circuit arrangement, comprising - a voltage sensor according to one of claims 1 to 13 - a computing unit ( 110 ) and - at least one non-volatile memory device ( 120 ) wherein the configuration of the lower limit to be monitored of the supply voltage by the arithmetic unit ( 110 ) can be made by reading out a value from the nonvolatile memory device. Circuit arrangement according to Claim 14, characterized in that furthermore a read-only memory ( 130 ) is provided, in which a first identification value is stored. Circuit arrangement according to Claim 14 or 15, characterized in that in the non-volatile memory ( 120 ) a second identification value is stored, which for comparison with the first identification value in the read-only memory ( 130 ) serves. Circuit arrangement according to one of Claims 14 to 16, characterized in that furthermore a watchdog timer ( 140 ) is provided, the functionality of the computing unit ( 110 ) and the at least one non-volatile memory device ( 120 ) and, in the event of a malfunction, initiate initialization of the circuitry. Circuit arrangement according to Claim 17, characterized in that the arithmetic unit ( 110 ) and the watchdog timer ( 140 ) with a clock signal line ( 150 ), the watchdog timer ( 140 ) is decremented at each beat of a predetermined count and causes the initialization of the circuit upon reaching another predetermined count. Circuit arrangement according to Claim 17 or 18, characterized in that the watchdog timer ( 140 ) consists of components that are functional even at a supply voltage below the lowest limit of the supply voltage. Circuit arrangement according to one of claims 14 to 19, characterized in that the sensor according to one of the claims 1 to 13 is formed. Method for configuring a circuit arrangement according to one of Claims 14 to 20, in which the configuration of the lowest limit value of the supply voltage to be monitored is effected chip-individually after the fabrication of the circuit arrangement, the configuration comprising the calibration of the voltage sensor ( 100 ) and the chip-individual configuration by successive Akti fourth, that is close, one of the switching elements (S12, ... S1n, S32, ... S3n) one or both of the calibration facilities ( 31 . 32 ), wherein upon reaching the desired lowest limit in the non-volatile memory device ( 120 ) a switching element (S12, ... S1n, S32, ... S3n) of one or both of the calibration devices ( 31 . 32 ) value is stored. Method according to claim 21, characterized in that in the non-volatile memory ( 120 ) a second identification value is stored. Method for operating a circuit arrangement according to one of Claims 14 to 20, in which - in a first phase, the functionality of the arithmetic unit ( 110 ) and the read-only memory ( 130 ) is checked, - in a second phase, the first identification value in the read-only memory ( 130 ) with the second identification value from the non-volatile memory in the arithmetic unit ( 110 ), wherein, if the first and second identification values match, the value representing the lowest limit value of the supply voltage is read from the non-volatile memory ( 120 ) for the configuration of the voltage sensor ( 100 ) is read. Method according to Claim 23, characterized in that in the first phase the watchdog timer ( 140 ) counts from a first predetermined count value to an overflow, wherein the arithmetic unit ( 110 ) the functionality of the arithmetic unit ( 110 ) and the read-only memory ( 120 ) until the overflow reaches the watchdog timer ( 140 ) must have reported. A method according to claim 23 or 24, since characterized in that in the second phase of the watchdog timer ( 140 ) counts from a second predetermined count value to an overflow, wherein the arithmetic unit ( 110 ) the configuration of the voltage sensor ( 100 ) until the overflow reaches the watchdog timer ( 140 ) must have reported. Method according to Claim 24 or 25, characterized in that a non-reporting of the arithmetic unit ( 110 ) until the overflow of the watchdog timer ( 140 ) stopping or initializing the circuitry by the watchdog timer ( 140 ). Method according to one of Claims 23 to 26, characterized in that, if the first and the second identification value do not match, the voltage sensor ( 100 ) is configured to a lower limit that is above the lowest voltage value. Method according to one of Claims 23 to 27, characterized in that after the successful completion of the second phase, the watchdog timer ( 140 ) is switched inactive in the third phase and can no longer initiate initialization of the circuit arrangement.