DD253906C2 - METHOD AND ARRANGEMENT FOR TRANSFERRING DIGITAL INFORMATION - Google Patents

Description

Field of application of the invention

Method and arrangement for the band-limited transmission of digital information whose main application is in mobile radio technology, wherein digitized voice, data or other digital information is to be transmitted at high speed with low bandwidth requirements. The invention can also be used for radio links and in wired transmission technology, if the available frequency bands are to be exploited with high efficiency.

Characteristic of the known technical solutions

In radio transmission systems, modulation methods are used for the transmission of digital information which lead to a carrier signal with a constant amplitude, in order to allow the use of non-linear transmission elements in the transmitter (eg <- power output stage). In addition, there is a demand for an economic use of the available bandwidth and a maximum suppression of power shares outside this band. These requirements are met by a system including a transmitter with a carrier oscillator whose output signal is angle modulated and has a continuous phase progression over time. Such systems implement modulation techniques commonly referred to as CPM (Continuous Phase Modulation or Correlative Phase Modulation). The continuous phase characteristic of the specially implemented modulation method determines the form of the spectral power density of the signal and is determined by a Vormodulationskreis. The receiver used in the system must be adapted to the Vormodulationskreis and allow the reliable detectability of the data signals even with occurring unknown frequency shifts between the transmitter and receiver. In this case, the error probability as a function of the signal-to-noise ratio should be only slightly inferior to that in the case of optimum baseband transmission.

Technical solutions of known CPM methods include in the transmitter a Vormodulationskreis with a linear transfer function according to the mathematical description of the implemented method (SFSK ₁ TFM, GTFM, GMSK, COR-PSK). According to the transfer function, a binary input data sequence b (m) first passes to a partial-response coding circuit which forms from the input data sequence b (m) a Ausgangsdatenfotge c (m) with k Ss 2 levels by linear superposition of levels of adjacent data symbols and then this Data sequence c (m) is applied to the input of a low-pass filter which realizes a desired pulse shaping and ensures that the phase of the modulated signal changes by one k-level to be uniquely assigned within each symbol interval. (F. Amoroso, "Pulse and Spectrum Manipulation in the Minimum Frequency Shift Keying (MSK) Format", IEEE Trans. Comm., Vol. COM-24, No. 3, pp. 381-384

March 1976 F. de Jager, C. B. Dekker, "Tamed Frequency Modulation, A Novel Method to Achieve Spectrum Economy in Digital Transmission",

IEEE Trans. Comm., Vol. COM-26, no. 5, pp. 534-542

May 1978 C.B.Dekker, "On the Application of Tamed Frequency Modulation to Various Fields of Digital Transmission via Radio",

International Zurich Seminar on Digital Communications (1980), A 1.1-1.9 D.Muilwijk, "Correlative Phase Shift Keying -A Class of Constant Envelope Modulation Techniques", IEEE Trans. Comm., Vol. COM-29, No.3, pp 226-235

March 1981, Kah-Seng Chung, "Generalized Tamed Frequency Modulation and its Application for Mobile Radio Communications" IEEE Trans on on Cellular Technology, Vol.VT-33, No.3, pp. 103-113 Aug. 1984,

DE-OS2838984 H04L / 027/000 "System for data transmission with the aid of an angle-modulated carrier of constant amplitude",

Laid-open specification DE-OS 3211812 H04L / 027/180 "Transmitter for angle-modulated signals").

For the value of the phase change within a symbol interval Δφ (ηι), the following rules apply as a function of the input data sequence b (m):

for MSK, SFSK: 4 <p (m) = - · b _m _,

for TFM: dep (m) = γ (- ± -b _{m 2} + yb _m _, + -jb _m )

for GFTM: i9 (m) = y (X'b _m -2 + yb _m -, + xb _m ), 2x + y = 1.

COR-PSK with linear pre-modulation circuit realizes a generalization of the preceding rules. As a result of the possible bipolar binary occupancy η of the data symbols b _ _{m 2,} b _m b _m _ _1f following table:

Table 1

b _m -2 bm - 1 b _m MSK / SFSK Δφ _η {ττ \) GTFM η + 1 + 1 + 1 + 77/2 TFM + ττ / 2 (y + 2x) 1 -1 -1 - 1 -77/2 + -L - 77/2 (y + 2x) 2 + 1 + 1 - 1 + 77/2 -77/2 + 77/2 y 3 -1 ^x + 1 + 1 + 77/2 + 77/4 + 77/2-y 4 -1 -1 + 1 -77/2 + 77/4 - 77/2 y 5 + 1 -1 -1 -77/2 - / 4 - 77/2 y 6 -1 + 1 -1 + 77/2 -77/4 + 7? / 2- (y-2x) 7 + 1 -1 + 1 -77/2 0 -77/2 · (γ-2χ) 8th 0

The average slope of the phase of the carrier signal over time is _ ⁸ for all known technical solutions

ΔΦ = Σ A? _n (m) = 0.

The mean value of the amount of phase change within a symbol interval is different: for MSK, SFSK: '"' ^ '™"

for TFM: ¹⁰ V ^ '= |

τ; * y for 0.5 ^ y ^ 1

for 0 ώ y ^ o, 5

for GTFM:

η 4

The patent application DE-OS 3008567 H04L / 027/120 "system for multi-level data transmission with the aid of an angle-modulated carrier of constant amplitude"

described technical solution contains a Vorodulationskreis, which consists of the cascade of a level converter with not necessarily linear transfer function and a low pass filter, which corresponds to the 3rd Nyquist criterion (S.Pasupathy, "Nyquist's Third Criterion", Proceedings IEEE, Vol.62, No.6 , pp. 860-861, June 1974), the technical solution for transmitting multivalued data levels The purpose of the level converter, when transmitting binary data signals, is to convert a binary input data sequence b (m) into an output data sequence c (m) with k> 2 levels, wherein at least one of the binary data symbols two of the k data symbols of the output data sequence c (m) are assigned, and thus phase changes of the carrier signal within a symbol interval Δφ (η-ι) are generated, the row

- (---) Tt, - (--- (σ, .... + (---) 77 come from.

2 2 2 ··

The mean value of the amount of phase change within a symbol interval is for k> 2 in each case

In the known technical solutions, a coherent orthogonal demodulator is used in the receiver of the respective system, followed by sampling and processing of the sampled signals for the purpose of recovering the transmitted data sequence. The circuit for the signal processing of the samples depends on the pre-modulation circuit of the transmitter present in the system and thus on the CPM method actually implemented. In all these variants occurs in different graduations the disadvantage that the power density spectrum of the modulated carrier signal has too broad a spectral main lobe and / or the spectral components are suppressed outside of this main lobe too little, resulting in disturbances in the adjacent channel. In addition, depending on the implemented in the transmitter CPM method partially and especially when using a last-mentioned level converter in the receiver relatively complicated circuit engineering solutions for the signal processing circuit for the detection of the transmitted data sequence is necessary.

Object of the invention

The invention has for its object to provide a method and an arrangement for transmitting binary signals, which generates a modulated carrier signal on the transmitting side, which has a narrower spectral main lobe compared to those of known technical solutions and has less power in the frequency range outside this main spectral lobe. The circuit complexity for the realization of transmitter and receiver should not rise by the invention, and the other transmission properties mentioned above, which are desired by known systems, should be maintained.

Explanation of the essence of the invention

The object of the invention consists in the angular modulation of a carrier signal which corresponds to a binary signal sequence, wherein the power density spectrum of the carrier signal has a narrow main lobe and in whose Nebenspektralbereichen only lowest power components are included. The transmitted binary signal sequence is to be regenerated in the receiver. The spectral properties of the carrier signal can be achieved by smoothing the phase characteristic of the carrier signal by a corresponding modulation stage.

According to the invention, this object is achieved by subjecting the binary differential-coded pulse train to be transmitted to non-linear conversion so that each symbol of the converted multivalued pulse train is uniquely determined by χ successive symbols of the original pulse train. The assignment of the phase change to the symbols of the converted pulse train is such that the average value of the amount of phase change in a symbol interval

'I rad

with an average of the phase increase ΔΦ = _ -r-

4T

ΔΦ rad or zero and that the center frequency f ₀ and the spectral maximum by Af = --einandereinanderliegen.

The realization of the method is carried out by an arrangement consisting of a transmitter and a receiver. The transmitter is composed of a data source, a clock signal source, a differential encoding stage, a modulation stage with Vormodulationskreis and carrier oscillator and an output circuit. The receiver consists of an input circuit, an orthogonal coherent demodulation circuit with two synchronous demodulators and two low-pass filters, a differential decode signal processing circuit, a data sink, and a circuit for recovering the required reference carrier signals and the reference clock signal from the received modulated carrier signals. A particular feature of the transmitter is that the differential encoding stage and the pre-modulation circuit is realized by a summation circuit and a delay element with a delay of the bit duration T. This circuit is used to obtain a multivalued pulse train for driving a phase modulator. In this case, an input of the summing circuit and the input of the delay element to the output of the data source and a second input of the summing circuit is connected to the output of the delay element. A third input of the summing circuit is coupled to a voltage source independent of the data signal. The output of the summing circuit is connected to the input of the phase modulator.

The receiver is characterized in that the two outputs of the synchronous demodulators are connected to sampling circuits which are in phase with the reference clock

- are to control. The signal processing circuit consists of two threshold switches whose outputs are connected to the

Inputs of an equivalent circuit are connected, and a Differenzdekodierstufe. The input of the differential decoding stage is connected to the output of the equivalent or exclusive circuit. The outputs of the sampling circuits are connected to the inputs of the threshold value switches of the signal processing circuit. It is also possible to connect in the receiver, the two outputs of the synchronous demodulators to a respective zero crossing detector whose outputs are connected to the set and reset input of an RS flip-flop. The output of the RS flip-flop is coupled to the input of a trigger and its output is connected to a differential decode stage. The function of the arrangement is that of a data source, a synchronous, binary data sequence a (m) with the symbol clock frequency

- is delivered to the differential encoding stage, from whose output the difference-coded binary data sequence b (m) to the input

the modulation stage passes.

In the modulation stage, the binary data sequence b (m) first comes to the level converter of the Vormodulskreises. This forms by a non-linear operation from the sequence b (m) the trivalent sequence c (m), which comes to the input of a low-pass filter whose impulse response h (t) meets the 3rd Nyquist criterion. With the output signal of the low-pass filter, a carrier oscillator is driven, whose output signal

f (t) = Asin (co ₀ t the low pass output

c _m .h (t-mT) m

is angle modulated accordingly, d. h., it applies

r -

<P (t) = K- (V o _m -h (r-ml)) dr + cp.

; ^ -Ι m O

_c ^ m = -co

The output signal of the modulation stage f (t) is supplied via the output circuit which is used for eventual frequency conversion and power amplification, the transmission channel. In order to achieve a further smoothing of the phase characteristic as a means for achieving the desired spectral characteristics of the modulated carrier signal over known technical solutions, the level converter operates so that at its output a trivalent sequence c (m) with the property that the average value of Amount of phase change within a symbol interval for the modulated carrier signal

ΙΔΦ _η (πι) | = g rad +

ΙδφΙ

is, if fa Cp

wheel T

is the mean slope of the phase cp (t) of the carrier signal. For Δφ = 0, one obtains the value of the prior art values given immediately

4 lets compare.

In compliance with the condition imposed on the phase change within each symbol interval, the modulation stage can also be realized as a phase modulation stage. Such a modulation step corresponding to the nature of the invention leads to a substantially smoother phase characteristic of the modulated carrier compared with known technical solutions. The ones for the cases -

Δ ~ Φ = 0 and | ΔΦ | = -H rad

by the level converter to be executed non-linear operations result from the assignment in the following table 2. Table 2

η V ₂ I vi ^b m ΔΦ = , V JT rad ΔΦ_ (πι) η Δ? = - - rad a) 0 - 4 "" wheel 1 --V4 b) δ ¥ = + -ί O 2 + 1 + 1 + 1 -71 / 4 ₊ V4 O 3 -1 -1 - 1 O + 5T / 4 ο -π / 4 4 + 1 +1 -1 O O O -τι / 4 5 -1 + 1 +1 O O + V 4 -π / 4 6 -1 -1 + 1 O O + V4 -π / 4 7 + 1 -1 -1 + * / 4 O + 7T / 4 - ^ / 2 8th -1 + 1 -1 + Π / 4 -3Γ / 4 + V4 -V2 + 1 -1 +1 ya -a / 4 + V2 π / 4 + 7Γ / 4Τ + V2 O A9 _n (m) -JT / 4T π / 4 ^ ₀ O

This results in the following rules for the value of the phase change within a symbol interval Acp (m) as a function of the difference-coded data sequence b (m):

Cases Δ? = 0: ΔΦ (ΐη) = + f ^b _m _) (^ ^b _m _2 ⁺ "i ^b m '

Cases ΔΦ = ± «rad: ΔΦ (ΐη) = ~ ? ^b "J 4b _o + b. - ib ^,)

V ₁

By combining the differential encoding stage with the level converter of the Vormodulskreises a significant circuit simplification can be achieved. The trivalent sequence c (m) can be obtained by adding the original data sequence a (m) with the sequence a (m-1) delayed by the symbol duration T and a constant when a Δφ ^ O is to be realized.

In the receiver, the modulated signal is taken from the transmission channel via an input circuit, in it also takes place a possible gain and the conversion of the signal in the original frequency band. Thereafter, the signal is supplied to an orthogonal demodulation stage by passing to each one input of two product demodulators. Connected to the other two inputs of the product demodulators are the orthogonal reference carrier signals recovered from a corresponding circuit. The frequency of the recovered carrier signals has a value such that the output signals of the low-pass filters following the product demodulators can be described by the quadrature components sin ψ (ΐ) and cos ψ (ΐ), where

iji (t) = Δω _ο ΐ + φ (ΐ) holds. The value for Δω ₀ depends on the operation actually realized in the premodulation circuit in the conversion of the sequence b (m) into the sequence c (m), in such a way that in the receiver ψ (ί) in each case a mean increase of

Δψ = H - rad or Δψ = - rad and the same assignment between the consecutive data symbols

b _m - 2. t> m -1, b _m and the corresponding associated phase change within the symbol interval Δψ _η (ηι) is valid as for the cases shown in Table 2 of the modulation with

TT TT

rad or Δφ = rad. The level converters used in the receiver for the transmitters to be implemented in the receiver

4T

Values for Δω ₀ are listed in Table 2. The output signals of the two low-pass filter arrive either directly or via a sampling circuit to the inputs of a signal processing circuit and to the inputs of a circuit for recovering a reference clock signal of the frequency 1 / T, with which the sampling circuits and the signal processing circuit are controlled.

Upon prior sampling of the low-pass signals at the time (m + ¹ A) T _{(in the} signal processing circuit a threshold value decision of the sampled signals and the further logical combination of the two resulting binary data sequences si (m) and co (m) with a symbol repetition frequency of 1 / T to the output data sequence b '{m), which comes to the input of the differential decoding circuit, which outputs as output the recovered binary data sequence a' (m) to the data sink. If the two low-pass signals arrive directly at the signal processing circuit, the times of the polarity change of the signal voltage of the respective low-pass signal are detected in each of the signals by a respective zero-crossing detector. A downstream flip-flop adopts a binary state at a zero crossing in the in-phase channel and the other binary state at a zero crossing in the quadrature channel. A clock controlled by the reference clock, which is connected to the output of the flip-flop, outputs the output data sequence b "(m) with the symbol repetition frequency 1 / T to the input of the differential decoding circuit, which as output the recovered binary data sequence a" (m) to the Data sink releases.

embodiments

The invention will be explained in more detail below with reference to some embodiments. In the accompanying drawings show

FIG. 1: Circuit arrangement for binary information transmission with the aid of an angle-modulated carrier more constant

FIG. 2 shows a functional block diagram of a frequency modulation stage according to the invention for the

Circuit arrangement according to FIG. 1 FIG. 3: Functional block diagram of a phase modulation stage according to the invention for the circuit arrangement according to FIG. 1

Figure 4: Block diagrams of level converters according to the invention Figure 5: Time diagrams of the phase curve cp (t) of the modulated carrier signal according to the invention a Phase curve φ (t) using a level converter which leads to an average increase of the phase of π rad _T -

b phase curve φ (ί) when using a level converter, which leads to a mean increase in the phase of

η rad ....

 --leads

FIG. 6 shows time diagrams of the phase curve <p (t) of a modulated carrier signal, the average increase of the phase being 0

Phase characteristic of a modulated carrier signal according to the invention. Phase characteristic of a carrier signal modulated in accordance with MSK. Phase characteristic of a corresponding TFM modulated carrier signal. D Phase characteristic of a modulated carrier signal according to the invention

FIG. 7 shows a block diagram of an orthogonal modulation stage for a method according to the invention for the transmission of digital information

FIG. 8: Block diagram of a reference carrier recovery circuit

FIG. 9: Time courses of signals within a circuit arrangement according to the invention a time profile of the data signal a (m) b to be transmitted time curve of the difference-coded data signal b (m)

c time course of the first low-pass signal at the output of the orthogonal demodulation stage d time course of the second low-pass signal at the output of the orthogonal demodulation stage e time course of the sampled first low-pass signal after the threshold decision f time course of the sampled second low-pass signal after the threshold decision g time course of the signal generated after the combination of the two sampled low-pass signals h time course of the regenerated transmitted digital signal

i Time history of the output signal of the zero-crossing detector for the first low-pass signal k Time characteristic of the output signal of the zero-crossing detector for the second low-pass signal I Time course of the flip-flop output signal m set on the basis of the zero-crossings in the low-pass signals m Time characteristic of the regenerated differential-encoded data sequence

Figure 10 is a block diagram of a signal processing circuit for the receiver of a circuit arrangement according to the invention with prior sampling of the low-pass signals

11 shows a block diagram of a signal processing circuit for the receiver of a circuit arrangement according to the invention without prior sampling of the low-pass signals

FIG. 12: Block diagram of a signal processing circuit for producing the quadrature components sirvp (t) and cos ^ ft) according to the method according to the invention

Generally, there is an arrangement for transmitting binary information from a transmitter 1 and a receiver 2, as shown in Figure 1.

In the transmitter 1, the data output from a data source 3 passes to a differential encoding stage 5, which is required for simplified recovery of the reference carrier signals in the receiver 2, the data signal source 3 and the 'Differenzkodierstufe 5 are synchronized by the Taktsignalquejle 4. The differential encoding stage 5 is followed by the modulation stage 6 with carrier oscillator 7 contained therein for generating an angle-modulated constant-amplitude carrier signal which experiences its power amplification and conversion into the desired frequency band in the output circuit 8.

In the receiver 2, the input circuit 9 extracts the modulated signal from the transmission channel to amplify it, if necessary, and convert it to the original frequency band.

The output of the input circuit 9 then passes to the respective first input of the synchronous demodulators 11/12 of the orthogonal demodulation circuit 10 and to the reference carrier recovery circuit 19. The two outputs of the reference carrier recovery circuit 19 are reversed

2 wheel out of phase with each other and get to the respective second inputs of the Synch ro ndemodulatoren 11/12, which join the low-pass filter 13/14.

From the output signals of the low-pass filters 13/14, the reference clock signals required for controlling the sampling circuits 15/16 and the signal processing circuit 17 are derived in the reference clock regeneration 20. Depending on the signal processing circuit used, the output signals of the low-pass filters 13/14 are either sampled by the sampling circuits 15/16 and their output signals are given to the signal processing circuit 17 or they directly form the input signals of the signal processing circuit 17, which in each case regenerates the transmitted data sequence from its input signals. The regenerated binary data sequence passes from the output of the signal processing circuit 17 to the input of the data sink 18. A modulation stage 6 according to the invention can be constructed as shown in FIG. 2 by connecting a premodulation circuit 21 and an ideal frequency modulator as a voltage-controlled carrier oscillator 7 one after the other , The data signal having a symbol duration T reaching the input of the premodulation circuit 21 is differentially coded and of bipolar, binary form. First, in a non-linear level converter 22, it is converted into a trivalent data sequence such that the mean value of the amount of phase change within a symbol interval for the modulated carrier signal at the output of the modulation stage 6

& Ψ U) I = ϊ rad + ' * ^Τ stating, if

Δφ is the mean slope of the phase cp (t) of the carrier signal over time. The output of the level converter 22nd

is connected to the input of a low-pass filter 23 whose impulse response satisfies the 3rd Nyquist criterion. In the case of the narrowest possible bandwidth, the low-pass filter 23 has the transfer function Η (ω) corresponding to the selected pulse shape of the data symbols present at the input of the low-pass filter 23:

.7t

o ', lM> f.

In general, the transfer function Η '(ω) for the low-pass filter 23 can be given as product of the transfer function Η (ω) for a minimum bandwidth and a transfer function Ν (ω) whose impulse response corresponds to the 1st Nyquist criterion:

Η '(ω) = Η (ω) · Ν (ω).

Generally, for Ν (ω), a class of transfer characteristics known as Racos characteristics is used (Racos = raised cosine in English).

The output signal of the Vormodulationskreises 21 serves as a control signal for the carrier oscillator 7, which operates as an ideal frequency modulator, and for the still to be explained examples of the level converter 22, a gain constant of

π radians K = - r -'- r; should own.

The phase (p (t) of the modulated carrier signal at the output of the modulation stage 6 is proportional to the integral of the input voltage v (t) of the frequency modulator operating oscillator 7, so that applies

U + 1) T

ASPCm) = <P ((m + 1) T) - Φ (πιΤ) = K / v (t) dt

mT

If w (t) is the output voltage of the non-linear level converter 22, the condition imposed on the impulse response of the low-pass filter 23 still holds

) = K / v (.t) dt = K / w (t) dt = | «C _m rad. , (mT) (mT) - '-

w (t) describes the time function of the trivalent data sequence c (m) at the output of the level converter 22, c _m is the significance of the data symbol in the time interval mT <t <(m + 1) T.

Equally, a modulation stage 6 corresponding to the invention can function as a phase modulator (see FIG. 3), the premodulation circuit 21 consisting of the successive connection of a non-linear level converter 22 in the sense of the invention and a low-pass filter 24 whose impulse response satisfies the 1st Nyquist criterion. The output signal of the pre-modulation circuit 21 reaches the input of an ideal phase modulator 25 with the amplification factor

4 ~ ν - wherein the phase modulator 25 includes a carrier oscillator 7 with a constant frequency. The phase of the output signal of the modulation stage 6 according to FIG. 3 has the same properties as that of the output signal of the modulation stage according to FIG. 2.

In the following, embodiments for the realization of a level converter 22 of the invention will be explained accordingly. The different level converters 22 differ in their non-linear operation with respect to the bipolar data sequence b (m) applied to their input. In accordance with a specific data sequence b (m), a specific trivalent data sequence c (m) is produced at the output of the level converter 22 and thus at the output of the modulation stage 6 a modulated carrier signal with properties with respect to the phase curve cp (t) corresponding to the realized nonlinear operation

 A non-linear operation

Cm = b _m _ ι (+ b _m -1 -) executing circuit arrangement is shown in Figure 4a. By

Summary of the nonlinear formation protocol for the trivalent data sequence c (m) from the bipolar data sequence b (m) with the formation specification of the difference coding for the data sequence b (m) from the data sequence a (m) to be transmitted

b _m = -a _m -b _m _ ₁ a _m , b _m e {+ 1, -1}

can the data sequence c (m) directly from the data sequence a (m) after, 11

C _m = 1 + -a _m + - Bm-J ₁

be derived. As a result, the circuit complexity over known solutions can be significantly reduced. An input of a summation circuit 27 is connected directly to the input for the data signal a _m , the other via a delay element 26 with the symbol duration T; At a third input a constant positive voltage is applied. In addition, the summing circuit takes over the evaluation of the signals with the factor V2.

For the assignment of the symbols c _m and the phase difference of the modulated signal Δφ (ιη) thereby generated in a symbol interval to the data symbols a _m and a _m _ , Table 3 applies.

Table 3

a _m -i a _m Cm Δφ (ιη) 1 1 2 + Π / 2 1 -1 1 + Π / 4 1 1 1 + Π / 4 -1 -1 0 0

The phase curve cp (t) of the modulated signal is shown for an exemplary data sequence a (m) in FIG. 5a. The mean time increase of the phase amounts to this education regulation

-. - π radians Δφ = -

4 τ, the mean value of the amount of phase difference per symbol duration T is rad. The power density spectrum of the modulated signal has its maximum at the frequency

fm = f0 + - zr and is symmetric to f _kl . The carrier frequency ^ must therefore be smaller than the channel center frequency

8T 8T

to get voted. .

A maximum of the power density spectrum at f _k2 = f ₀ --- arises when the signal c (m) generated according to FIG. 4a negates

8T

becomes. Then the signs for the c _m and Δφ (ητι) in Table 3 are reversed.

FIG. 5 b shows the phase characteristic for the selected example. Is the non-linear formation rule for the trivalent data sequence c (m)

c _m = - b _m _ 1 (b _m 2 + b _m )

summarized with the education specification of differential coding, the data sequence c (m) according to the equation Cm = + - (a _m + a _m _,)

can be determined directly from the data sequence a (m). A corresponding arrangement of a summation circuit 27 with a delay element 26 is shown in FIG. 4b. It differs from Figure 4a only in that no constant voltage is applied to the third input of the summing, ie, the input can be omitted. Table 4 applies to the assignment of the symbols c _m and the phase difference of the modulated signal Acp (m) to the data symbols a _m -ι and a _m thereby produced in a symbol interval.

Table 4

8m-1 a _m Cm Δφ (ιη) 1 1 + 1 + Π / 4 1 -1 0 0 - -1 1 0 0 * -1 -1 -π / 4

The phase characteristic cp (t) of the modulated signal is shown for an exemplary data sequence a (m) in FIG. 6a. The mean time increase of the phase is Δφ = 0, which is the average of the amount of phase difference per symbol duration T in this education specification

- rad. The power density spectrum of the modulated signal has its maximum at the carrier frequency und and is symmetrical.

In order to illustrate the much more smooth phase progression compared to known technical solutions, the phase characteristic of an MSK is shown in FIG. 6b and a TFM for the selected example in FIG. 6c. Is the non-linear formation rule for the trivalent data sequence c (m)

c _m = - b _m -! (b _m _ 2 + b _m )

summarized with the education specification of differential coding, the data sequence c (m) according to the equation Cm = - - (a _m + a _m -1)

The signal c (m) in Figure 4b can be inverted by inverting the input symbol sequence a (m) or the output symbol sequence c (m) or by using inverting inputs of the summation circuit. For a data sequence a (m) selected as an example, a phase characteristic according to FIG. 6d is produced for the modulated signal. In order to achieve the spectral characteristics of the modulated carrier signal corresponding to the object of the invention, in the realization of the modulation stages 6 according to FIGS. 2 and 3 it is necessary that the level values of the data sequence c (m) at the output of the level converter 21, the modulation slope of the corresponding Modulation stage and the frequency of the carrier oscillator exactly their prescribed values. Therefore, the practical realization of a modulation stage 6 as an orthogonal modulation stage according to FIG. 7 can be simpler for a data transmission system according to the invention, whereby the small amplitude fluctuations associated therewith are negligibly small in practice and depend on the accuracy of the signal generation in the signal processing circuit 28. The great advantage of this variant is the digital implementation of the signal processing circuit 28 and the use of a quartz-stable oscillator as a carrier oscillator 7. In accordance with a difference-encoded data sequence b (m) reaching its input, the signal processing circuit 28 generates the two quadrature components sinip (t) and cosi E ( t) in sampled form, where cp (t) is the desired phase of the modulated output signal of the modulation stage 6. The sampled quadrature signal cos <p (t) passes via the smoothing low-pass filter 29 to an input of the product demodulator 31, as well as the sampled quadrature sin cp (t) passes through the smoothing low-pass filter 3Ό to an input of the product modulator 32nd In the product modulators 31st 32, the corresponding quadrature components are multiplied by carrier signals of the desired carrier frequency f _o , ie in the product modulator 31 with sin (co ₀ t) and in the product modulator 32 with cos (ω _ο ΐ). The summer 33 adds the analog output signals of the product modulators 31, 32, whereby the output signal of the modulation stage 6

f (t) = A [cos cp (t) * sin (w _o t) + sincp (t) cos ( _o ) _o t)] f (t) = Asin [j _o t + i? (t)]

arises, which has the desired, according to the invention phase curve ep (t). In this case, the signal processing circuit 28 in the practical implementation of the respective desired phase profile (see Figure 5, Figure 6a, d) to adapt. A specific section of L data symbols from the data sequence b (m) is uniquely assignable to a sequence of (L-2) data symbols of the trivalent data sequence c (m), and this in turn is a clear progression of the phase tp (t) within the symbol interval I s mT <t <(m + 1) T for a given transfer function Η (ω) of the low-pass filter 23 when its impulse response h (t) is limited to (L-2) symbol intervals and the value of the phase cp (mT) is known , For the derivation of the quadrature components coscp (t) and sincp (t), it is sufficient if the value of cp (t) modulo 2 π is available.

The signal processing circuit 28 may be structurally similar to an orthogonal TFM modulation stage and is shown in more detail in FIG. In the memories (e.g., ROM's) 51,52, symbol-interval-wise all possible phase traces for one of the inventive rules for level conversion c [b (m)] are stored in the form of Q samples for each quadrature component per symbol duration T. The read-out samples are in each case supplied to the D / A converters 53, 54, at whose outputs the quadrature components sin <p (t) and cos φ (ΐ) are available in sampled form. The first part of the address necessary for driving the memory is formed by a limited number L of data symbols of the sequence a (m) or b (m), which is read serially into a shift register 46 and is available at its parallel output. The shift register 46 is driven by the symbol clock frequency

Clocked by a frequency divider 48 provided by a clock signal source 47 having the frequency

- is controlled. The clock signal source 47 also controls the sample counter 50 (modulo Q counter) whose

Output signal forms the low-order address part. The third address part forms the output of the quadrant counter 49 (modulo-4 counter), by the clock signal

1 *

Is clocked and its state y _m as a function of the mean in the shift register 46 stored

Data symbols of the sequence b (m) or a (m) and changes depending on the state in the previous symbol interval

 Particularly advantageously, this signal processing circuit 28 for realizing phase curves according to Fig.5a, b realize, resulting from a level conversion according to Table 3 and Table 3 with sign changes in the last two columns, because then the quadrant counter 49 according to the invention a simple Vörwärtszähler or or is a simple backward counter. According to the invention, the quadrant counter can be described by the following state tables:

Table 5 (corresponds to phase curve according to FIG. 5a or level conversion according to Table 3)

+ 1 1

-1 ym

Table 6 (corresponds to the phase course according to FIG. 5 b)

+ 1 -1 + Yir

-1 ym

Table 7 (corresponds to phase curve according to FIG. 5 or level conversion according to table 3)

bm-1 bm Ym ₊ I + 1 + 1 Ym + 1 -1 1 + Ym -1 + 1 1 + Ym -1 -1 Ym

Table 8 (corresponds to phase progression according to FIG. 5b)

bm-1 bm Ym ₊ I + 1 + 1 Ym • +1 -1 -1 + Yn, <t + 1 -1 + Ym -1 1 Ym

The entire address control ensures the reading of samples for the two quadrature components that correspond to a phase characteristic according to the invention. While the address parts formed by the quadrant counter 49 and the shift register 46 can change their value assignment at the earliest depending on the expiration of a symbol duration, the changes

by the sample counter 50 generated least significant address part with the clock frequency -.

Further possibilities for the realization of the signal processing circuit 28 include the use of a computer for generating the digital samples which form the input signals of the D / A converters 53/54 or using a signal processor as a complete signal processing circuit 28 for generating the analog samples as its output signals.

In the transmission of a modulated carrier signal according to the invention in the receiver 2 (see Figure 1) in orthogonal demodulation the received and processed in the input circuit 9 modulated carrier signal in the synchronous demodulators 11,12 with each other

- Rad phased reference carrier signals of frequency ωό are multiplied, so that at the output of the

orthogonal demodulation circuit 10, the low-pass signals sin \\> (t) and cos ψ (ί) arise, wherein between the successive symbols b _m _ ₂ , b _m - -ι, b _m reaching in the transmitter to the input of the modulation stage data sequence b ( m) and the phase difference Δψ (ηη) of the low-pass signals in the receiver in the interval mT S t <(m + 1) Tim undisturbed case one of the two possible assignments according to Table 9 applies.

Table 9

^bm -1 ^b m  st. JL AV (m) in rad V ₂ +1 + 1 O wheel AV = - - ^ rad +1 -1 -1 O O -1 + 1 -1 + ff / 4 O + 1 + 1 +1 + τι / 4 - π / Α -1 -1 + 1 + VA - VA -1 -1 -1 + Va - π / '4 +1 +1 -1 + 7Γ / 2 - Jr / 4 ' -1 -1 +1 + Tr / 2 - 7Γ / 2 +1 - * / 2

If one sets ωό = ω ₀ + Δω ₀ , where ω _{ο is} the angular frequency of the carrier oscillator 7, then dependent on the phase curves q> (t) realized with the level transducers 22 according to FIG. 4 a-b (see FIG. or, depending on the educational instructions given in Tables 3 and 4, the following values for Δω ₀ :

Table 10

No. Educational specification fd Datensymb. c _m Example of level converter Example for cp (t) Δω ₀ ωό 1 s.Tabelle3 Figur4a Fig. 5 a 0 ω ₀ 2 s. Tab. 3, values fc _m negated Figure 4 a Fig. 5 b 0 ω ₀ 3 s.Tabelle4 Figur4b Fig. 6 a -π / aT ω ₀ - π / aT 4 s. Tab. 4, values f · _{m m} negated Figur4b Fig.6d + π / 4Τ ω ₀ + π / 4Τ

The extraction of the reference carrier signal of the frequency ωό from the modulated carrier signal converted into the original frequency band is realized in the reference carrier recovery circuit 19, which in each of the named cases can be realized e.g. B. be realized by means of a Costas loop, 8 in the two cases according to Table 3 with circuit 19 of FIG It passes the modulated input signal from the ice Eingangskr 9 of the receiver 2 via the above Potenzierkreis 34, he d 4th Potenzjjes_ modulated input signal forms, to the input of the phase-locked loop 35, which engages the spectral line contained in the peaked signal at the frequency 4ω ₀ . After the frequency division in the ratio 1: 4 by the frequency divider 36 and subsequent phase rotation to

- Rad in the phase shifter 37 are the two required reference carrier signals at the output of the frequency divider 36 and

of the phase shifter 37 available. The further evaluation of the low-pass signals sin ψ (ΐ) and cos ψ (ί) with the aim of regenerating the transmitted data sequence is possible in a data transmission system according to the invention by means of two fundamentally different circuit arrangements.

1st variant

Prior to further processing in the signal processing circuit 17 in Figure 1, the low-pass signals sin ijj (t) and cos ip (t) are sampled by the sampling circuits 15,16, wherein in a data transmission system according to the invention only a reference clock signal of the frequency

- is necessary and the sampling of both signals simultaneously at the time t _A (m) = (m + -) Tfür the symbol interval

mT <t <(m + 1) T. The time points for the beginning of a symbol duration are derived from the times of the zero crossings in the low-pass signals sinijj (t) and cosi} j (t), as in known systems. The time courses for the two low-pass signals are, for example, for the assignment according to Table 9, in which ψ (ί) a mean increase of

-JJ- _ j7_ _rad_ _aufweistj j _{n Ur} Figure 9 _{C (shown} <j corresponding to given in Figure 5. Example of a data sequence a (m). 4 T

If one replaces c (ΐ) in FIG. 5 a cp (t), the corresponding course of the phase t | / (t) of the low-pass signals in the receiver 2 is shown. After the sampling of the low-pass signals sin ijj (t) and cosiji (t) in the sampling circuits 15, 16, both signals "arrive as inputs to the signal processing circuit 17.

The signal processing circuit 17 according to this variant can be implemented extremely simply for a data transmission system according to the invention as shown in FIG. 10. By means of the two threshold value switches 38, 39, the changes between positive and negative sampled voltage values in the two input signals of the signal processing circuit 17 are detected and the binary, n data signals si (m) and co (m) are formed therefrom. The time courses of the two sampled low-pass signals after the threshold value decision are shown in FIGS. 9 e and f. An antivalence circuit 40 outputs the binary data sequence b '(m), which is produced by antivalence combination of the data signals si (m) and co (rn), to the input of the differential encoding stage 41 output modify the regenerated transmitted data sequence a' (m) of the symbol duration T arises, which is output as output signal of the signal processing circuit 17 to the data sink 18. FIG. 9g shows the binary data sequence at the output of the antivalence circuit 40 and FIG. 9h the regenerated binary transmitted data sequence a '(m) which is opposite the data sequence a (m) at the input of the differential encoding stage 5 of the transmitter 1 of a data transmission system according to the invention by the time duration

- T is delayed.

2nd variant

The low-pass signals directly form the input signals of the signal processing circuit 17. The signal processing circuit 17 regenerates the transmitted data sequence on the basis of occurring zero crossings (polarity change of the signal voltages) in the low-pass signals. For this purpose, a low-pass signal sin 4i (t) arrives at the input of the zero-crossing detector 42 in FIG. 11 and the other low-pass signal at the input of the zero-crossing detector 43. The output signals of the zero-crossing detectors 42, 43 are short pulses N _s (t) and N _c ( t) at the time of each zero crossing in the associated low-pass signal. The output of one of the zero-crossing detectors 42,43 is connected to the set input, the output of the other of the zero-crossing detectors 42,43 to the reset input of a flip-flop 44 whose output is connected to the data input of a trigger 45 by the reference clock

- is controlled. In each case, the state of the signal at the data input of the trigger 45 at the time

t _A (m) = (m + -) T is taken by the reference clock edge to the output of the trigger 45, where the binary data sequence b "(m) of the symbol repetition frequency ·

- arises. The output of the trigger 45 is connected to the input of the differential decoding stage 41, at whose output the

regenerated transmitted data sequence a "(m) of the symbol duration T is produced, which is output as output signal of the signal processing circuit 17 to the data sink 18. The time profiles for signals within this signal processing circuit 17 are shown in FIGS. 9 (h'-m).

Claims (4)

1. A method for transmitting digital information over a band-limited radio channel by modulation of differential-coded data signals by means of a modulation method with constant amplitude, continuous phase and a concentrated on a narrow frequency band spectrum on a carrier signal of the center frequency f ₀ , characterized in that the binary, to is subjected to a non - linear conversion transformed differential - coded pulse train in such a way that each symbol of the converted multivalued pulse train is uniquely determined by χ successive symbols of the original pulse train, the assignment of the phase change to the symbols of the converted pulse train is such that the average value of the magnitude of the Phase change in a symbol interval T with an average of the phase increase rad.
or is zero and that the center frequency f ₀ and the spectral maximum um " 2.7t apart. 2. Arrangement for transmitting digital information over a band-limited radio channel by modulation of differential-coded data signals by means of a modulation method with constant amplitude, continuous phase and a concentrated on a narrow frequency band spectrum on a carrier signal of the center frequency f ₀ , consisting of a transmitter, the a receiver consisting of an input circuit, an orthogonal coherent demodulation circuit having two synchronous demodulators and two low-pass filters, a signal processing circuit having a differential decoding circuit, a data sink, and a data source, a clock signal source, a differential encoding stage, a pre-modulation circuit and carrier oscillator; a circuit for recovering the required reference carrier signals and the reference clock signal from the received modulated carrier signals is constructed, characterized in that the transmitter's differential encoding stage and pre-modulation circuit for obtaining a multivalued pulse train for driving a phase modulator, comprising a summing circuit and a delay element with a bit-by-bit delay, one input of the summing circuit and the input of the delay element to the output of the data source, a second input of the data source Summing circuit is connected to the output of the delay element and a third input of the summing circuit is connected to a voltage independent of the data signal source and the output of the summing circuit is connected to the input of the phase modulator. 3. Arrangement according to claim 2, characterized in that in the receiver dasie outputs of the synchronous demodulators are connected to sampling circuits which are to be controlled in phase with the reference clock _L, the signal processing circuit of two threshold switches, the outputs of which are connected to the inputs of an equivalence or anti-aliasing circuit and a differential decoding stage whose input is connected to the output of the equivalent or exclusive circuit, and in that the outputs of the sampling circuits are connected to the inputs of the threshold switches of the signal processing circuit. 4. The arrangement according to claim 2, characterized in that in the receiver, the two outputs of the synchronous demodulators are connected to a respective zero crossing detector whose outputs are connected to the set and reset input of an RS flip-flop, the output of the RS flip-flop with the input of a Trigger coupled and whose output is connected to a Differenzdekodierstufe. For this 7 pages drawings