DD229520A1 - CIRCUIT ARRANGEMENT FOR OPERATING CONSUMERS TO FULL FACTORS DIFFERENT CHANGE VOLTAGE AMPLITUDE - Google Patents

Abstract

The invention aims to avoid network load due to asymmetries and Abhaengigkeiten of mains frequency fluctuations. It is solved the task to keep the applied to the consumer effective RMS value at different mains AC voltages and thus to allow the operation of different integer factors AC voltages without manual switching. The solution is based on the principle of wave packet control. The relevant ignition pulses for a triac are controlled as a function of the mains voltage in their time sequence, wherein the control is digital. The invention is applicable to electrical devices, in particular heaters, whose use is provided in countries with different mains voltages. Fig. 1

Description

Title of the invention;

Circuit arrangement for operating consumers at alternating voltage amplitudes different from integral factors. ·

Field of application of the invention

The invention relates to the field of automatic switching of alternating current voltages of different amplitudes, in particular the automatic adaptation of mains voltage amplitudes, which are different by an integer factor, to a power converter, for example an electric heating element.

Characteristic of the known technical. solutions

Circuit arrangements for automatic adaptation of Ver. Users of different supply voltages are known. The need for such circuits is always present when electrical equipment is produced for countries where different mains voltages occur, thus eliminating manual switching. The manual switching on the one hand represents a danger to the device, because the operation of the switch can be forgotten out of carelessness.

On the other hand, the compulsion to observe the correct switch position is a reduction in utility.

O λ / ι. ς Λ /,

A circuit arrangement for automatic voltage switching between 125 V and 220 V by phase gating was in the journal "elektrotechnik", Jg. 65, Issue 17 of September 9, 1983, pages 62 to 63 described. The power converter, a universal motor, is designed for the lower mains voltage, ie for 125 V, in that the field windings are connected in parallel. In series with the motor is a triac whose gate is connected to the output of a phase control module. The phase control module realizes a firing angle of the triac of 20 ° at 125 V mains voltage and at 220 V mains voltage of about 105 °. The control variable for the phase angle is derived from the rectified divided down mains voltage half-wave which is supplied to a comparator _o The phase control block provides internally a reference voltage used for self-generated by means of a sawtooth generator in dependence on the mains frequency.

A disadvantage of the solution described is that occur due to the phase angle of the mains voltage network loads inform of asymmetries. Another disadvantage arises from the way of providing the reference voltage. By using a sawtooth generator, the circuitry becomes dependent on the grid frequency that controls the sawtooth generator. However, since the mains frequency can change as a function of the network load, the reference voltage is detuned at the comparator, so that distortions of the ignition angle can occur and the power converter is operated mit-, unsuitable mains voltage RMS. Overloading and subsequent destruction of the power converter can not be ruled out.

Since in some countries except the RMS value and the nominal frequency of the mains voltage is non-uniform, for example, networks are known with 60Hz nominal frequency, the external wiring of the sawtooth generator of the desired nominal frequency must be adaptable. Otherwise the solution described would not be

universally applicable.

Object of the invention

The invention has the aim of consumers to operate on an integer Paktor different AC mains amplitudes while avoiding Hetzbelastungen inform of Unsymmetrieη and independent of mains frequency fluctuations.

Exposition of the nature of the invention;

It is an object of the invention to keep the Leistungsaeffektivwert to a consumer according to the principle of wave packet control independent of the applied voltage constant and thus operate the consumer to different by an integer factor AC voltage amplitudes without manual switching.

The object of the invention is achieved in that the consumer is designed for the lower voltage, and connected in series with a triac to the AC voltage terminals and a voltage detector circuit which evaluates the applied Hetzspannung in the rectified state, is provided. The control electrode of the triac is connected to the output of a gate circuit, which is connected on the input side to a NuIlspannungsschalter and has a control input to which the output of a digital control logic and the output of the voltage detection circuit abut.

A erfindungswesentljches feature continues to be the structure of the control logic. The control logic consists of the series connection of a connected to the rectified Hetzspannung trigger, a frequency divider with the

Dividing ratio f: f = 1: η and a linking network.

An essential embodiment of the invention consists in that the output of the voltage detector circuit by means of a switch, preferably a transistor, determines the output potential of the control logic.

By ODSR connection to the gate, it is possible to use other parameters such as the temperature for control.

First, the operation of the invention will be explained when connected to a lower mains voltage. The Spannungsdetektorschältung does not respond in this Pail, so that the output side switch is closed, d. H. the switching transistor is conductive. The trigger forms from the unilaterally rectified rush voltage a rectangular pulse train whose duty cycle is asymmetrical. The high level lasts about 0.6 T, the low level corresponding to 0.4 T of a mains voltage oscillation. The frequency divider reduces the frequency of the rectangular pulse sequence with respect to the frequency of the square-wave shaped by the trigger.

pulse sequence in the ratio η: 1.

In this ratio, the output pulse train of the trigger is counted out by the logic network and each of the high levels is blanked and negated. However, the switch of the voltage detector circuit derives the control pulses, so that the control input of the gate circuit is activated and thereby the gate is opened .ist. Thus, the voltage applied to the input of the gate, from. pass the gate circuit from the zero crossings of the AC / DC voltage, and ignite the triac in each zero crossing of the mains AC voltage. Dadurch'fällt the entire supply voltage to the load _2, and the converted power is given to him - \ _e f £ - ^u j _e ff

If the circuit arrangement is connected to a higher mains voltage, the voltage detector circuit responds. The output side switch is opened, d. H. the

Switching transistor locks. The control pulses generated analogously to the operation at the lower mains voltage are not dissipated and thus act on the control input of the gate circuit The blanked and negated output pulses of the trigger activate the gate circuit in such a way that the CLOSE pulses with a duty cycle

t. + t em off

the gate can pass or be blocked. According to this duty cycle of the ignition pulses, the triac reacts and a power "is converted at the consumer,

ρ which results ^? 2eff ^{= V} I! * ^Over 2 eff ' ^bz ' ^{w #}

= I ₂ IT ' ^U 1eff ² R ⁼ ~ ^P 2eff ^P 2eff ^U 2eff R _ _l_ ^U 1eff it turns out that ^P 1eff Since η =

An advantage of the circuit arrangement according to the invention is that both for the ignition pulses and for. the control pulses Synchroni tat is given because for both pulse trains the Ketzfrequenz contains the time standard. In the event of changes in the mains frequency, the synchronizing action is retained, so that there are no distortions of the converted power.The application of the principle of wave packet control means that unburdening loads due to asymmetries are excluded.

Exemplary embodiment

The invention will be explained with reference to a drawing inform 'a preferred embodiment closer *.

The drawing shows in

Pig. 1 is a block diagram of a device according to the invention

Circuitry; ,

_. Fig. 2 is an illustration of a voltage detector circuit;

3 is an illustration of a control logic; Pig. 4 voltage curves for the documentation of the mode of action 'of the circuit according to the invention'. arrangement.

Pig. 1 shows an AC circuit with a series connection of a load V, which is designed as an electric heating element and a triac TR, which is connected to a weohs voltage source Q.

Also directly connected to the AC voltage source 'Q is a Uullspannungsschalter Έ , whose output is fed to a gate T, which in turn is connected to the output side of the gate of the triac TR. The gate circuit T has a control input to which the outputs of a control logic SL and a voltage detection circuit D are connected *. The inputs of both the control logic SL and the voltage detector circuit D are connected to the AC voltage source Q via rectifiers, not shown.

In Pig. 2, the voltage detector circuit D as embodied in the preferred embodiment is shown. The voltage detector circuit D includes the series connection of a Zener diode DZ and a first resistor DRT. The cathode of the Zener diode DZ is located at the positive pole of. the voltage detector circuit D applied and obtained from the Uetzwechselspannung by rectification DC voltage.

Connected to the first resistor DR1 is the base of a switching transistor DT whose collector is connected across the second

Resistor DR2 with the positive and desseü emitter connected to the negative pole of the DC voltage. To the collector of the switching transistor DT, the base of the switching transistor S is further performed, the emitter is at the negative pole of the DC voltage. The collector of the switching transistor S represents the output of the voltage detecting circuit D. The voltage detecting circuit D is dimensioned to discriminate the voltage rms values 220 V and 110 7.

Pig. 3 illustrates the preferred embodiment of the control logic SL '. The control logic SL is designed so that a ratio of higher to lower voltage of 2: 1 is taken into account »'The control logic SL corresponds in principle to a series connection of the functional units trigger SLTR,! Frequency divider SLP and link network SLV. , ,

The trigger SLTR consists of the series connection of two inverters, whereby HAKD gates with parallel-connected inputs are used. The input of the trigger SLTR is connected to the negative pole of a negative pulsating DC voltage obtained from the Hetzwechselspannung. On the output side, the trigger SLTR is connected to the clock input of a first JK-Plip-Flops whose direct output is routed to the clock input of a second JK-Plip-Plop. Together, the JK-Plip-Plops represent the frequency divider SLP whose divider ratio f _a : f _e = 1 '* 4. The direct output of the second JK-Plip-Plops as well as the direct output of the first JK-Plip-Plops- and the output of the trigger SLTR is connected to one input of the logic network SLV. As a link network SLV is a HAHD gate with three inputs, whose output forms the output of the control logic SL.

The one in Pig. 4 voltage curves are qualitative

to understand as punctions of the time. It means

1. 2 · U U Il Il f- CM ^u eSLTR ^ 3 . Ü4 - Third U 3 = ^u aSLTR ^ 4th U 4 = ^u a1SLP ^ 5th U 5 = ^u a2SLF ^(t) e, 7 »8o U U U 6 =. 72 = 82 = ^u aSL ^(t) = ^{U u} aT 2 W u _V2 (t) 9. 10. U 'U 71 = 81 = u _vl (t)

= Mains voltage

= "Input voltage trigger

= Output voltage trigger · · '.

= Output voltage

1. Flip-plop

= Output voltage

2nd flip-flop

= Control pulse train

= Ignition impulse at 220V

= Voltage at the consumer at 220V

= Ignition pulse sequence at 110V

= Voltage at the consumer at " ViO V

The operation of the preferred embodiment of the invention is advantageous from the voltage curves shown in FIG

ueryor.

Is the ¹ riding attitude of consumer V and triac TR to the higher Uetz weehselspannung, so on Ü2 _e; f: f = 220 ^ ^at S ^e ~ connected, the voltage waveforms U1, U2, U3, U4, U5, V6, U72 and U82 are effective because the voltage detector circuit D is responsive and thus the switch S is opened. As a result, the control pulses U6 can influence the ignition pulse sequence U72 in the manner shown.

On the other hand, if the AC voltage source Q supplies a mains voltage of U _{1 f} = 110 V, the switching transistor S controls the voltage detector circuit D. The control pulse sequence U6 is not effective on the gate circuit T, so that as relevant voltage curves U1, U71 and U81 are to be valued, since the derivative of the control pulse train U6 means of the switch S synonymous with a permanent activation of the

Control input of the gate T is.

The power converted at the consumer V is equal to '2 ^ ·

^r eff '" ^V T'-Jp-; R = const., ·

It therefore applies

^P 1eff ^{= U} 1eff ; V _φ = 1: 1 = 1 at U ₁ - ~ = 110 V.

, 'R ^l . leli

and . ₂

_{9 ff} , V ₁ . 2eff .. _{7 =} t _± 2exf ^x R 'Φ' ^e

with η = ^U 2eff

, 4 * ^U 1eff U i 1EFF ^P 2eff ⁼ - ~ -. R at ^U 2e is · That so that shown eff ^P 2eff ^{= P} 1

= 220 V = "2. U _leff

At the consumer V, the same power is thus converted both at Uj _e £ _f = - '110 Y and at U ₂ Qff = 220 V as Hetzwechselspannungen. This makes it possible that the consumer V is operated without manual switching to said alternating voltage networks. Due to the application of the principle of wave packet control, no mains loads occur due to asymmetries. It is also excluded that deviations of the Uetzfrequenz occur distortions of the converted power when connected to ^ eff ⁼ ^ 20 / V, since control pulse train U6 and Zümdimpulsfolge U72 are always synchronized. When connected to U _leif = 110 V eliminates the synchronization, since the control pulse train U6 is not relevant.

Claims (4)

Brfindungsanspruch 1. A circuit arrangement for operating consumers to different by an integer factor AC amplitudes with a designed for the lower voltage load, which is connected in series with a triac to the AC terminals, and a voltage detector circuit which evaluates the applied Hetzspannung in the rectified state, characterized in that the control electrode of the triac (TR) is connected to the output of a gate circuit (T), the gate circuit (T) is connected on the input side to a zero-voltage switch (N) and has a control input at which the output of the voltage detector switch (D ) and the output of a digital control logic (SL). 2. Circuit arrangement according to item 1, characterized in that the digital control logic (SL) as a series circuit connected to the unipolar rectified mains voltage · connected trigger (SLTR), - a frequency divider (SLP) and a link network (SLV) is constructed. 3. Circuit arrangement according to item 1 and 2, characterized in that the frequency divider (SLF) of the control logic 2 (SL) a divider ratio f: f = 1: η with ώ =! η integer. ^U 1eff 4. Circuit arrangement according to item 1, characterized in that 'the output of the voltage detector circuit (D) is designed as a switch (S) whose first terminal to the output of the control logic (SL) and the input of the gate circuit (T) and the second terminal are connected to the reference potential of the input DC voltage of the voltage detection circuit (D). - For this 2 sheets of drawings. - -