DD217948A1 - DELAYED, MONOSTABLE TILT - Google Patents

Abstract

The invention relates to a circuit arrangement for generating a delayed pulse upon arrival of a switching edge, preferably executed with integrated Verzoegerungsgliedern. In general, the invention can be applied everywhere where dynamic signals are to be generated from static signals. The aim of the invention is to find a circuit with the lowest possible component cost, which responds to both LH and HL edges with a delayed output pulse of defined length. The object of the invention is to generate an output pulse of defined pulse width on each incoming edge from a static input signal which begins with an LH edge and terminates an HL edge. According to the invention, the object is achieved in that two delay circuits are interconnected via a logic link.

Description

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Delayed, monostable multivibrator

Field of application of the invention

The invention relates to a circuit arrangement for generating a delayed pulse upon arrival of a switching edge, preferably carried out with integrated delay elements. In the present application, the inventive circuit arrangement is used for dynamically setting flip-flops of a combinatorial. In general, the invention can be applied wherever dynamic signals are to be generated from static signals.

Characteristic of the known technical solutions

The construction of monostable multivibrators of base gates, a time-determining capacitor and a feedback is assumed to be known.

All known solutions is based on the disadvantage that, first, each arbitrarily short input pulse generates an output pulse and that, secondly, only one edge (HL or LH) delivers an output pulse. .,.

Object of the invention

The aim of the invention is to find a circuit with the least possible expenditure on components, which responds to both LH and HL edges with a delayed output pulse of defined length. If the input pulses ί are shorter than the delay time, no output pulse appears. k

Explanation of the essence of the invention

The invention is based on the object of generating an output pulse of defined pulse width on each incoming edge (LH, HL) from a static input signal which begins with an LH edge and terminates an HL edge. If the input signal falls below a certain pulse width, no output pulse arises as a result of the delay time of the circuit arrangement. Based on the technological effort and high reliability, the realization should be done in integrated technology. According to the invention, the object of the delayed pulse generation to an LH or, HL edge of the input signal is achieved in that two delay circuits are interconnected via a logic operation. The delay circuits must have different delay times with respect to the incoming edges:

⁴ DHLfDLH.

The control of the delay circuits is done such that the input signal directly drives a delay circuit and the second delay circuit is driven by the inverted input signal. Starting from 1 pulses at the output of the circuit according to the invention, the logic operation following the delay stages, as a function of the delay times, must have the following structure: Delay time ratio linkage

t _D HL> t0LH AND.

tDHL <tDLH NOR

For O pulses to be generated, the NOR or AND links must be swapped. The response time of the overall circuit to an incoming edge is determined by the shorter delay time (t _DHL = t _DLH ). Thus, a noise suppression of input pulses can be easily realized

 Delay time ratio Interference pulse durometer

The duration of the output pulse is determined by the difference of the different delay times. Delay time ratio output pulse duration

The advantage of the circuit arrangement described is that the two characteristics generation of pulses from the edges LH and HL of the input signal and the suppression of short-term glitches on the input signal can be realized with a minimum of components. There are integrated circuits with the appropriate properties applicable, which allow to achieve a well reproducible time response.

Exemplary embodiment

The invention will be explained in more detail below in its function on an exemplary embodiment. In the accompanying drawing: ''

Figure 1: circuit and associated time histories for the delay time ratio 'DHL < ¹ DLH and

FIG. 2: Circuit and associated time profiles for the delay time ratio 'DHL> ⁴ DLH. i

The following explanations are limited to FIG. 1. The delay elements 1 and the subsequent link 2 can be seen from the circuit. If the input signal x (t) changes its logic level within larger time periods, the output signal v (t) responds to each signal edge with a pulse of defined duration. Rapid changes in the input signal x (t) (low or high pulses) do not produce an output signal. '»

Claims (1)

Entitlement to the invention: Delayed, monostable multivibrator for generating a time-delayed output pulse defined duration on arrival of switching edges (LH or HL) with a minimum time interval of the input signal changes consisting of two delay elements and a subsequent combinatorics, characterized in that the delay times of the delay elements for the switching edges LH and HL are unequal and the delay elements are each driven either with the direct or with the inverted input signal and the following combinatorics, which is executed depending on the delay time ratio as NOR or AND.
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