DD140103A2 - ANALOG SWITCH WITH FIELD EFFECT TRANSISTORS - Google Patents

Abstract

The invention relates to an analog switch with FETs, as he e.g. can be used in A / D or D / A converters. It is the goal of the invention to improve the switch characteristics. It is the task of the invention, an analogue switch under exclusive Use of FETs of the same conductivity type in both Signal paths to create, in accordance with the invention in accordance with Main patent in both signal paths allows a high blocking voltage and / or low leakage currents. This is achieved by that through an additional FET also in the other signal path the Drain-source paths of two FETs are connected in series and at their Connection point in the case of blocking an average voltage of both Input voltages applied, causing the reverse voltage on both FETs is split. By another extreme value circuit is the required sliding substrate potential for the additional FET generated. The two signal voltages are independent of each other.

Description

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Ti t el, the invention

Analogue switch with Peldeffekttransistoren

Applicatio ndun ^ t sfiebie of _a ^ f He indung

The invention relates to an analog switch with Peldeffekttransistoren (PET *) for higher signal voltages and / or improved Sperrwirkuns in an embodiment of the invention according to patent j VVP 43G imi He comes in electronic devices for Anv / endung, oeispielsweise in analog-digital or digital analog Translators with automatic correction *

Characteristic of the known technical solutions

In the invention according to the main patent, the problem has been solved to provide a circuit arrangement for an analogue umhalter with exclusive use of PETs in both signal paths, which allows in one of the signal paths a high blocking voltage and / or low leakage currents, are in this signal path of / egg at the same time and in the same direction controlled PETs same conductivity type disposed zv the drain "source" in -Strecken number _s and the common connection point = · is in the lock case via a switch with a

Averaging circuit is connected, which forms from the signal voltages at the two inputs d, ie weighted (for example, the arithmetic) mean voltage, whereby the blocking voltage is divided in a suitable manner on the two FETs in two extreme value circuits from the signal voltages and the average voltage for these I ¹ ETs and a third, located in the other signal path PET of the same conductivity styps generated sliding substrate potentials, whereby the.-Punktionstüchtigkeit the three PETs regardless of the polarity of the input voltages is always guaranteed «Before the entrance of the other signal path is a preferably switchable voltage source "

The invention according to the main patent has the disadvantage that the increased signal voltage range and / or the improved blocking effect can only be used in one of the two signal paths, and that conditions restricting the independence of the applied signal voltage from the control of the signal paths exist for the other signal path.

Invention;

It is an object of the invention to improve the switch characteristics in PET switches with analog switches

It is an object of the invention, in an embodiment of the invention according to patent application V / P H 03 K / 205 072 to provide a circuit arrangement for an analog switch · using only PETs in both signal paths, in both signal paths

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allows a high reverse voltage and / or has low leakage currents _o

According to the invention the object by means of a circuit arrangement for an analog switch with FETs of the same conductivity type and with two with respect to an output and two inputs alternately switched signal paths, consisting of a. Averaging circuit, two extreme value circuits, a first switch, three FETs and a voltage source before the second input, achieved in that in addition a fourth FET with its drain-source path in series with the drain-source path of the third FETs between this and the second input is arranged _e The connection point of these two FETs is connected via a second switch to the output side connection of the mean value circuit. The second extra value circuit is on the input side respectively to the output side terminal of the mean value circuit, via a third switch to the first input and a fourth switch connected to the second input. "A third-level equal value circuit is connected on the input side both to the output side connection of the mean value circuit and to the second input and to the output side of the fourth FET." The first and second FET as well as de r second and third switches are all in one, the third and fourth FET and the first and fourth switches are all in the other (opposite) switching state * The voltage source contains an independent signal voltage *

By the averaging circuit, the blocking voltage of each blocked signal path is split into two FETs © The first or third _e extreme value circuit provides for 'the associated FET at the inputs and the second extreme value circuit for the FETs at the output

such a sliding substrate potential, which is never smaller (larger) than the drain and source potentials of the respective ρ (n) channel PET. «

Pur an extremely high blocking effect is the application of a non-linear mean value circuit, whose output voltage is limited to small deviations from the signal voltage at the input of each through-connected signal path, expedient, possibly also limited to a signal paths The resulting reduced voltage across the 'second connected to the output or "third PET within the locked signal path then allows only a very small leakage current flow in the respective blocked signal path,

Advantages of the solution according to the invention are two similar, symmetrically arranged signal paths without restrictive conditions with regard to the independence of the signal voltage for one of the signal paths and with in both signal paths to the same extent increased signal voltage range and / or improved blocking effect.

Ausfiih ^ ngsbeispiel

The invention will be explained in more detail below with reference to an exemplary embodiment. In the accompanying drawing, the block diagram of an analogue changeover switch according to the invention with pETs of the p-channel enrichment type is shown

In this circuit arrangement, in a first signal path between a first input 1 for a first signal voltage U ^ and an output 6, a first FET 2 and a second ΡΞΤ 3 are connected in series

Drain-source paths arranged * A second signal path extends from a second input 5 for a second signal voltage U ~ via the series connection of the drain-source paths of a fourth FET 8 and a third FET 4 to the output 6 "in one between the inputs and 5 arranged average circuit 9, the signal voltages IL and Up become the weighted center.lv/ert voltage

'.. U _M = k * U ₁ + (1-k) * U ₂

It is output side via a first switch 10 with the connection point of the drain-source paths of the PETs 2 and 3 and via a second switch 14 to the connection point of the drain-source Stretching of the PETs 4 and 8 connected The substrate potential of the first or fourth PET 2 or "8 is supplied by a first or third extreme value circuit (maximum circuit) 11 and 13, respectively, on the input side with the first and second inputs 1 and 5, the output-side terminal of the average circuit 9 is connected j predetermined such that it assumes the respective higher of the potentials of U ₁ or, U ^ and U ^ «The substrate potential of the interconnected PETs 3 and 4 is from a second extreme value circuit (maximum circuit) 12, the input side to the output side terminal of the average value circuit 9 and a third switch 15 to the first input 1 or »via a fourth Scha 16 is connected to the second input 5, given and takes the higher of the potentials of U _M and U ₁ or # ^! U ₂ on * The switches 14, 15 and the PETs 2, 3 are all in a switching state and in addition the switches 10, 16 and the PETs 4, 8 are all in the opposite switching state, the PETs 2, 3, 4, controlled by their gate connections.

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arrangement and the signal voltage U ^ independent signal voltage U ₂ *

In the circuit arrangement, as shown in the drawing, the signal voltage U1 applied to the first input 1 is switched through the conducting state PETs 2 and 3 to the output 6 and output as the output voltage U.sub.D.sup.- point of the PETs 4 in the nonconducting state and 8 receives via the closed second switch 14 · the mean value voltage U ,, from the mean value circuit 9 »whereby the blocking voltage

/ U ₂ -Uy = ZU ₂ -U ₁ /

is split in a suitable manner to the locked second signal path «In an analogous manner, when blocking the first signal path and closed first switch 10, the reverse voltage

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divided up",

Of course it is also possible to use depletion and n-channel PETs as well as barrier-layer PETs. When n-channel PETs are used, extreme value circuits 11, 12 and 13 are to be implemented as minimum circuits. "

The advantageous embodiments of the extreme value circuits, the switches and the control of the PETs proposed in the main patent can also be used for this invention * In particular, the impedance converter between the inputs and the digital value circuit proposed in the main patent, which has a constant voltage difference, is advantageous *

Claims (2)

invention claim 1 # Analogue switch with field effect transistors (PETs) of the same conductivity type and two signal paths switched with respect to one output and two inputs in the change, and with a voltage source in front of the second input, with the series connection of a first and a second input between the first input and the output second PET, whose connection point is connected via a first switch to an input side connected to the inputs average, is connected to a input side connected to the first input and the average value circuit connected first extreme value circuit to the S.ubstratanschluß the first PET, a second extreme value circuit on the output side the substrate terminal of the second and of a third, in the other signal path and connected to the output PET is connected, and finally the extreme value circuits when using p »or« channel ¬ PETs maximum · »or → minimum circuits are, according to patent WP Ί36 4-41- characterized in that in addition a fourth PET (8) is arranged with its brain-source path in series with the drain-source path of the third PET (4) between the latter and the second input (5) "ß the connection point of these two PETs (4 ·; 8) is connected via a second switch (14) to the output terminal of the mean value circuit (9), that the second extreme value circuit (12) on the input side in each case with the output side. Connection of the average circuit (9)> via a third switch (15) to the first input (1) and via a fourth switch (16) to the second input (5) is connected, that is a Gleichgeartete 207 573 third extreme ert circuit (13) input side both at the output side terminal of the average circuit (9) and at the second input (5) and the output side to the substrate terminal of the fourth FET (8) is connected, that is the first and second ΙΈΤ (2; 3) and the second and third switches (14-; 15) all in one, the third and fourth FETs (4-8) and the first and fourth switches (10; 16) all in the other ( opposite) switching state, and that the voltage source (?) is independent of its signal voltage (Uo), 2. Circuit arrangement according to item 1, characterized in that a non-linear mean value circuit (9) has its mean value voltage (U 1) for small or negligible deviations from the signal voltage (U 1 or U 2) at the input (1 or 2) ) of the through-connected signal path, but at least one signal path, is limited « For this a soap drawing.,