DD101523A1 - - Google Patents

Info

Publication number
DD101523A1
DD101523A1 DD16811473A DD16811473A DD101523A1 DD 101523 A1 DD101523 A1 DD 101523A1 DD 16811473 A DD16811473 A DD 16811473A DD 16811473 A DD16811473 A DD 16811473A DD 101523 A1 DD101523 A1 DD 101523A1
Authority
DD
German Democratic Republic
Application number
DD16811473A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to DD16811473A priority Critical patent/DD101523A1/xx
Publication of DD101523A1 publication Critical patent/DD101523A1/xx
Priority to DE19732359960 priority patent/DE2359960A1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0602Systems characterised by the synchronising information used
    • H04J3/0617Systems characterised by the synchronising information used the synchronising signal being characterised by the frequency or phase
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/45Transmitting circuits; Receiving circuits using electronic distributors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DD16811473A 1973-01-05 1973-01-05 DD101523A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DD16811473A DD101523A1 (en) 1973-01-05 1973-01-05
DE19732359960 DE2359960A1 (en) 1973-01-05 1973-12-01 METHOD FOR BLOCK SYNCHRONIZATION OF PCM SIGNALS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DD16811473A DD101523A1 (en) 1973-01-05 1973-01-05

Publications (1)

Publication Number Publication Date
DD101523A1 true DD101523A1 (en) 1973-11-12

Family

ID=5489677

Family Applications (1)

Application Number Title Priority Date Filing Date
DD16811473A DD101523A1 (en) 1973-01-05 1973-01-05

Country Status (2)

Country Link
DD (1) DD101523A1 (en)
DE (1) DE2359960A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5127014A (en) * 1974-08-30 1976-03-06 Fujitsu Ltd Hidokisetsuzokuhoshiki
DE3140431C2 (en) * 1980-10-13 1986-09-25 Hitachi, Ltd., Tokio/Tokyo Demodulator circuit for demodulating a modulated digital signal

Also Published As

Publication number Publication date
DE2359960A1 (en) 1974-07-18

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