CS272742B1

CS272742B1 - Memory programming connection

Info

Publication number: CS272742B1
Application number: CS301088A
Authority: CS
Inventors: Robert Kubinyi; Tibor Badura
Original assignee: Robert Kubinyi; Tibor Badura
Priority date: 1988-05-04
Filing date: 1988-05-04
Publication date: 1991-02-12
Also published as: CS301088A1

Abstract

The purpose of this solution is connection for memory programming, especially programming of the bipolar PROM memories. The principle of this design consists in the fact that the block (3) of the bit decoder, which is connected with the computer (12) via the first bus (9), is connected via the second bus (10) with the first input of the block (2) of the switching transistors, which is connected via the third bus (11) with the first input of the block (5) of the counting opto-couplers and also with the programmed memory (1), which is connected via the address bus (7) and bus (8) of the control signal with the computer (12). The block (5) of the counting opto-couplers is connected with the computer (12) via the data bus (6). The second input of the block (2) of the switching transistors is connected to the 24V power supply (4). The second input of the block (5) of the counting opto-couplers is connected with the computer (12). The advantage of this design is its simplicity, reliability and fulfilment of the conditions of the user comfort.<IMAGE>

Description

(54)(54)

Zapojenie pre programovanie pamati θ') účelom riešenia je zapojenie pre programovanie pamati, najma bipoiárnych PROM pamětí. Podstata riešenia spočívá v tom,' že blok (3) dekodóra bitu spojený prvou zbernicou (9) s počítačem (12) je cez druhů zbernicu (10) připojený na prvý vstup bloku (2) spínacích tranzistoroví ktorý je trefou zbernicou (11) pripojarsý na prvý vstup bloku (5) čitacichjoptočlenov a súčasne na programovaná parnaϊ (I), ktorá je zbernicou (7) adries a zbernicou (8) riadiacich signálov spojená s počitačom (12). Blok (5) čitaolch optočlenov je spojený s počitačom (12) zbernicou (5) dát. Druhý vstup bloku (2) spínacích trsnzistorov je připojený na 24 V zdroj (4).Wiring for memory programming The purpose of the solution is wiring for memory programming, in particular bipolar PROM memories. The principle of the solution consists in that the bit decoder block (3) connected by the first bus (9) to the computer (12) is connected via the second bus (10) to the first input of the transistor switching block (2). to the first input of the readout block (5) and simultaneously to the programmed steam (I), which is connected to the counter (12) by the address bus (7) and the control signal bus (8). The optocoupler block (5) is connected to the computer (12) by a data bus (5). The second input of the switching transistor block (2) is connected to a 24 V power supply (4).

Druhý vstup bloku (5) čítačích optočlenov je spojený s počitačom (12). Výhodou riašenia je jeho jednoduchost/ spoTahlivost a splnenis podmienok uživatelského komfortu.The second input of the optocoupler counter block (5) is coupled to the counter (12). The advantage of the solution is its simplicity / reliability and fulfillment of user comfort conditions.

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CS 272 742 BlCS 272 742 Bl

Vynález sa týká zapojenia pre programovanie pamati, najma bipolárnych PROM pamati typu MHB 93448 a MHB 93451 a využitím mikropočítača PMO-85 na riadenia procasu zápisu.The invention relates to a memory programming circuit, in particular bipolar PROM memories of type MHB 93448 and MHB 93451, and using a microcomputer PMO-85 to control the write process.

V súčasnosti sa v strojoch prevažne číslicová riadaných používá systém uložený v paraatíačh EPROM; ktoré sú v požiadavkách výrobného procesu nespolehlivé.At present, a predominantly numerical controlled machine uses a system stored in the EPROM paratrooper; that are unreliable in production process requirements.

Doteraz známe programátory umožňujú naprogramovanie okrem EPROM pamati tiež PROM pamati typov 74 188; 74S 287,* 8708, 2716 a 74S 571. Ani jedan vsak nie je vhodný pre pripojenie k mikropočítačů PMD-85.Previously known programmers allow programming in addition to EPROM memory also PROM memory types 74 188; 74S 287, * 8708, 2716 and 74S 571. However, neither is suitable for connection to PMD-85 microcomputers.

Uvedené nedostatky zmierňuje;' a technický problém rieši zapojenie pre programovanie pamati podlá vynálezu,' ktorého podstatou je,” že blok dekodéra bitu spojený prvou zbernicou s počitačom je cez druhů zbernicu připojený na prvý vstup bloku spínacích tranzistorov, ktorý je trefou zbernicou připojený na prvý vstup bloku čitacích optočlenov a súčasne na programovaná pamat. Programovaná pamat je zbernicou adries a zbernicou riadiacxch signálov spojená s počitačom. Blok čítačích optočlenov je spojený s počítačem zbernicou dát. Druhý vstup bloku spínacích tranzístorov je připojený na 24V zdroj. Druhý vstup bloku čitacích optočlenov je spojený s počitačom.It alleviates these shortcomings; and the technical problem is solved by the memory programming circuit according to the invention, which is that the bit decoder block connected by the first bus to the computer is connected via a second bus to the first input of the switching transistor block which is connected to the first input of the readout block. programmed memory at the same time. The programmed memory is an address bus and a control signal bus connected to a computer. A block of counter optocouplers is connected to the computer by a data bus. The second input of the switching transistor block is connected to a 24V power supply. The second input of the optocoupler block is coupled to the computer.

Výhodou zapojenia pre programovania pamati je jeho jednoduchá obsluha, odolnost voči chybám uživatela, jeho prehladné grafické spracovanie, je po elektronickéj stránka absolutno spoXahlivý a Je schopný podávat informácie o okamžitém stave programovej pamate· Okrem toho systém spíná 'uživatelský komfort a umožňuje spolehlivé uloženie informácie do pamate.The advantage of the connection for memory programming is its easy operation, user fault tolerance, its clear graphic processing, it is absolutely reliable electronically and is able to provide information about the immediate status of the program memory. memory.

Na pripojenom výkrese Je nakreslená bloková schéma zapojenia pře programovanie pamětí.In the accompanying drawing, a block diagram for memory programming is shown.

Zapojenie pre programovanie pamati pozostáva z bloku 3 dekodéra bitu, ktorý je prvou zbernicou jí spojený s počitačom 12, 3alej z bloku 2 spínacích tranzistorov,' ktorý je cez druhů zbernicu 10 připojený na blok 3 dekodéra bitu. Blok 2 spínacích tranzistorov Je cez tretiu zbernicu 11 připojený na prvý vstup bloku 5 čitacích optočlenov a súčasne na programovaná pamat JL. Programovaná pamat 1 je zbernicou 7 adries a zbernicou 8 riadiacich signálov spojená s počitačom 12. Blok Ji čitacích optočlenov je spojený cez zbernicu dát s počitačom 12. Druhý vstup bloku 2 spínacích tranzistorov ja připojený na 24 V zdroj 4. Druhý vstup bloku £ čitacích optočlenov je spojený s počitačom 12.The memory programming circuitry comprises a bit decoder block 3, which is connected to the computer 12 by a first bus, and a switching transistor block 2, which is connected via a second bus 10 to a bit decoder block 3. Switching transistor block 2 It is connected via the third bus 11 to the first input of the block of reading optocouplers 5 and simultaneously to the programmed memory JL. The programmed memory 1 is connected to the computer 12 by the address bus 7 and the control signal bus 8. The reading block of the optocouplers block is connected via the data bus to the counter 12. The second input of the switching transistor block 2 is connected to a 24V power supply. is connected to a computer 12.

Princip programovania bipolárnych pamati PROM typu MHB 93451 a MHB 9344tí o kapacitě lk Byte a 0,5 k Byte spočiva v tom, že tieto pamate sú vybavené NíCr spojkami, ktoré sa pri programovaní prepália a tak zablokujú uložená infarmádu.The principle of programming bipolar memories PROM type MHB 93451 and MHB 9344 with a capacity of 1k Byte and 0.5k Byte is that these memories are equipped with NiCr couplings that burn during programming and thus block the stored infarmade.

Programovanie zvolenej informácie sa uskutečni tak, že přivedením příslušných signálov s úrovnou H a L na adresové vstupy sa zvolí slovo, ktorého pamatové buňky ea majú programovat. Vybavovanie pamate prebisha vtedy, ak je na vstupoch CSj a CS₂ úroveň H a na vstupoch CSg a CS₄ úroveň L. Pamat sa zablokuje zhodnou úrovňou signálov na všetkých vstupoch CS a připojí sa na programovacie napatie k výstupu, ktorý prislúcha programovanému bitu.The programming of the selected information is accomplished by selecting the word whose memory cells ea are to be programmed by applying the appropriate H and L signals to the address inputs. Prebisha handling of memory when inputting CSJ and CS ₂ H level and the inputs CSG and CS ₄ level L. memory is locked an equivalent level signals at all inputs and CS connected to a programming voltage to the output which belongs programmed bit.

Obvod pre programovanie pamati je připojený k počítačů cez tri systémové konektory Kg/ K₂ a Kj. Z konektora Kg je vyvedené len napéjacie napatie +5V, +12V a 0 V. Konektor Kg obsahuje na’ svojich pinoch bránu A obvodu 8255, ktorá je použitá ako vstupná datová zbernica a K^ obsahuje na svojich pinoch bránu B a C. Brána B a jedna polovica brány C sa využívá ako zbernica 7 adries a je připojená priamo na programovaná pamat JL. Druhá polovica brány C sa využívá ako riadenie režimu čítania a zápisu do pamate. Datová zbernica nie je vedená priamo na programovaná pamat JL, ale cez blok 5 čitacích optočlenov tvořený optoelektronickými vazobnýrai členrai. Potřebné programovacie napatie sa ziskava z počltača pomocou meniča a násobiča napatia. Riadenie sa realizuje cez obvod MH 74141, čo je dekodér 1 z 10. Na prvých 8 bitov sú připojené bázy tranzistorov, ktoréCircuit programming of memory is connected to the computer through three system connectors Kg / K ₂ and K. Only the + 5V, + 12V, and 0V supply voltage is connected from the connector Kg. and one half of the gateway C is used as an address bus 7 and is connected directly to the programmed memory JL. The other half of Gate C is used to control read / write mode. The data bus is not routed directly to the programmed memory JL, but via a block of 5 optocouplers of optoelectronic couplers. The necessary programming voltage is obtained from the computer by means of a converter and a voltage multiplier. The control is realized via the MH 74141 circuit, which is a decoder of 1 in 10. Transistor bases are connected to the first 8 bits.

CS 272 742 Bl spínajú programovacie napatia 20,5 V na datové vstupy programovanej pamate 1. Každý tranzistor použitý v zapojeni je opatřený odporom z dovodu potřeby dostatočne strmých nábehov programovacích impulzov. Deviaty bit dekodéru je připojený cez tranzistor na diody optoelektronických členov bloku 5 čitacich cptočlenov a cez vstup D dekodóra riadi režim zápisu a čítania. Všetky diody optočlenov sú zapojená do série. Napalovacie napatie sa získává z napatia + 12 V použitím msniča.CS 272 742 B1 switches the programming voltages of 20.5 V to the data inputs of the programmed memory 1. Each transistor used in the wiring is provided with a resistor for the reason of the need for sufficiently steep starts of the programming pulses. The ninth bit of the decoder is connected via a transistor to the diodes of the optoelectronic members of the block 5 of the reading elements and controls the write and read mode via the input D of the decoder. All optocoupler diodes are connected in series. The ignition voltage is obtained from a + 12V voltage using a converter.

Po osadení programovanej pamate JL do objímky sa najskor nastavia výběrové vstupy obvodu do stavu log 1, aby bolo možné nastavit adresu a bity, ktorý sa bude právě napalovat. Adresy sa vyberú priamo z obvodu 8255. Bity sa dekódujú dekodérom 1 z 10; ktorý js realizovaný integrovaným obvodom MH 74141. Výběr bitu riadia len vstupy a;b,C a vstup □ přepíná režim zápisu a čítania. V režime výběru je bit O nastavený do log 1; aby neboli otvorená tranzistory a do pamate nebolo privádzané programovacie napatie. Po vydekódovani příslušnéj adresy a bitu sa vstup CS nastaví do log O a adresy sa už nedajú měnit.After the programmed memory JL is fitted into the socket, the selection inputs of the circuit are first set to the log 1 state in order to set the address and bits being burned. Addresses are selected directly from circuit 8255. The bits are decoded by decoder 1 of 10; The bit selection is controlled only by inputs a; b, C and input □ switches the write and read mode. In selection mode, bit 0 is set to log 1; that transistors are not open and programming voltage is not memorized. After decoding the appropriate address and bit, the CS input is set to log O and the addresses can no longer be changed.

Na vstupoch A;B;C sú připravené signály pre dekódovanie bitu. Po přivedení bitu D do log O sa na jednom z 8 výstupov obvodu objavi log 0 a příslušný tranzistor sa otvori? č£m přivedlo programovací impulz na příslušný vstup pamate. V okamžiku prlvedenia napalova- * cieho impulzu sa v pamati prepáli NiCr spojka. Tým ea zadaná informácia nevratné zapíše do pamate. Okamžité po napáleni sa příslušný bit otestuje. Pamat ostana nadalej zablokovaná; ale na vetup O sa privedie log 1, čim 9a aktivujú diody optočlenov a otvoria příslušné fototranzistory, čím sa vlastně připojí „ datová zbernlca pamate na datovú zbernicu počítača a otestuje sa příslušný bít. Pri správnom napálení ea začne napalovat 3a 1šia adresa. Ak by však napálenis neprebehlo správné, bid □ ša opat nastaví do log 0 a cyklus napalovania sa opakuje.At the inputs A; B; C, signals for bit decoding are provided. When bit D is applied to log O, log 0 appears at one of the 8 circuit outputs and the transistor opens? which brought the programming pulse to the corresponding memory input. The NiCr clutch is burned in memory when the firing pulse is applied. The ea information entered is written into the memory. Immediately after burning, the respective bit is tested. Memory remains blocked; but log 1 is applied to port 0, thereby activating the optocoupler diodes and opening the corresponding phototransistors, thereby actually attaching a " data collector memory to the computer data bus and testing the respective bit. When the correct ea is burned, the 3a address will start to burn. However, if the burn is not correct, the bid bida will set log 0 again and the burn cycle will be repeated.

Spolehlivost prepálenia NiCr spojky je zabezpečená použitím kondenzátora ako dávkovača impulzov,' ktorý sa počas dekodovania adresy doetatočne nabije a po otvoreni příslušného tranzistore tvrdo vybije. Poměrně pomalé nabijanle kondenzátora nie je na závadu; pretože teplota puzdra pamate nesmie překročit stanovená teplotu, to znamená, že kým sa kondenzátor nabije, pamat má dostatočný čas na ochladenie.The reliability of the NiCr clutch burn is ensured by the use of a capacitor as a pulse dispenser, which is continuously charged during address decoding and hardly discharged after opening the respective transistor. The relatively slow charge of the capacitor is not a problem; since the temperature of the memory case must not exceed the specified temperature, that is, while the capacitor is charged, the memory has sufficient time to cool.

Zapojenie pre programovanie pamati js prisposobené štruktúre mikropočítače PMO a v spojeni s ním sa dosiahne poměrně nenáročnými technickými prostriedkami spolahlivé zariadenie na programovanie pamati.The memory programming circuit is adapted to the structure of the PMO microcomputer, and a reliable memory programming device is achieved in a relatively inexpensive manner by means of a relatively inexpensive technical means.

Software umožňuje jednoduchá manipuláciu a nevyžaduje obsluhu profesionálnym programátorom. Pomocou menutechniky a dialogového režimu napomáhá uživatelovi vytvořit konkrétné programové zadanie obsahu pamate.The software allows easy manipulation and does not require operation by a professional programmer. Using menus and dialog mode, it helps the user to create a specific programmatic entry of memory contents.

Claims

CS 272 742 Bl 2 switches the programming voltage of 20.5 V to the data inputs of the programmed memory 1. Each transistor used in the circuit is provided with a resistance to the need for sufficiently steep start-up pulses. The ninth bit of the decoder is connected via the transistor to the diodes of the opto-electronic members of the block 5 of the reading dials and controls the write and read mode via the input D of the decoder. All optocoupler diodes are connected in series. The ignition voltage is +12 V using the inverter. After the programmed memory J has been mounted in the socket, the input circuit inputs are first set to the log i state in order to set the address and bits to be burned. The addresses are selected directly from circuit 8255. The bits are decoded by the decoder 1 of 10; which is implemented by the MH 74141 integrated circuit. Only the inputs a; b, C control the bit selection and the input íná switches the write and read mode; In selection mode, bit O is set to log 1; that no transistors are opened and no programming voltage is fed into the memory. After the corresponding address has been output and the bit, the CS input is set to log O and the addresses cannot be changed. The signals for bit decoding are prepared at inputs A; B; After applying bit D to log 0, log 0 appears on one of the 8 circuit outputs and the respective transistor opens to bring the programming pulse to the appropriate memory input. At the moment of supplying the ignition pulse, the NiCr coupling is burned in the memory. This will make the specified information irreversible write memory. After being burned, the bit is tested. The memory remains blocked; but log 1 is applied to input 0, thereby activating the optocoupler diodes and opening the appropriate phototransistors, thereby actually connecting the "data bus of the memory to the computer data bus and testing the respective beats. When properly burned, a 3-digit address will start burning. However, if the burn is not correct, the rake will set to log 0 and the burn cycle will be repeated. The reliability of the NiCr cleavage is ensured by the use of a capacitor such as a dispenser, which is charged during decryption of the address and discharges after opening the appropriate transponder. A relatively slow capacitor charge is not a problem, "since the memory housing temperature must not exceed the specified temperature, that is, until the capacitor is charged; the memory has sufficient cooling time. The memory programming is associated with and associated with the PMO microcomputer. The software enables easy handling and does not require the operation of a professional programmer, and helps the user to create a specific program input of the memory by using the menu and dialog menu. bipolar PROM memory type MHB 93448a MHB 93451, which consists of a 24 V source, a read optocoupler block, a switching transistor block, and a bit decoder block, characterized in that the i3 block of the first bus (9) bit connected to the computer (12) is through a second bus (10) connected to the first port of the switching transducer block (2), which is connected to the first input of the opto-coupler block (5) and simultaneously to the programmed memory (1) by a third bus (11); which is connected to the computer (12) and the reading opto-block (5) is connected to the computer (12) by the data bus (7) and the second input block (5) of the opto-couplers is connected to the computer (12). computer (12). 1 excrement