CS257115B1 - Involvement to process serial data generated by flexible disk mechanisms - Google Patents

Abstract

Connection to serial data processing solves the connection of flexible disk mechanisms to computational systems. The connection processes the serial data from the flexible disk mechanisms, compensates for random data errors when the nominal engine speed is varied and uses only simple digital components. The wiring is designed such that the output of the serial data from the flexible disk mechanism is applied to an input circuit whose output is applied to one register input whose outputs are associated with the memory inputs and the input sync block. Memory outputs are associated with other registry entries. One register output is coupled to a zero input circuit input. The outputs of the synchronization block are applied to the inputs of the integrated flexible disk controller, the output of which is connected to both the reset input of the synchronization block and the input of the input circuit.

Description

257113

BACKGROUND OF THE INVENTION The invention relates to a connection for processing serial data generated by a mechanism of flexible discs.

The prior art processes for the processing of serial data generated by the mechanisms of the flexible discs are solved either analogously or digitally. In the first case, the basic elements of the connection are the phase detector and the voltage-controlled oscillator and the serial data synchronized. This connection ensures that any error in the time sequence of the data is compensated. In the second case, the basic elements of the register and ROM storage, but the serial data is not synchronized, whereby erroneous processing of the received data can occur. The advantages of the above-mentioned circuits use a circuit for processing serial data generated by flexible disk mechanisms, the principle of which is that the output of the elastic disk mechanism is coupled to the input of the input circuit, which output is fed to one input re the master whose outputs are connected to the input memory, which outputs are connected to other register inputs, and further one of the register outputs is connected to the input of the synchronization block and to the zero input-input of the input circuit, and another of the register output is connected to a timing input of the synchronization block, which outputs are connected to the inputs of the integrated flexible disk radiator whose output is connected to the reset input of the synchronization block and to the input of the input circuit.

Involvement in the processing of serial data according to the present invention will overwhelm such similar wiring advantageous because it uses only simple digital components, has simple manufacturing and recovery features, and uses input serial data synchronization to compensate random errors in time sequences of serial data generated by flexible disk drives.

In the accompanying drawings, FIG. 1 illustrates an exemplary connection for processing the serial data of the present invention, and FIG.

Connection to Serial Data Processing Fig. 1, the input circuit 2 is connected to the input 21 of the resilient disk mechanism 1. The output 22 of the input circuit 2 is connected to the input 31 of the register 3 and the output 32 of the register 3 is connected to the input input 23 of the input circuit. 2, with input 41 of memory 4 and with input 51 of synchronization block 5. Outputs 33, 34, ..., 3n of register 3 are connected to inputs 42, 43, ... 4n of memory 4 and outputs 420, 421, ... 42n of memory 4 are connected to inputs 3, 30, 331, ... 33n of register 3. The register output 33 is further coupled to the timing input 52 of the synchronization block 5. Outputs 53a and 54 of the synchronization block 5 are connected to inputs 61 and 62 of the integrated radial disks 6 The output 63 of the integrated disk controller 6 is connected to the input 55 of the synchronization block 5 and to the input 24 of the input circuit 2.

The function of connection to the serial data processing according to the invention is explained on the diagrams shown schematically in Fig. 2. The mechanism of the elastic discs 1 generates the serial data T1 of the elevation 11. These are applied to the input 21 of the input circuit 2 and processed therein if the operation of the input circuit 2 is enabled at the input 24. The processed data is inputted from the output 22 of the input circuit 2 to the input 31 of the register 3, thereby affecting the output 32 of the register 3. The output signal T2 from the register output 32 3, the input circuit 2 is reset to zero through the input 23 and is further applied to the input 51 of the synchronization block 5.

The logic zero of the output signal T2 is generated after the time po1 after the gradient serial data T1. The registers 32, 33, 34, ... 3n of the register 3 are inputted to the inputs 4T, 42, 43, ... 4n of the memory 4, thereby influencing the outputs 420, 421, ... 42n of the memory 4, which are fed to inputs 330, 331, ... 33n of register 3 and thus the outputs 33, 34, ... 3n of register 3 are affected. The output signal T3 from output 33 of register 3 is also fed to the timer the input 52 of the synchronization block 5. The time T2, the start output signal T3 is in the logic null, respectively. the time ΔΤ3, during which the output signal T3 is in the logical unit, is determined by ΔΤ5, resp. by ΔΤ6. The output signals T2 and T3 applied to the input 51 and the timing input 52 of the synchronization block 5 are processed therein and outputs 53 and 54 of the synchronization block 5 are inputted to the inputs 61 and 62 of the integrated counter of the flexible discs 6. The logic of the successive signal T4 is generated as podobě4 from the downward edge of the output signal T3 or, if the output signal T2 in the logic zero is for the duration of the logic nu-ly of the output signal T3, the logical unit of the resulting signal T4 is generated after the time ΔΤ7 from the downstream edge of the output signal T2. The resulting signal T5 changes the value from logical zero to logical unit, or vice versa, when the output signal T3 is changed from logical zero to logical unit. This achieves that the rising edge of the resulting signal T4 is generated after the time ΔΤ8 after the resultant signal T5 is flipped over and the time ΔΤ3 before the resulting signal T5 is flipped. The resulting signals T4 and T5 from the outputs 53 and 54 of the sync block 5 represent the synchronized serial data and the level signal, during which the individual bits of the synchronized serial data are valid.

Claims (2)

The connection to the processing of serial data generated by the elastic disk mechanisms of the present invention allows for the connection to the processing of serial data generated by flexible disk mechanisms, characterized in that the output (1i of the flexible disk mechanism (1) is coupled to the input (21) of the input circuit (2), the output (22) of which is connected to the input (31) of the register (3) and the output (32) of the register (3) is connected to the input (41) of the memory (4) a reset input (23) of the input circuit (2) and with an input (51) of the synchronization block (5), whose timing input (52) is connected to the output (33) of the register 115 6 by a substantial reduction of the import cost of the component reliably process the serial data required when working with the flexible discs (3) and the input (42) of the memory (4), whose outputs (420, 421, 42n) are connected by outputs (330, 331, ...,. 33n) are associated with the outputs (34,.., 3n) are connected by outputs (43, ..., 4) n) memory (4), and further outputs (53, 54) of the synchronization block (5) are connected to the inputs (61, 62) of the integrated flexible disk controller (6), which output (63) is coupled to the zeroing input -pom (55) the sync block (5) and the input (24) of the input circuit (2). 2 sheets of drawings