CS241809B1 - Semiconductor element with decreased inlet induction - Google Patents

Abstract

The nature of the semiconductor component is reduced an induction conductor consisting of a steamer ipouizdna, chip, and infeed, wherein the chip is provided with contact pads and bottom side attached to the poozidra base and the contact pads of the tongue are connected to supply. electrodes of the housing of the invention that the base of the case is provided with a protrusion next to the chip and the same height as a chip while the chip is all over adjacent the protrusion of the socket provided with a continuous contact area, in the case of a rectangular one iťvaru chip on its longer side, taking the contact area of the chip is electrically conductive with the protrusion of the housing base electrically conductive sealant in a continuous surface. Semiconductor, component according to the invention has a significantly lower inductance of supply or electrode outlet

Description

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device with reduced inductance.

Current types of microwave semiconductor components are also designed for operation in frequency bands higher than 1 GHz. One of the basic requirements for the geometric design of the horizontal horizontal structure of the cifp structure and for the constructional design of the four-casing assembly; of these components is to achieve the lowest inductance value of their lead electrodes.

This issue is very important and essential especially in transistors. Both theoretical analysis and practical results show that each inductance in the emitter L _s (microwave transistors) has a major influence on the amplification capabilities of the transistors, especially in the frequency bands higher than 3 GHz.

Generally speaking, that 'the higher the p-ORK rate as well as the transistor, the higher performance transistor (intensifies, the greater the' power (zilslk, the Memiş Imus be 'induikčnoSlt the emitter of the transistor in connection with common e miter em, ¹ In much of the literature, the theoretical formula in the form of:

where it represents:

g _DS collector conductivity

R _g series resistance paid

Ri resistance, channel .mieizi emitoreim and gate

R _s series emitter resistance

C _DG collector-gate capacity

L _s inductance of the emitter lead.

Of the above formula, it is particularly significant

Table I

Increase in induction of eimiit. feed to _the L (nH) .__ ___ ¹ d f [Ls) 4π ÍtCog (2R _g -J- Ri Rs 4- 2π ITLC) effect indukčnoístl emitter lead L _with the size of the maximum available power gain MAG. For example, it follows from the formula that for a MESFET microwave power transistor with a gate width of 3 mm and a shaft length of 1.5 μΐη, at an inductance of the emitter lead L _s = OH, at f = 4 GHz, MAG = 16.3 dB. Increasing-Hi now the inductance of the emitter lead decreases the original power zilslk MAG as follows, according to the thrust. AND.

(Decrease of gain G _x (dB) from the initial hodinoty MAG "16.3 db

0.016 1

0,036 2

0,063 3

0,096 4

0,137 6

0,443 9

Obviously, an increase in emitter inductance of 0.1 inH decreases the power amplitude of the MAG by about 4 dB. These theoretically derived dependencies are in very good agreement with the experimentally verified results.

Installation of MESFET chips is now

Table II is usually made with gold wire or gold band. If a wire or ribbon transistor emitter of the dimensions given in Table II is used, the inductance of the emitter lead L _s is as follows:

Belt

thickness (μηι) 5 width (, umj 50 50 50 75 75 75 100 100 100 ALIGN! length (mmj 0,2 0,5 • 1.0 0,2 0,5 1.0 0,2 0,5 1.0 induction L _s (nH) 0.1 0.34 0.82 0.09 0.31 0.75 0.08 0.28 0 ,,, 69 Drátek diameter (μΐιη) 20 May 30 length (mime) 0.2 0.5 (1,0 0.2 0.5 1.0 inductance L _s (nH) 0.15 0.318 0.85 0.12 0.43 0.77

Thus, in the zipper of the assembly of the chip into the housing or circuit, it is considerable. Today, manufacturers of high-end MESFETs solve this problem in three ways:

(a) flip-flops;

(b) by way of the holes in emiito.ru, so-called 'vaa-itránzistOT connectioos;

c) by way of multiple bonding of the individual strips with the capsule base with gold wire, the so-called plated heat sinlk confilguratioh.

All these methods are of great technical benefit, but they are quite complex, time-consuming and time-consuming and pose a certain risk in chip processing.

In order to at least partially eliminate the effect of assembly and to substantially reduce the inductance in the transistor eimiirtoir, while at the same time eliminating the aforementioned difficulties in other methods, a so-called no-noise transducer assembly has been designed and implemented. in a semiconductor device with reduced inductance of the lead according to the invention, characterized in that the patina of the housing is provided with a protrusion next to a chip of the same height as the chip, while the chip is provided with a continuous The contact area of the chip is electrically conductively connected to the protrusion of the housing base by an electrically conductive sealant in a continuous surface.

The higher effect of the semiconductor component according to the invention is to substantially reduce the inductance of the electrode lead or lead provided in this way.

The subject matter of the invention is explained in more detail below with reference to the accompanying drawing.

A semiconductor component with reduced inductance of the supply consists of a socket base 1 which is provided with a protrusion 1.1 next to a chip 2 having a sieve height as chip 2, while the chip 2 has a continuous contact area 6 along its entire length. the rectangular shape of the chip along its longer side, the contact area 6 of the cap 2 being electrically conductively connected to the projection 1.1 of the housing base 1 by an electrically conductive sealant 5 in a continuous surface. _

The pin 2 of the semiconductor device is attached to the lots! 1 of the sleeve with its contact area 6 just as far as the stop to the sleeve projection 1.1. The electrically conductive sealant 5 is used to interconnect the contact area S of the chip 2 with the protrusion 1.1 of the housing over the entire length of the chip. The interconnection of the cohesive cells of the remaining electrodes 7 and 8 of the semiconductor chip is accomplished by conventional thermocompreism or ultrasonic procedure with a suitable wire or strip.

Claims (1)

A semiconductor component with a reduced lead-in inductance consisting of a socket base, a chip and lead electrodes, wherein the chip is provided with conical tabs and a lower edge attached to the socket foot and the chip contact pads are connected to the lead electrodes of the case; The housing is provided with a protrusion (1.1) next to the chip (2) of the same height as the chip (2), while the chip (2) is provided with a continuous contact area along the entire length of the adjoining protrusion (1.1). (6), 'in the case of a rectangular' chip shape along its longer side, the contact area (6) of the chip (2) being electrically conductively connected to the projection (1.1) of the housing base (1) by an electrically conductive sealant (5) in continuous desktop.