CS240233B1 - Circuit for automatic evaluation of thyristor tripping time - Google Patents

Abstract

The purpose of the connection is to make the evaluation of the thyristor turn-off time more precise and faster. It eliminates the need for manual operation of the measuring device and allows its inclusion in an automatic measuring line. The above purpose is achieved by a connection consisting of a measuring and evaluation circuit. The measuring circuit is connected in a conventional manner and the evaluation circuit is composed of timing circuits, a flip-flop, an approximation register, a binary round-trip counter with preselection, a pulse generator, a logic product gate and a start signal source.

Description

The invention relates to a circuit for the automatic evaluation of the thyristor tripping time.

With the present method of measurement and advantageous thyristor tripping times, the operator of the device manually shortens the tripping time of the measured thyristors until it burns. Then it gradually finds the moment when the measured thyristor still restores its closing properties. This method of measurement is quite lengthy and the measurement itself depends on the care of the operator.

Another method of measurement used is to gradually reduce the tripping time after a unit step. This method is not used for measuring the low repetition rate for the very long evaluation time.

Neither of these methods is suitable for measuring in an automatic measuring line.

The above disadvantages are overcome by the circuit for automatic evaluation of the thyristor tripping time according to the invention, consisting of a measuring circuit and an evaluation circuit. The measuring circuit consists of a fast electronic switch, a shunt, an auxiliary thyristor, a choke, a reverse voltage source, a du / dt source, a control pulse source, a forward current source, and a burnout evaluation block. The evaluation circuit consists of a timer circuit, a flip-flop circuit, an approximation register, a binary preset counter, a pulse generator, a logic gate, and a start signal source. The essence of the circuit is that the input of the first timing circuit is connected to the second output of the control pulse source, the output of the second timing circuit is connected to the input of the du / dt source and the output of the burnout evaluation block is connected to the third data input of the approximation register. The output of the first timing circuit is coupled to the first clock input of the flip-flop, the second clock input of the approximation register, and the second preset binary reset counter input. The output of the start signal source is connected to a second reset by the input of the flip-flop, the output of which is connected to the start input of the approximation register.

The pulse generator output is connected to the first logic gateway input, the second input of which is connected simultaneously with the input of the second timing circuit to the preset binary counter output. The logic product gate output is coupled to the preset input of the binary return counter. The approximation register outputs are connected to the preset binary return counter preset inputs.

The circuit for automatic evaluation of the tripping time of the thyristors according to the invention will substantially improve and accelerate the tripping time evaluation. It eliminates the need for manual operation of the measuring equipment and allows the measuring equipment to be integrated into the automatic measuring line.

In the attached drawing, the circuit according to the invention is shown in a block circuit, with a measuring circuit at the top and an evaluation circuit at the bottom.

Exemplary embodiment

The measuring part of the circuit for automatic evaluation of the thyristor tripping time is connected in the usual way. The anode of the measured thyristor 28 is connected to the output 38 of the 35 du / dt source, the first input 43 of the burnout evaluation block 42, and via a fast electronic switch 27 with the output 47 of the forward current source 46 and the anode of the thyristors 30. 31 with the output 33 of the reverse voltage source 32. The control electrode of the auxiliary thyristor 30 is connected to the output 40 of the control pulse source 39. The cathode of the measured thyristor 28 is connected to the second input 44 of the burnout evaluation block 42 via a shunt 29. The output 41 of the control pulse source 39 is connected to input 2 of the first timing circuit 1.

The input 38 of the source 35 du / dt is connected to the output 18 of the second timing circuit 16. The output 45 of the burnout evaluation block 42 is connected to the third data input 10 of the approximation register 8. The output 3 of the first timing circuit 1 is connected simultaneously with the first clock input 5 of the flip-flop. 4, with a second clock input 11 of the approximation register 8 and a second set input 14 of the binary reset counter 12.

The output 26 of the start signal source 25 is connected to the second reset input 6 of the flip-flop 4, the output 7 of which is connected. with the start input 9 of the approximation register 8. The output 20 of the pulse generator 19 is connected to the first logic gate input 23, the second input of which is connected simultaneously with the input 17 of the second timing circuit 16 and the output 15 of the binary counter 12. The output 24 of the logic product gate 21 is coupled to the count input 13 of the binary reset counter 12. The outputs 461 of the proximal register 8 are connected. to inputs 471 of binary counter 12 with preselection.

The signal from the start signal source 25 resets the flip-flop 4, which causes the start input 9 of the approximation register 8 to start. Upon arrival of the pulse from the control pulse block 39, timed in the first timing circuit 1, the flip-flop 4 flips the flip-flop 4, then returns the approximation register 8 to its initial state and sets the binary reset counter 12 to the value given by the outputs 461 of the approximation register 8. The state of the output 7 of the flip-flop 4 is changed and the state of the output 15 bi5 of the national reset counter 12, which unlocks the logic product gate 21, changes.

The pulses from the pulse generator 19 operating at a frequency of 10 MHz are applied to the counter input 13 of the binary return counter 12, which is preset to zero. After the state change at the output 15 of the binary reset counter 12, the counting is terminated and the second timer circuit 16 actuates a 35 du / dt source. Each time after the measurement cycle step, the signal from the burnout evaluation block 42 is applied to the third data input 10 of the approximation register 8.

Upon arrival of the signal at the second clock input 11 of the approximation register 8, the corresponding bit of the outputs of the approximation register 81 is set accordingly. Depending on the state of the outputs 461 of the approximation register 8, the counting time of the preset binary counter 12 changes. the control pulse source 39 and the signal for the 35 du / dt source.

The circuit according to the invention can be used in cases where it is necessary to measure the characteristics of a semiconductor component in which the basic properties, such as the critical steepness of the voltage rise etc., change abruptly.

Claims (1)

Subject Circuit for automatic evaluation of thyristor tripping time consisting of a measuring circuit consisting of a fast electronic switch, a shunt, an auxiliary thyristor, a choke, a reverse voltage source, a du / dt source, a control pulse source, a burnout evaluation block, a forward current source and an evaluation circuit timers, flip-flop, approximation register, preset binary counter, pulse generator, logic gate and start signal source, characterized in that the input (2) of the first timing circuit (1) is connected to the second output (41) of the source ( 39) control pulses, the output (18) of the second timing circuit (16) is connected to the input (38) of the du / dt source (35) and the output (45) of the burnout evaluation block (42) is connected to the third approximation data input (10) register (8), the output (3) of the first Timing Disc (1) being coupled sp the first hour input (5) of the flip-flop OF THE INVENTION, at the same time it is connected to the second clock input (11) of the approximation register (8) and to the second setting input (14) of the binary return counter (12) with the preset, the output (26) of the start signal source (25) a second reset input (6) of the flip-flop (4), the output of which (7) is connected to the start input (9) of the approximation screen (8), the output (20) of the pulse generator (19) connected to the first gate input (23) (21) a logic product, the second input (22) of which is connected simultaneously to the input (17J of the second timing circuit (16) and the output (15) of the binary return counter (12) with the preset, logic product gate (21) is coupled to a preset input (13) of the binary return counter (12), the proximal register output (461) being coupled to the preset inputs (471) of the binary return counter (12).