CS212291B2 - Semiconductor device - Google Patents

Description

The invention relates to a semiconductor device comprising a first semiconductor area of one conductivity type, a second semiconductor area of another conductivity type having my common part with a first region to form a first PN junction, and a third semiconductor area of a first conductivity type having a common part to form with a second region a second PN junction, wherein in operation the major carriers pass from the first region through the second region to the third region.

It is still customary to manufacture transistors with a strong doped emitting region. Also known is a transistor for high-frequency operation having a low concentration of impurities in the emitter region, in the base and in the collector region. An example of such a transistor is described in U.S. Pat. No. 3,591,430. In this disclosure, it is furthermore proposed that a substantial portion of the emitter region be covered by a high-concentration section, and just so that the collector area is covered by a second high-concentration section.

U.S. Pat. however, it is not explained that the diffusion length or diffusion depth of the minor carriers must be greater than the width or extent of the emitter region, nor does it state that the minor carriers reflected by the embedded field are substantially equalizing the diffusion current of injected minor carriers passing from base to emitter. .

Neither does the US patent disclose how a definitive profile or distribution of the concentration of impurities, or the width or extent, of the base or emitter is to be formed. There is also nothing said about the conditions for growth of the epitaxial layer (e.g., temperature or settling rate). There is only something stated about the conditions of preliminary diffusion, but it is not possible to judge the final structure. '

In the development of conventional bipolar transistors, it has heretofore been common to use double diffusion techniques to create an emitter-base transition. From the theoretical point of view as well as from experiments, the doping concentration is chosen for the emitter higher than for the base. As this difference increases, the efficiency of the emitter also increases and approaches more and more unit value. However, higher doping increases lattice defects and displacement in the semiconductor substrate. Due to the heavy doping, the diffusion length of the minor carriers in the doped region decreases. The reduction in doping results in current transistors in the current gain.

SUMMARY OF THE INVENTION The present invention is based on the object of providing a semiconductor device whose characteristics would be substantially improved and, in particular, would have a substantially increased current gain factor with a greatly improved noise figure. In particular, it is a semiconductor device with many transitions, which at the same time, with slight deviations in the thermal induced characteristics, also has a high breakdown voltage. Finally, it is an object of the invention to design a new semiconductor device so that it could be used as part of an integrated circuit simultaneously with prior transistors including complementary transistors.

The solution according to the invention consists essentially in that the first region consists of a first and a second part having different dopant concentrations and a common interface to form a transition, the first part of the first region adjacent to the first PN junction and having a dopant concentration lower than the second dopant concentration the thickness of the first portion of the first region is greater than the thickness of the second portion of the first region, the thickness of the first portion of the first region is less than the diffuse length of the minor carriers in the first region, and the array is embedded in the first region.

This achieves that the drift current generated by the built-in field substantially balances the diffuse current of the minor carriers injected from the first PN junction into the first region.

According to a preferred embodiment of the invention, the thickness of the first portion of the first region, adding the thickness of the second portion of the first region, is less than the diffuse length of the minor carriers in the first region.

Preferably, the diffusion length of the minor carriers in the first region is in the range of 50 to 100 µm.

According to another embodiment of the invention, the first portion of the first region is an epitaxial layer and the second portion of the first region is a diffusion layer.

According to another embodiment of the invention, the concentration of impurities in the first part of the first region is "

less than 10 atoms / cm.

According to a preferred embodiment of the invention, the first region forms an emitter region and the dopant concentration in the first portion of the first region is less than the dopant concentration in the second portion of the first region.

In the prior art transistors, it is assumed that the diffusion length of the minor carriers is of the order of 1 to 2 µm. For the semiconductor device according to the invention, on the other hand, the diffusion length of the minor carriers is 50 to 100 μα. the current gain factor for a conventional transistor is usually about 500, while for the semiconductor devices of the invention a value of 3000 or higher can be achieved. By providing a transition between the low-doped and the heavily doped regions with the same dopant in the emitter, a drift current can be achieved that substantially balances the diffuse current of the minor carriers.

Furthermore, the semiconductor device according to the invention has a high value h _FE , namely the current gain factor for the grounded emitter, at a low noise number. This semiconductor device has a low concentration of impurities in the emitter region and such diffuse length of minor carriers,

21229, which is considerably larger than the emitter width, and for which only a low recombination rate and a good crystal lattice can be found.

The invention will now be described by way of example with reference to the accompanying drawings, in which: FIG. 1 is a partial cross-sectional view of a NPN transistor according to the invention; Fig. 2 shows the profile of dopants for the semiconductor device of Fig. 1 as well as the concentration of minor carriers in the emitter region; Fig. 3 is a partial cross-sectional view of an integrated circuit switching chip having my NPN transistor according to the invention and, moreover, the prior art PNP transistor which forms an additional pair of transistors in the integrated chip; Fig. 4 is a graphical representation of the emitter mass gain factor (hp _E ) as a function of the collector current; Fig. 5 is a graphical representation of the noise factor as a function of frequency at an input impedance of 1000 ohms; FIG. 6 is a graphical representation of the noise factor in frequency function at an input impedance of 30 ohms; Fig. 7 is a graphical representation of the noise factor characteristics as a collector current.

As a preferred embodiment of the invention, the NPN transistor will first be explained with reference to Figure 1. Reference numeral 1 denotes a substrate heavily doped with N-type impurities, in particular a silicon substrate heavily doped with antimony. The doping concentration is preferably 4 * 10 < 6 > .mu.m. This gives a specific resistance of approximately 0.01 ohm.cm. It has been found that this doping can vary between 0.008 and 0.012 ohm.cm. The substrate thickness is preferably about 250 µm.

£ on the substrate is formed of silicon epitaxial layer 2 of type H ^_> which ppolečně substrate £ N ⁺ is used as a collector. This epitaxial layer 2 is relatively little doped with antimony, only to obtain a doping concentration of 7 x 10 ¹⁴ cm @ -1. The specific resistance is about 8 to 10 ohm.cm. The epitaxial layer preferably has a thickness of about 20 µm.

To form the active base for the transistor, a P-type silicon epitaxial layer 6 is then formed on the N-type layer 2. For doping of boron may be used in such an amount that it reaches the dopant concentration of 1 × 10 ¹ cm ^ ^- ^. The specific resistance is 1.5 ohm.em. Layer thickness. is approximately 5 µm.

To form an emitter, an N-type epitaxial layer 6 is formed on the P-layer.

The layer 6 is relatively slightly doped with antimony, with the concentration of the subsidy being approximate

15—3 *

5.5 x 10 cm. The specific resistance is approximately 1 ohm.em. The thickness of the layer 6 is approximately 2 to 5 µm.

A N ⁺ type diffusion layer 6 is then formed which is strongly doped with phosphorus. This D20-3 fusion layer 6 has a surface doping concentration of approximately 1.0 c and a thickness of approximately 1.0 .mu.m.

The N-type diffusion layer 6 strongly doped with phosphorus surrounds said NPN transistor.

—3

The subsidy is a surface concentration of approximately 3 x 10 cm. This doping penetrates the P ^- type layer £ into the N-type layer až until the N ^- type region ^{+ of the} substrate has been reached. This surrounds the base region 6.

A P-type diffusion area 6 is provided as a conductive connection to the base area 6. The area 3-3 is doped with boron with a surface concentration of approximately 3 x 10 cm. The diffused area á penetrates the N-type layer do into the P-type base layer,, which delimits and surrounds the emitter area £.

The diffused P-type region 8 forms a base-contact region and consists of a region strongly up to β-3 boronized. The surface concentration of doping is approximately 5 x 10 cm.

An aluminum collector electrode 6 is formed on the bottom surface of the substrate. An aluminum base electrode 12 is placed on the base contact area 8. An aluminum emitter electrode 11 is formed on the heavily doped emitter region 2.

For passivation, the top surface of the device is covered with a layer 67 of silica.

It follows from the above construction that the N-type layer 2 and the P ^- type layer 2 form a collector-base transition 12. The P-type layer 2 and the N-type layer 2 form an emitter-base transition 13, while between the N-type layer 2 and the N ⁺ type 2 a 14 LH transition with the same type of impurities is formed. (The designation LH indicates the transition between two consecutive areas with the same type of admixture, with one, L, slightly subsidized and the other, H, heavily.)

The width or distance W _E between the emitter-base transition 13 and the LH transition 14 is about 6 µm.

Giant. 2 shows the impurity profile and the concentration of minor carriers in the emitter of the semiconductor device described above. The upper part of FIG. 2 shows the relative position of the emitter, base and collector. The middle part of the diagram illustrates dopant concentrations in atoms per cubic centimeter, as measured from the outer surface of the respective bearing up to the region of the substrate and · Bottom figure shows the relative proportion of the concentration of minority carriers in different areas, starting with the two ^{N +} via the emitter region 2 · If the diffusion length the minor carriers is smaller than the emitter width, giving the minor carrier profile given by the dashed line (g). If an embedded field is present which, however, as will be explained below, is not strong enough, the course of the concentration of minor carriers will be obtained as shown by broken line (b).

A semiconductor device of this design gives a high h _pE value at low noise. To explain the reasons for this phenomenon, it should be noted that the current gain h of the _EE emitter is one of the important parameters of the transistor.

This parameter is essentially defined by:

where a denotes the current gain of the base (wherein the base is based on mass). Current gain and is given by:

«= F < ⁺ . (1 (2) where a ⁺ is the current gain factor of the collector, β is the base transfer factor and Y is the emission efficiency of the emitter.

For an NPN transistor, the emission efficiency Y of the emitter is given by:

Jn 1

Y = - = --- ₍₃₎

Jn + Jp 1 + Jp / Jn where Jn is the electron current density resulting from electrons injected from the emitter into the base through the emitter-base transition, and Jp is the hole current density that results from the holes injected in the reverse direction through the same transition from base to emitter.

The electron current density Jn is given by:

qv

q.Dn.np pp _. (e ^kl -1)

Ln (5) (5)

The density Jp of the hole current is given by:

q.Dp-Pn _Jp = —Lp where Ln denotes the electron diffusion length in the P-type base, Lp the diffusion length of the holes in the N-type emitter, Dn the diffusion electron constant, Dp the diffusion constant of the holes, state, Pn the concentration of the minor holes in the N-type emitter at equilibrium, the voltage connected to the emitter-base transition, the T temperature and the charge of the electron, wherein J 1 is the Boltzmann constant.

The value of the ratio Jp to Jn can then be written as follows:

Jp Ln Dp Pn Jp Lp Dn np

In addition, the ratio can be written as follows:

Lp Dn Njj

Thus, the ratio can be replaced by:

(6)

Pn N.

Where N denotes the base region dopant concentration, N denotes the emitter region dopant concentration, and W the base width or range that limits the diffusion length of the electrons Ln in the base region.

The carrier diffusion constants Dn and Dp are functions of carrier mobility and temperature and can in principle be assumed constant.

In the device of FIG. 1, a weakly doped emitter 6 is formed between the emitter base base 13 and the LH transition 14 so that the Lp value becomes very large. Assuming that the weakly doped emitter, for example, has an admixture concentration of 5.5 x 10 & lt ^; -1 &gt; cm ^& lt ^; -1 &gt;

In the prior art transistor, on the other hand, due to recombination below the emitter surface, the diffusion length of the minor emitter carriers would be equal to or less than the thickness Wg of the emitter region. Thus, an important feature of the invention is that the diffusion length of minor emitter carriers is greater than the width or distance W _E between the emitter-base transition and the LH transition in the weakly doped emitter.

Another important feature of the invention is that the L-H transition 1.4 lies in a weakly doped emitter 8. This L-H transition 14 forms a so-called embedded field in the emitter £ which acts in such a way that the perforated current is reflected from this emitter-base transition 13 to this transition.

If the embedded L-H transition field is large enough, the diffuse hole current is compensated and becomes approximately equal to the drift hole current due to the field in the weakly doped emitter. The compensation thus produced causes a reduction in the hole current β injected from the base into the weakly doped emitter £ through the emitter-base transition 13.

In the invention, the embedded field changes equation (5) as follows:

qv

Pn řa

J'p = q.Dp .—. ( _E -U.tgC-®)

Lp Lp '(the condition Lpi >> W _E applies).

(8) q in ^{Pn, W} E. kT »q.Dp. — τ-A (e ^K -1) i / p

Since the potential difference 0 of the built-in array is large and because ~ £ ψ. »1> e holds (for example = 10; 0 = 0.2 volts) and furthermore because of the large Lp value the hdd Wg * is greatly reduced, that J p approaches zero.

^L P

The decrease Jp causes the value Y according to equation (3) to be approximately unitary, while the value a according to equation (2) increases and the value h _{FE also} increases according to equation (1).

The very low noise characteristics can be explained as follows: the lattice defect or offset is greatly reduced since the emitter-base transition 13 is formed by a weakly doped emitter a as well as a weakly doped base b. The admixture concentration of the weakly doped emitter by should be limited to approximately less than 10 ^{, s} cm “ ^{, taking into} account the rubber characteristics, durability τ and diffusion length Lp of the minor carriers.

Another low sum inducing Sinitel is that the emitter current flows in the weakly doped emitter £ and also the weakly doped base £ in a substantially vertical direction.

The L-H transition is, as mentioned, formed between weakly doped and strongly doped regions of the same conductivity type. The L-H transition is substantially impermeable or impenetrable to minor carriers but not to major carriers.

The high current gain hpg of the emitter relative to the mass is shown in Fig. 4. The difference between the curves 16 and 16 results only from a different planar arrangement. However, both curves show a very high current gain gain factor when the emitter is referenced to the mass. The curve 17 in Fig. 5 shows the noise characteristic as a frequency function for the semiconductor device shown in Fig. 1. The curve 18 in Fig. 5 shows the noise characteristics for the prior art semiconductor device with the lowest known noise values. The curves 19 and 20 in Fig. 6 show the same parameters as in Fig. 5, but at different input impedance.

Giant. 7 shows a noise value diagram, wherein the curve 21 refers to a known good semiconductor device compared to the noise characteristic 22 of the present invention, for example the embodiment of FIG. 1. Curves 21 and 22 are referenced to the sum factor at 3 db. What lies within the parabolic curve is below 3 db. Thus, it will be appreciated that FIGS. 5, 6, and 7 and 4 illustrate the noticeable improvement achievable by the present invention over prior art semiconductor devices.

Giant. 3 shows a second embodiment of the invention in which the NPN of FIG. 1 is integrated into an integrated switching circuit together with one or more other semiconductor elements, such as a PNP of conventional design. These two elements form an additional pair of transistors. A NPN 31 transistor is formed in the P-type substrate 30. in the manner explained in connection with FIG. 1. This includes a heavily doped collector 6, a weakly doped collector 6, a weakly doped base 6, a weakly doped emitter 6, a heavily doped zone 6, a collector connection area 6, a collector contact area 15. , a base contact region 8, a collector electrode 6, a base electrode 10, and an emitter electrode 11. In the same substrate 30, a conventional PNP transistor 32 is formed which consists of a P-type collector 63, N ^- type base 64, P ⁺ emitter 38 a P-type collector connection 37, a P-type collector contact area 48, a N ⁺ -based contact area 35, a collector electrode 39, a base electrode 40, and an emitter electrode 41. Both transistors 31 and 32 are electrically insulated from each other by transitions Pn. The P-type insulating region 50 is coupled to the substrate 30 and surrounds both NPN and PNP transistors 31 and 32 respectively. Three N-type regions 61, 62, 66 surround the PNP transistor 32 as a cup-like insulating region.

A large number of pairs or triples are simultaneously formed in this integrated switching circuit. For example, regions 1 and II of the N ⁺ type are formed by selective diffusion into the P-type substrate P0.

N-type regions 2 and 62 are formed by epitaxial growth. The P-type region 6, which forms the base of the NPN-type transistor 31, and the region 63 which forms the collector of the PNP-type transistor 32, are formed by epitaxial growth or selective diffusion. The N-type region (weakly doped NPN transistor) and the PNP-base region 64, are formed by N-type epitaxial growth. N ⁺ -type regions 6 and 66 are formed by N ^- type diffusions. The P ⁺ regions 8, 38 and 48 are formed by P ^- type diffusion. The N ⁺ regions, namely region 2 (NPN transistor), region 15 (NPN contact collector contact area), and region 35 (PNP base contact region), creates diffusion.

The term substantially flat, used to characterize the state of concentration of minor carriers of the active emitter region, is to be understood as having the total value of minor carriers injected from the active base region into the active emitter region, and minor emitter carriers moving due to the embedded field in the inverted direction in the active region of the emitter is relatively flat. This state is indicated for the emitter region by the curve s ⁱⁿ FIG. 2, which runs substantially horizontally.

Although the invention has been explained with respect to FIG. 1 on an NPN transistor, it should be noted that a similar design and a comparable PNP transistor can also be made. The invention can also be used to manufacture a semiconductor thyristor of the NPNP type.

In summary, the present invention provides a multi-pass semiconductor device with a very high current gain factor having a low concentration of impurities in the emitter region, diffuse length of injected minor carriers exceeding the emitter width, low surface recombination rate and good crystal lattice. The described preferred embodiment of the invention has a high concentration region of the same type as the ernitor, which region overlaps at least a portion of the emitter region, while forming an L-H transition that reflects minor carriers as a drift current back to the base region.

The whole arrangement is such that the drift current bordering the L-H transition substantially eliminates the diffuse stream of minor carriers that is injected from the base region because of its reverse direction.

Claims (6)

SUBJECT OF THE INVENTION A semiconductor device comprising a first semiconductor area of one conductivity type, a second semiconductor area of another conductivity type having a common part with a first region forming a first PN junction, a third semiconductor area of a first conductivity type having a common part with a second region forming a second a PN junction, wherein in operation the majority carriers pass from the first region through the second region to the third region, characterized in that the first region consists of first and second portions (4, 5) having different admixture concentrations and a common interface to form a transition (14) LH, wherein the first portion (4) of the first region is adjacent to the first PN junction (13) and has an admixture concentration lower than that of the second portion (5) of the first region, the thickness of the first portion (4) of the first region being greater than the thickness of the second portion (5) first area thickness the first portion (4) of the first region is less than the diffusion length of the minor carriers in the first region, and a field is embedded in the first region. 2. The semiconductor device of claim 1, wherein the thickness of the first portion (4) of the first region plus the thickness of the second portion (5) of the first region is less than the diffusion length of the minor carriers in the first region. 3. The semiconductor device of claim 2, wherein the diffusion length of the minor carriers in the first region is in the range of 50 to 100 [mu] m. 4. The semiconductor device of claim 1, wherein the first portion (4) of the first region is an epitaxial layer and the second portion (5) of the first region is a diffusion layer. 5. Semiconductor device according to claim 1, characterized in that the concentration of impurities The 1R ϊ in the first part (4) of the first region is less than 10 atoms / cm. 6. The semiconductor device of claim 1, wherein the first region forms an emitter region and the dopant concentration in the first region portion (4) is less than the dopant concentration in the second region portion (5).