CS210413B1 - Circuit of analog-to-digital floating jump voltage converter circuit - Google Patents

Abstract

Circuit connection of an analog-to-digital converter of a floating step voltage to remove parasitic additive components of the sensed electrical signal, which are usually Saš and temperature unstable and whose long-term compensation is difficult, by a converter with a series circuit of a first capacitor, a resistor and a second capacitor, bridged by a switching element, connecting the third capacitor by a switch to the conductor connecting the first capacitor and the resistor.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The invention relates to a circuit of an analog-to-digital floating step voltage converter and to a series circuit of a first capacitor, a resistor and a second capacitor spanned by an element.

Electrical measurements of non-electrical quantities do not impose high demands on the accuracy of the differential measuring instruments. However, the sensed electrical signal often contains, in addition to the component of the measured quantity, also parasltic additive components, caused, for example, by residual or quiescent current flow, its dark resistance and the like.

These parasitic components of the sensed electrical signal are generally time and temperature unstable and their long-term purchasing is difficult. Short-term compensation can be applied to the jump signal of the sensor signal if its amplitude is proportional to the measured quantity. The step change can be realized by connecting a capacitive sensor, for example integrating ionization _and Sn chambers to the input of a high input impedance element, for example a UOS transistor, or by applying luminous flux to the input window of the photocell and the like. The compensation then consists in assigning a zero input value to the state of the sensor before the step function arrives.

It therefore seemed expedient to find a suitable analog-to-digital converter that would allow measurement independently of the zero level of the unmeasured variable *

The aforementioned disadvantages are avoided by connecting an analog-to-digital floating step voltage converter with a serial circuit of a first capacitor, a resistor and a second capacitor bridged by a switching element according to the invention, characterized in that the third capacitor is connected to a conductor connecting the first capacitor and resistor.

The circuit according to the invention is legally measuring step changes and rectangular pulses whose duration is longer than the converter's conversion time, wherein these step changes can be superimposed on a floating DC voltage.

In the following, the invention is explained in more detail and described with reference to the accompanying drawings, in which: FIG. 2 shows the setting of the transducer operating point by means of the third capacitor, and FIG. 3 shows, by way of example, a specific possible embodiment according to the invention.

Fig. 1 shows a simplified circuit and shows a series circuit of a first capacitor C1, a resistor R, a second capacitor ₁₂ , these elements being passive circuit elements. The input voltage U, corresponding to the jump function voltage, the point Uj, corresponding to the voltage at the point of the divider formed by the first capacitor CL, the resistor R * 42 - I · V »and the second capacitor ° 2». px * age K.

The voltage jump function U _g is defined by:

for t <t _Q

U _e - U ₀ + AU _e for where t is time

210 413

The operation of the ideal switching element K can be seen from the following table of the dependence of the impedance Zg of the switching element K on the voltage of the lig on this switching element 6:

Ug is growing: Ug Ug Ug «oo Zg

Ug falls: Ug> Ug U _L ⁰ ¾

The voltage Ug and U charakter characterize the hysteresis of the switching element K. At time t <t _{Q the following} shall apply:

^U R ^U K - *%> 1¾

- o * ^P L

OO then at the time tt _Q with the arrival of the step voltage and e the voltage U _R increases to 4 * Ug + hU _g and after meeting the condition ^U K> Ug the element £ is closed and the second capacitor C _{2 is} partially discharged. The switch element 6 is closed and the second capacitor Cg is recharged to Ug Ug by the first capacitor Op resistor R, the second capacitor Cg. The process then repeats until the Ug falls below ^U H *

Each time the splitting element 6 is opened, the charge Q (Ug - ^ρ ι> σ ₂ ) is transferred by the circumference of the first capacitor Cp of the resistance g and the second capacitor Cg, causing a decrease in the voltage Ug by the value

AUa, _

ΪΪ

If the switching element X generates a logioccal level pulse each time it opens, then the amplitude of the change in the input voltage U ₀ can be assigned to a number of n-pulses according to the relation:

AUg »BAUg and thence ° 1 * ^P N ° 2

Therefore, the analog-to-digital converter is independent of U _Q , i.e., the floating baseline of the jump voltage. The condition of validity of the above mentioned relationship is firstly to set the voltage Ug before the change of the step voltage changes to a value close to Ug, but the Ug must be true, and the iapedamoe of the input voltage U _g must be small in comparison and resistance S.

Fig. 2 shows the setting of the transducer operating point by means of the third capacitor 0 and the switch S. voltage U _g , voltage Ug, auxiliary voltage and switching element K.

An auxiliary voltage circuit fJJ is used to set the voltage Ug to a value close to Ug.

210 413 of the third capacitor C1 and the switch S connected to the voltage U _R. When the switch contact S is moved to the lower position at time t <t ₀ , the initial charge redlstribuol occurs first on the first capacitor and the third capacitor C1. The magnitude of the auxiliary positive voltage + Π and the ratio between the first C ₁ and the second Cg capacitor must be chosen so that the condition Ug> Dg is fulfilled for the assumed range of values ^U o 'ie · the basic level of the jump Zmhhp.

This is activated by operation of the switching element K and the process takes place, which has already been described in the description funkoe in vttfehu to FIGS · 1, except that the second capacitor C ₂ is charged parallel circuit of the first capacitor C ^ with the serial circuit of the third capacitor C Y, resistor S and the second capacitor C _2> Prooes will stop when the -% state is reached.

When the contacts of the switch S are returned to the upper position, the voltage does not change and the circuit is ready to convert a step change. The compensating voltage is fed to the first capacitor C1. During the operation of the DC + U, the third capacitor C and the switch S, the output of the switching element K generating logic level pulses must be blocked.

A specific embodiment of the circuit according to the invention is shown in the accompanying drawing in Fig. 3, where the series circuit shows a first capacitor Cp resistor R, a second capacitor C _g , a third capacitor C 4, a switch S and a switching element K. -transistor 1, silicon diode 2, four logic gates 2? With S £ # variable resistor 1 and emitter resistor 8. The basic part of the switching element K is the Sohmitt flip-flop, consisting of a series-connected bipolar logic gate J, β, bridged by feedback - a variable resistance X, allowing the voltage difference Ug and U U to be set. When the input voltage of the Sohmitt circuit rises above the Ug value, its output is log 1, while the decrease according to the output is log 0. The additional gate serves to invert the output signal phase and diode 2 guarantees high impedance of the output on the inverter in log 1 state. The MOS-based voltage has the function of impedance matching the output capacitance of the second capacitor Cg and the input of the Sohmitt circuit. The working point of the MOS transistor must be set so that at * 0 * 0.7 V at the gate, the condition * E * ^U L is met

The output gate can be blocked at the time of the auxiliary capacitance of the third capacitor 0 ^ by a log 0 potential controlled by switch S.

Claims (1)

Circuit of an A / D converter and a serial circuit of a first capacitor, a resistor, a second capacitor bridged by a switching element, characterized in that the third capacitor <cp is connected by a switch (S) to a conductor connecting the first capacitor (cp and resistor (R)) .