CN87105937A - The surface treatment method of directly bonding semiconductor - Google Patents
The surface treatment method of directly bonding semiconductor Download PDFInfo
- Publication number
- CN87105937A CN87105937A CN87105937.1A CN87105937A CN87105937A CN 87105937 A CN87105937 A CN 87105937A CN 87105937 A CN87105937 A CN 87105937A CN 87105937 A CN87105937 A CN 87105937A
- Authority
- CN
- China
- Prior art keywords
- plasma
- semiconductor chip
- surface treatment
- treatment
- processing method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The surface treatment method that is used for the semiconductor chip Direct Bonding, the using plasma surface treatment not only can increase the OH concentration of semiconductor surface, and can increase atom activity in the superficial layer.Thereby enlarge markedly bond strength.This method can be finished when semiconductor surface is grown insulating barrier, and is easy to operate, and cost is low, is convenient to use in batch process.
Description
The present invention is a kind of surface treatment method that is used for the semiconductor chip Direct Bonding, belongs to semiconductor chip Direct Bonding technology.
Utilize the semiconductor chip Direct Bonding to prepare SOI(Semiconductor on Insulator), the technology of IOS or PN junction material.At first be that American scholar proposed in 1985.And Japanese scholar made this technical applicationization in 1985.At SDB(Semiconductor Direct Bonding) in the technology, the technology of a key is semiconductor chip to be carried out surface hydrophilic handle.At present, in the document of publishing, only mention with certain acid or organic base and carry out surface treatment, and do not disclose concrete chemical formulation and process conditions.
The new method that the object of the present invention is to provide a kind of SDB of being used for technology semiconductor chip surface hydrophilic to handle.
The present invention utilizes semiconductor chip can increase the OH concentration of superficial layer and the principle of superficial layer atom activity through the plasma surface treatment of suitable gas, and the semiconductor chip that is used for Direct Bonding is carried out surface treatment, thereby increases the bond strength of semiconductor chip.Characteristics of the present invention are cleaned semiconductor chip placed utilizes direct current, DC arc, interchange, high frequency or microwave method to excite the plasma of generation to carry out surface treatment, and treatment temperature is a room temperature to 1300 ℃, preferably is controlled at 500~1000 ℃; Plasma is O
2, H
2, N
2, HN
3, H
2The gas that O or its proper proportion are mixed, the mixed proportion of gas can be 10: 1~1: 10.Handled semiconductor chip can be an Intrinsical.Also can be doping type (N type or P type), can also be the semiconductor chip of insulating barrier of having grown on the surface.The time of plasma treatment is 5~140 minutes.This processing method both can be carried out separately, also can carry out with suitable chemical treatment combination.
The present invention compares with existing chemical hydrophilic treatment method, has the following advantages:
1. chemical hydrophilic treated just increases the OH concentration on semiconductor chip surface, and the plasma physics chemical treatment both can increase the OH concentration of semiconductor surface, can increase atom activity in the superficial layer again.Thereby enlarge markedly bond strength.2. plasma physics chemistry hydrophilic treated can be finished when semiconductor surface is grown insulating barrier.3. plasma physics chemistry hydrophilic treated is carried out in a vacuum, has reduced semi-conductive contamination.4. plasma physics chemistry hydrophilic treated cost is low, is convenient to use in batch process.
The present invention can adopt the mode of the following example to realize: the silicon chip after cleaning through mirror process and with chemical cleaning solution, be put in the plasma process system, and vacuumize earlier that (vacuum degree is 10
-1~10
-5Torr), add the oxygen plasma that excites with the 10MHZ high frequency electric source again, substrate is heated to 900 ℃, makes the certain thickness SiO of superficial growth
2Behind the film, pass to N again
2And HN
3Mist, both ratios can be (N
2: NH
3=1: 1), silicon chip gets final product through 20 minutes plasma treatment.
Claims (5)
1, the surface treatment method that is used for the semiconductor chip Direct Bonding, it is characterized in that placing the plasma that utilizes direct current, DC arc, interchange, high frequency or microwave method to excite generation to carry out surface treatment, treatment temperature half cleaned guide card is room temperature to 1300 ℃, plasma is O
2, H
2, N
2, HN
3, H
2The gas that O or its proper proportion are mixed.
2, processing method according to claim 1, the optimum range that it is characterized in that treatment temperature is 500~1000 ℃, the processing time is 5~40 minutes.
3, processing method according to claim 1 and 2, the mixed proportion that it is characterized in that plasma is 10: 1~1: 10, preferably N
2: NH
3=1: 1.
4, processing method according to claim 3 is characterized in that handled semiconductor chip can be an Intrinsical, also can be doping type (N type or P type), can also be the semiconductor chip of insulating barrier of having grown on the surface.
5, processing method according to claim 4 is characterized in that plasma treatment can carry out with suitable chemical treatment combination.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN87105937.1A CN1003900B (en) | 1987-12-12 | 1987-12-12 | Surface treatment method of semiconductor direct bonding |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN87105937.1A CN1003900B (en) | 1987-12-12 | 1987-12-12 | Surface treatment method of semiconductor direct bonding |
Publications (2)
Publication Number | Publication Date |
---|---|
CN87105937A true CN87105937A (en) | 1988-06-01 |
CN1003900B CN1003900B (en) | 1989-04-12 |
Family
ID=4815517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN87105937.1A Expired CN1003900B (en) | 1987-12-12 | 1987-12-12 | Surface treatment method of semiconductor direct bonding |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1003900B (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1305110C (en) * | 2004-09-10 | 2007-03-14 | 北京工业大学 | Direct bonding method for silicon sheet at low temperature |
CN101908472A (en) * | 2010-06-25 | 2010-12-08 | 上海新傲科技股份有限公司 | Method for preparing semi-conducting material with insulation layer embedded with nanocrystalline |
CN103624032A (en) * | 2012-08-23 | 2014-03-12 | 中芯国际集成电路制造(上海)有限公司 | Single wafer cleaning method |
CN103854962A (en) * | 2012-11-28 | 2014-06-11 | 中芯国际集成电路制造(上海)有限公司 | Cleaning method after wafer etching |
CN106409650A (en) * | 2015-08-03 | 2017-02-15 | 沈阳硅基科技有限公司 | Silicon-wafer direct bonding method |
CN106783645A (en) * | 2016-11-29 | 2017-05-31 | 东莞市广信知识产权服务有限公司 | A kind of method of diamond and GaN wafer Direct Bondings |
CN108597993A (en) * | 2018-07-05 | 2018-09-28 | 西安交通大学 | A kind of Direct Bonding method of gallium nitride/diamond |
-
1987
- 1987-12-12 CN CN87105937.1A patent/CN1003900B/en not_active Expired
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1305110C (en) * | 2004-09-10 | 2007-03-14 | 北京工业大学 | Direct bonding method for silicon sheet at low temperature |
CN101908472A (en) * | 2010-06-25 | 2010-12-08 | 上海新傲科技股份有限公司 | Method for preparing semi-conducting material with insulation layer embedded with nanocrystalline |
CN101908472B (en) * | 2010-06-25 | 2015-10-14 | 上海新傲科技股份有限公司 | Embed nanocrystalline method for preparing semi-conducting material in a insulating layer |
CN103624032A (en) * | 2012-08-23 | 2014-03-12 | 中芯国际集成电路制造(上海)有限公司 | Single wafer cleaning method |
CN103624032B (en) * | 2012-08-23 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | A kind of monolithic cleaning method of wafer |
CN103854962A (en) * | 2012-11-28 | 2014-06-11 | 中芯国际集成电路制造(上海)有限公司 | Cleaning method after wafer etching |
CN103854962B (en) * | 2012-11-28 | 2017-05-17 | 中芯国际集成电路制造(上海)有限公司 | Cleaning method after wafer etching |
CN106409650A (en) * | 2015-08-03 | 2017-02-15 | 沈阳硅基科技有限公司 | Silicon-wafer direct bonding method |
CN106783645A (en) * | 2016-11-29 | 2017-05-31 | 东莞市广信知识产权服务有限公司 | A kind of method of diamond and GaN wafer Direct Bondings |
CN108597993A (en) * | 2018-07-05 | 2018-09-28 | 西安交通大学 | A kind of Direct Bonding method of gallium nitride/diamond |
CN108597993B (en) * | 2018-07-05 | 2024-03-12 | 西安德盟特半导体科技有限公司 | Gallium nitride/diamond direct bonding method |
Also Published As
Publication number | Publication date |
---|---|
CN1003900B (en) | 1989-04-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR900007686B1 (en) | Vapor-phase growth process | |
TW409418B (en) | SOI silicon wafer and its manufacturing method | |
JP3119693B2 (en) | Semiconductor substrate manufacturing method and apparatus | |
AU745460B2 (en) | Method of manufacturing semiconductor article | |
CN101438395B (en) | Semiconductor on glass insulator made using improved thinning process | |
US20020127820A1 (en) | Semiconductor substrate and method for producing the same | |
JP2009501440A (en) | Method for reducing the roughness of thick insulating layers | |
MY116313A (en) | Method and apparatus for heat-treating an soi substrate and method of preparing an soi substrate by using the same | |
JPH06168922A (en) | Vapor etching method of silicon | |
JPH04119626A (en) | Manufacture of junction wafer | |
US20070117350A1 (en) | Strained silicon on insulator (ssoi) with layer transfer from oxidized donor | |
KR20100057023A (en) | Ultra thin single crystalline semiconductor tft and process for making same | |
US20080057678A1 (en) | Semiconductor on glass insulator made using improved hydrogen reduction process | |
CN87105937A (en) | The surface treatment method of directly bonding semiconductor | |
CN102832160A (en) | Preparation method of SOI (silicon on insulator) silicon wafer | |
WO2001047006B1 (en) | Tunnel nitride for improved polysilicon emitter | |
GB2280312A (en) | Method of preparing semiconductor with good intrinsic gettering | |
EP3652780B1 (en) | Method of manufacture of a semiconductor on insulator structure | |
JPS63129633A (en) | Surface treatment for semiconductor | |
CN102790007A (en) | Method for preparing TM-SOI (Thick-Membrane Silicon-On-Insulator) silicon chip | |
JPS6380525A (en) | Formation of coat | |
CN1028464C (en) | Thining method for silicon bound to insulator | |
JP2595935B2 (en) | Surface cleaning method | |
JPH11260793A (en) | Etching method and etching equipment of semiconductor base material and forming method using the equipment | |
JPH05213695A (en) | Method for depositing thin diamond film |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
C10 | Entry into substantive examination | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
C13 | Decision | ||
GR02 | Examined patent application | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |