CN85104332A - Bus configuration and method thereof to the addressed device unit - Google Patents

Abstract

Disclosed herein is a kind of bus configuration that the address is provided for unit (10).Each unit (10) obtains its address automatically and any switch need be set according to own relative physical location in cellular organization (10).Briefly, this is to obtain by the modification of each unit being carried out bus conductor.Here comprise the termination of a lead (13), the adding of a lead (21) and the relative variation of other lead.

Description

Bus configuration and method thereof to the addressed device unit

In general, the present invention relates to a kind of bus configuration that is used to unit that the address is provided; More particularly, the present invention relates to a kind of like this bus configuration, in this kind bus configuration, each independent unit basis oneself residing relative physical location in the unit tissue automatically obtains its address, and the device of any switch and so on need not be set.

When erecting equipment, the common practice is to set an address to each unit.By this way, can carry out addressing uniquely and it is controlled and irrelevant with other unit each independent unit.In the past, this addressing by switch being set to suitable position, determines unique address just can for each unit always by using P cock (for example DIP dual-in-line package switch) to see in fact on each unit.But can expect as people, be that the address is set is time-consumingly to make the operator produce mistake again easily in the various device unit with this kind method.

The objective of the invention is: when a unit and miscellaneous equipment unit are connected to each other, automatically provide an address, produce wrong chance thereby reduce the operator to it.

More particularly, the present invention has used a kind of addressing bus of uniqueness, and the addressing bus of this uniqueness in each unit all is the same.Input one side (inlet) of address bus receives the signal from the neighbouring device unit, and these signals are sent to output terminal (outlet).In the process of carrying out this operation, address bus is made amendment, an input lead is stopped, pick up a ground wire simultaneously.These situations are described in detail with reference to the accompanying drawings.

In other words, the present invention is a kind of bus configuration that is connected to each other a plurality of units with following form, promptly only according in being connected to each other with the relative position of miscellaneous equipment unit, each unit is provided a unique address.Bus configuration in each unit comprises: a inlet with N end, and N is equal to or greater than two positive integer; Outlet with N end, this N end corresponds respectively to N end of inlet, and wherein second to N of the inlet end is connected with first to the N-1 end of outlet respectively, simultaneously, initial line is received the N end of outlet.

Below with reference to accompanying drawings the present invention is described in detail, the same section among each figure represents with same reference number, wherein:

Fig. 1 has represented eight according to the present invention and interconnective unit or frame;

Fig. 2 has represented the addressing bus of two equipment racks shown in Figure 1 in more detail;

Fig. 3 has represented the notch configuration in the unit in these unit or the frame;

Fig. 4 has represented first kind of modification of the embodiment shown in the figure;

Fig. 5 has represented second kind of modification of embodiment shown in Figure 1.

Be detailed description of the present invention below.

Fig. 1 has represented eight equipment rack 10a to 10h, total equipment rack (or unit) 10 that is referred to as.As shown in Figure 1, equipment rack 10a to 10h is connected to each other with bus 11b to 11h respectively.Bus 11b to 11h is total is referred to as bus 11, and they are identical each other.Bus 12 is added to frame 10a to the initial address bus.Should be noted in the discussion above that in Fig. 1 each equipment rack 10 accepts own address according to own with respect to the position of bus 12, that is to say that frame 10a obtains a special address, because it is the frame of reception bus 12; Equipment rack 10b obtains the address of oneself, because of it is a frame that is connected with frame 10a; Equally, it is a frame that is connected with frame 10b owing to it just that frame 10C obtains own address, or the like the rest may be inferred, up to 10h.These situations in Fig. 2, have been shown in more detail.The following describes Fig. 2.

Fig. 2's frame 10a and 10b has only drawn, and certainly, remaining frame all is interconnective in the same way.As shown in Figure 2, bus 12 comprises lead 13,14,15,16,17,18 and 19, and respectively by resistance 13a, 14a, 15a, 16a, 17a, 18a be connected with positive five V voltage sources with 19a (annotate: the value of each resistance is 5.1 kilohms among the resistance 13a to 19a).

As shown in Figure 2, provided the address ABCDEFG of equipment rack 10a in the bottom of square frame, its address is 1111111 in this illustrative embodiment certainly.Should be noted in the discussion above that equally lead 13 has just stopped after the address of equipment rack 10a is set up.Be also noted that, lead 14 to 19 continues across equipment rack 10a, a position then moves up, cause when lead 14 to 19 passes equipment rack 10b via bus 11B, their position is the position on the position when being in access arrangement frame 10a, added simultaneously a new lead (ground wire) again, with lead 21 expressions.Provided the address ABCDEFG of equipment rack 10b so again, this address now is a logical one 111110.When these leads pass equipment rack 10b, during by bus 11c, we just see their upward displacements once more, and uppermost lead is discarded, and add a new ground wire simultaneously.Therefore, the address of equipment rack 10c (not shown among Fig. 2) will be that then the rest may be inferred for all the other units for logical one 111100().These addresses (noncoding) have at length been represented in the table 1.Be this table below.

The table I

Equipment rack is the coded address, coded address not

ABCDEFG AA BB CC

10a 1111111 1 1 1

10b 1111110 1 1 0

10c 1111100 1 0 1

10d 1111000 100

10c 1110000 011

10f 1100000 010

10g 1000000 001

10h 0000000 000

Therefore as can be seen, the address of first frame (being frame 10a) is full logical one, and the address that nestles up the frame 10b on its right is and then logical zero of full logical one.The address of next frame (being frame 10c) is and then two logical zeros or the like of five logical ones.Until the address of frame 10h is full logical zero.By this way, each equipment rack 10 obtains a unique address, and the physical location of this frame among institute's organic frame combination only depended in this address.

Just as people can think of, represent frame address some trouble that seems with this seven bits.In order to simplify this address, can within frame 10, reduce to the triad number to them with an encoding scheme, this encoding scheme realizes (for example model is the assembly of SN74LS148) by one 8 line to 3 line scramblers.The net result of this volume case scheme had both been represented the non-coded address of each equipment rack 10 in the table shown in the table I, represented its coded address again.For example, the non-coded address of equipment rack 10a is 1111111, and its coded address is 111.In table, can also see the similar result of other frame 10.

Each frame 10 can be subdivided into eight notches, has schemed to have represented these notches, and four notches that its mid frame 10a arranges on top from left to right are notch 1 to 4, and four notches of frame mansion portion are notch 5 to 8.These notches can obtain unique address separately during addressing, for example obtain from 000 to 111 triad and count the address.Certainly this just need have three additional wire on address buss such as 11b and 11c.

Please note the table II below, wherein contain the non-coded address and the coded address of frame 10 when the groove slogan is also taken into account.As can be seen, last three figure places of each address (coding or noncoding) are exactly the notch address from the table II.

The table II

Coded address, the non-coded address of equipment rack groove slogan

10a 1 1111111111 111111

10a 2 1111111110 111110

10a 3 1111111101 111101

10a 4 1111111100 111100

10a 5 1111111011 111011

10a 6 1111111010 111010

10a 7 1111111001 111001

10a 8 1111111000 111000

10b 1 1111110111 110111

10b 2 1111110110 110110

10b 3 1111110101 110101

10b 4 1111110100 110100

10b 5 1111110011 110011

10b 6 1111110010 110010

10b 7 1111110001 110001

10b 8 1111110000 110000

10c 1 1111100111 101111

10c 2 1111100110 101110

10c 3 1111100101 101101

10c 4 1111100100 101100

10c 5 1111100011 101011

10c 6 1111100010 101010

10c 7 1111100001 101001

10c 8 1111100000 101000

10d 1 1111000111 100111

10d 2 1111000110 100110

10d 3 1111000101 100101

10d 4 1111000100 100100

10d 5 1111000011 100011

10d 6 1111000010 100010

10d 7 1111000001 100001

10d 8 1111000000 100000

10e 1 1110000111 011111

10e 2 1110000110 011110

10e 3 1110000101 011101

10e 4 1110000100 011100

10e 5 1110000011 011011

10e 6 1110000010 011010

10e 7 1110000001 011001

10e 8 1110000000 011000

10f 1 1100000111 010111

10f 2 1100000110 010110

10f 3 1100000101 010101

10f 4 1100000100 010100

10f 5 1100000011 010011

10f 6 1100000010 010010

10f 7 1100000001 010001

10f 8 1100000000 010000

10g 1 1000000111 001111

10g 2 1000000110 001110

10g 3 1000000101 001101

10g 4 1000000100 001100

10g 5 1000000011 001011

10g 6 1000000010 001010

10g 7 1000000001 001001

10g 8 1000000000 001000

10h 1 0000000111 000111

10h 2 0000000110 000110

10h 3 0000000101 000101

10h 4 0000000100 000100

10h 5 0000000011 000011

10h 6 0000000010 000010

10h 7 0000000001 000001

10h 8 0000000000 000000

Fig. 4 has represented another bus configuration scheme, and it is about three equipment racks, i.e. 30a, and 30b and 30c are generically and collectively referred to as frame 30.The principle of work of this allocation plan is the same with embodiment shown in Figure 2, and its difference is that interconnect bus (being bus 31b and 31c) and input bus 32 only have two leads.Therefore can only provide three addresses, i.e. logical one 1,10 and 00.

As shown in Figure 4, the address that frame 30a obtains is a logical one 1, and the address that frame 30b obtains is a logical one 0, and the address that frame 30c obtains is a logical zero 0.Input bus 32 is connected with positive five V voltage sources with 33b by the resistance 33a of 5.1K Ω.

Fig. 5 is similar to Fig. 4, and just input total defeated 42 is logical zero (being earth potential rather than positive five V).Therefore the address of frame 40a is a logical zero 0.Interconnect bus 41b connects together frame 40a and 40b, and interconnect bus 41c connects together frame 40b and 40c.The address of frame 40b is a logical zero 1, and this is to add positive five V voltages that come self-resistance 43a because of a lead to bus 41b; The address of frame 40c is a logical one 1, and this is because two leads of bus 41c all have positive five V voltages (coming self-resistance 43a and 43b) at this moment.

Claims (11)

1, a kind of bus configuration that is connected to each other a plurality of units (10) in the following manner, promptly only according in interconnecting with the relative position of miscellaneous equipment unit, each unit is provided a unique address, comprises in the bus configuration described in each unit:

Have an inlet (12) of N end, N is equal to or greater than two positive integer;

Outlet (11b) with N end, this N end is corresponding with described N end of described inlet respectively, second to the N end of wherein said inlet (12) is connected with first to the N-1 end of described outlet (11b) respectively, and initial line (21) is received the N end of described outlet (11b).

2, according to the bus configuration of claim 1, wherein said initial line is a ground wire.

3, according to the bus configuration of claim 1, wherein said initial line is connected to a supply voltage.

4, according to the bus configuration of claim 1, wherein N equals seven.

5, according to the bus configuration of claim 1, wherein N equals two.

6, according to the bus configuration of claim 2, wherein the voltage of a non-zero shape is supplied with described bus.

7, according to the bus configuration of claim 6, voltage wherein is positive five volts.

8, a kind of unit (10) of giving provides unique address De Static attitude method, and described method comprises:

A bus configuration is provided in each unit, thereby in each unit, when lead when (12) arrive corresponding outlet (11b) from the input port, a lead (13) of described bus stops, adjacent wires (14,15,16,17,18,19) move one separately, simultaneously a ground wire (21) is added to the rest position of described bus, make the lead number of described outlet (11b) equal the lead number of described inlet (12), and make described unit address acquisition by between described input port (12) and described outlet (11b), described bus being carried out tap (tapping).

9, according to the method for claim 8, wherein on following position, described bus is carried out tap (tapping) and obtained described address, promptly before a described lead (13) stops and before a described ground wire (21) adding.

10,, apply the voltage level of a non-zero shape wherein for described bus according to the method for claim 9.

11,, apply positive five volts of voltages wherein for described bus according to the method for claim 10.

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