CN2857377Y - Audio, video digital signal mixing transmission circuit - Google Patents
Audio, video digital signal mixing transmission circuit Download PDFInfo
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- CN2857377Y CN2857377Y CN 200520121653 CN200520121653U CN2857377Y CN 2857377 Y CN2857377 Y CN 2857377Y CN 200520121653 CN200520121653 CN 200520121653 CN 200520121653 U CN200520121653 U CN 200520121653U CN 2857377 Y CN2857377 Y CN 2857377Y
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Abstract
The utility model discloses a combined transfer circuit for audio and video signal on a same line; the device is equipped on both ends of the video digital signal transferring line; the device includes two main circuit parts of signal sending unit and signal receiving unit; the sending unit includes audio signal A/D converter, bit shift register, cache and specially purpose sending chip; the signal receiving unit includes audio signal D/A converter, bit shift register, cache, and special purpose receiving chip; the converted audio digital signal is sent to receiving unit after combined decoding with video signal and converted from parallel to serial by the support of software, and then reverted to analog audio signal and video signal for outputting in synchronize.
Description
Technical field
The utility model relates to video monitoring system, burglary-resisting system, the remote sound of outdoor LED display screen, as the improvement of wire transmission circuit.
Background technology
Be decorated with in the line transmission at remote sounds of needs such as video monitoring system, burglary-resisting system, outdoor LED display screens, audio signal and video signal transmission need be arrived a hundreds of rice even the outer distant place of km, conventional method is by different transmission line independent transmission with audio signal and vision signal, be suitable for the short and less occasion of channel number of transmission range, when transmission range outside km, channel number more for a long time, for example 5.1 channel audio signal have six sound channels, and the transmission line of 1 cover video and 6 cover audio frequency will make cost obviously increase.At present, the method of audio signal and video signal mixture transmission is generally the mixing transmission, promptly at signal sending end, the Voice ﹠ Video signal of different frequency is carried out mixing by frequency mixer, receiving terminal at signal is carrying out frequency division by frequency divider with the audio-video signal that this has different frequency, thereby the audio signal of isolating and vision signal, and then the hybrid remote that realizes audio-video signal is transmitted, but because in the mixing transmission course, need to adopt frequency mixer, frequency divider, equipment such as filter, cost is increased greatly, and because in signals transmission, need repeatedly handle signal, signal is decayed to a great extent, thereby effectiveness is reduced.
Summary of the invention
The technical problems to be solved in the utility model provides the circuit of realizing mixed transport on a circuit of a kind of effectively transmitting audio signal and vision signal.Only need to use a transmission line can finish audio signal and transmission of video signals, make technical costs low, the transfer rate of signal is higher.
For achieving the above object, the technological means taked of the utility model is on the same transmission lines audio signal to be mixed to embed serial video signal.The embedding principle of audio signal is as follows, be provided with N road audio signal and need transmission (having 6 tunnel) as 5.1 channel audio signal, the audio signal of N road simulation is behind the A/D converter of N road, convert the N group to, the voiceband data signal of every group of m bit (m=12 or other integer are decided on required precision), N group voice data deposits in respectively in the N group shift register, after the cascade of N group shift register, form one tunnel serial output, N group shift register can play and go here and there transformation.In time, voiceband data signal is the low-rate signal of whole continuous effective, and the vision signal effective two-forty signal that is discontinuity, in order to solve this species diversity, introduced FIFO type buffer again, but deposit to voice data low speed continuity FIFO in, and sense data from FIFO by phased manner at a high speed.Thereby form 1 Bits Serial voice data, add totally 32 of 7 spare control signals and 24 digital video data, can be under management software be supported, the composite video signal of mixing 16 of marshalling outputs, advance 1 dedicated transmitter that goes out (for example TLK2501 transceiver) through 16, once more and string convert 1 signal TXD to and finish outside transmission by same transmission line.7 spare control signals can be used for brilliance control, Gamma correction control, the control of volume tone color etc.
Receiving terminal a long way off, advance the RXD signal that 16 dedicated receivers that go out 6 (for example TLK2501 transceiver) will be come through transmission line by means of 1, convert 16 composite video signal to, by 24 rgb signals of the support of timing management software output, 7 spare control signals and 1 Bits Serial audio signal.24 rgb signals are used for showing, 7 spare control signals are used for control action, 1 Bits Serial audio signal is through FIFO type buffer, realize that voice data deposits FIFO at a high speed by phased manner in, and low speed continuity ground sense data from FIFO, through the string and the transfer process of N group shift register, output N group parallel audio data are changed whole the continuous audio signal that is recovered to the simulation of N road through N group D/A converter to the serial voice data more again.As seen, the data flow of receiving course is opposite with process of transmitting.Dedicated transmitter 5 and dedicated receiver 6 belong to prior art, in this omission.
Obviously different with vision signal, it is low that audio signal has transfer rate, all effective characteristics in the whole field time.Utilize this feature difference of audio signal and vision signal, warp and string transform and form one tunnel compound audio-video signal is a feasible program.The design of this circuit just is based upon on the basis of existing long-distance video Digital Transmission circuit.
Described signal transmitting unit comprises: audio A/D transducer, its signal input part links to each other with the corresponding output port of audio signal to be passed, the output port of audio A/D transducer is connected to shift register, digital signal after also string is changed is delivered to the write port of buffer, draw from output port from the digital audio and video signals that the buffer high speed reads goes out, deliver to parallel signal input port corresponding on the transmitter with digital video signal, spare control signal by mixing the marshalling rule, be converted into high-speed serial signals and send on the transmission line; Described signal receiving unit comprises: receiver, its signal input part links to each other with the other end of signal transmssion line, the vision signal of drawing from the data-out port of the correspondence of receiver causes the input port of this device, corresponding audio frequency serial digital signal exit then is connected the digital signal input end of buffer, the digital signal output end of buffer is connected to shift register, digital signal after string and conversion is delivered to the signal input part of audio D/A converter, and the Parallel Digital audio signal of being exported by buffer is converted to the Audio output port that multichannel analog signals causes this device through D/A converter.
Add mixed transport for adapting to multipath audio signal, A/D converter in this device also can be designed to the audio A/D converter bank of a N road parallel connection, Dui Ying shift register also has N corresponding audio digital signal input end mouth with it, the sampled clock signal (sclk_t) of audio A/D transducer is taken from the clock signal that capable synchronizing clock signals (Hsync) is produced behind Q frequency multiplier doubly, Q is 2 or 2 above integers, getting the Q value is principle with " Q of row clock frequency doubly is slightly larger than 60kHz ", shift register at described receiving element also has the corresponding memory cell of N group, have N corresponding audio digital signal and read port, read clock signal in the buffer is taken from Q frequency multiplier doubly, the Q value of receiving element is identical with the Q value of transmitting element, video line synchronizing signal (Hsync) output of telling in the input end of clock of frequency multiplier and the recipient links to each other, audio D/A converter is the D/A converter group of a N road parallel connection, every group of D/A converter has independently output port, and sampling clock is the Q frequency multiplication of row synchronizing clock signals (Hsync).Transmitter and receiver can specifically adopt chip TLK2501.
After adopting above-mentioned device, because audio signal and vision signal are merged into a circuit-switched data signal, only compound audio-video signal is transferred to receiving terminal at a distance by a cover transmission line, the extra cost of required device, special-purpose sound line cost in the prior art, feasible long Distance Transmission and channel number cost more for a long time significantly reduce, and in the process of audio signal and vision signal merging, reduced in the translation process sound intermediate frequency signal of audio signal and vision signal and the loss of vision signal, make signal comparatively stable, and the transfer rate height.
The present invention is described in further detail below in conjunction with accompanying drawing and specific embodiment
Description of drawings
Fig. 1 is the structured flowchart of this circuit.
Fig. 2 is signal transmitting unit 1 electrical block diagram shown in Figure 1.
Fig. 3 is signal receiving unit 2 electrical block diagrams shown in Figure 1.
Fig. 4 is the peripheral circuit schematic diagram of signal transmitting unit 1 buffer 5 among Fig. 2.
Fig. 5 is the peripheral circuit schematic diagram of signal receiving unit 2 buffers 9 among Fig. 3
Fig. 6 is the two-way audio example schematic of A/D change-over circuit in this circuit signal transmitting element 1.
Fig. 7 is the utility model signal transmitting unit 1 middle pitch, video signal mixture grouping schematic diagram.
Fig. 8 is that the utility model signal receiving unit 2 middle pitches, video signal mixture are separated schematic diagram.
Among the figure 1 represents the digital signal transmitting element, 2 represent the digital signal receiving element, the 3rd, data line, 4 represent A/D converter, 5,9 buffers, 6 represent D/A converter, 7 represent the special-purpose chip that sends, the special-purpose receiving chip of 8 representatives, 10,11 represent shift register, 5A, 9A represents time schedule controller, RGB is the wide video data signal of 24bit, dataen representative data useful signal, DCLK represents the parallel data clock signal, and Vsync represents field sync signal, Hsync represents line synchronizing signal, FIFO represents first-in first-out type buffer, TXD, RXD represents the serial data signal of high-speed transfer, and sclk_t represents the transmitting terminal sampled clock signal, sclk_r represents the receiving terminal sampled clock signal, A represents 1 Bits Serial audio digital signals, and C6-C0 represents 7 spare control signals, R0-R7, G0-G7, B0-B7 represents 24 digital video digital signals.
Embodiment
By Fig. 1 to Fig. 3 as can be known, structure of the present utility model comprises digital data transmission circuit 3 and sets the digital signal transmitting element 1 at transmission line 3 two ends, digital signal receiving element 2 two parts circuit, crucial design is: described signal transmitting unit 1 comprises: audio A/D transducer 4, its signal input part links to each other with the corresponding output port of audio signal to be passed, the output port of audio A/D transducer 4 is connected to shift register 10, digital signal after also string is changed is delivered to the write port of buffer 5 again, draw from output port from the digital audio and video signals that buffer 5 is read at a high speed, with digital video signal, spare control signal is delivered to parallel signal input port corresponding on the transmitter 7 by mixing the marshalling rule, is converted into high-speed serial signals TXD and sends on the transmission line; Described signal receiving unit 2 comprises: receiver 8, the RXD signal input part links to each other with the other end of signal transmssion line 3, the vision signal of drawing from the data-out port of the correspondence of receiver 8 causes the input port of this device, corresponding audio frequency serial digital signal exit then is connected the digital signal input end of buffer 9, the digital signal output end of buffer 9 is connected to shift register 11, digital signal after string and conversion is delivered to the signal input part of audio D/A converter 6, and the Parallel Digital audio signal of being exported by buffer 9 is converted to the Audio output port that multichannel analog signals causes this circuit through D/A converter 6.
From can further finding out the structure of buffer 5, Fig. 4-Fig. 6 comprises time schedule controller 5A, the write clock signal of buffer 5 is taken from the transmitting terminal shift clock, the transmitting terminal shift clock is taken from the frequency-doubled signal of the sampling clock (sclk_t) of A/D converter (4), the read clock signal termination video parallel data clock signal DCLK of buffer 5, the written request signal control end fixedly connects high level, the reading request signal control end of buffer 5 is connected on the control signal output ends of time schedule controller 5A, and the input port of time schedule controller 5A meets video field sync signal Vsync, data are effectively believed dataen and video clock signal DCLK.
Because low rate serial audio data stream is continuous in time, so the written request signal wrreq of buffer 5 fixedly meets high level VCC, realize that under low-frequency sampling clock sclk_t control low speed continuity ground writes buffer 5 with the serial voice data, every writes a certain amount of data to buffer 5, is called " amount of audio data ".Time schedule controller is according to field sync signal Vsync and data useful signal dataen, under DCLK control, produce the reading request signal rdreq of buffer 5, after guaranteeing to deposit " amount of audio data " at buffer 5, effectively capable in next the 1st data, be that dataen is that high level begins, reading of data from buffer 5, be sent to by certain rule with video data RGB and be sent to transmitter 7, because the video data volume in of the amount of audio data in, the life period of voice data are only limited to tens data after every beginning effectively in the row.One has a hundreds of data effectively capable, tens data having only every beginning effectively in the row time schedule controller just send and read buffer 5 request signal rdreq, under high frequency clock DCLK control, realize reading by phased manner at a high speed buffer 5.
Comprise in the structure of buffer 9 that time schedule controller 9A forms, the reading request signal termination high level of buffer 9, read clock signal is taken from the shift clock signal of receiving terminal, the receiving terminal shift clock is identical with transmitting terminal shift clock frequency, take from the frequency-doubled signal of the sampling clock (sclk_r) of D/A converter (6), the write clock signal termination video clock signal DCLK of buffer 9, the control signal output ends of written request signal control termination time schedule controller 9A, video field sync signal Vsync, data believe that effectively dataen and video parallel data clock signal DCLK are connected on the signal input end of time schedule controller 9A.
The sequential control circuit 9A of field sync signal Vsync herein is similar to sequential control circuit 5A operation principle in the buffer 5, only before every, produce the written request signal wrreq of buffer 9 in tens row, under high frequency clock DCLK control, realize writing by phased manner at a high speed buffer 9.The reading request signal rdreq of buffer 9 fixedly meets high level VCC, shows that buffer 9 reads to the low speed continuity voice data in the buffer 9 under low frequency shift clock signal controlling.The serial audio signal of reading from buffer 9 is sent into shift register, realizes string and conversion, as shown in Figure 5.For present embodiment, audio signal has N sound channel, and each sound channel serial-parallel conversion circuit is made up of 1 12bit shift register, and then low frequency shift clock signal clk generates after the 12N frequency multiplication of D/A sampled clock signal sclk_r.
When the audio signal of transmission N road, described A/D converter 4 is audio A/D converter bank of a N road parallel connection, Dui Ying shift register 10 has N corresponding audio digital signal input end mouth with it, the sampled clock signal sclk_t of audio A/D transducer 4 takes from the clock signal that capable synchronizing clock signals (Hsync) is produced behind Q frequency multiplier doubly, Q is 2 or 2 above integers, getting the Q value is principle with " Q of row clock frequency doubly is slightly larger than 60kHz ", the shift register 11 of described receiving element 2 have the N group corresponding audio digital signals read port, comprise frequency multiplier in buffer 9 structures, read clock signal is taken from Q frequency multiplier doubly, the Q value of receiving element is identical with the Q value of transmitting element, the video line synchronizing signal Hsync output of telling in the input end of clock of frequency multiplier and the recipient 8 links to each other, audio D/A converter 6 is D/A converter groups of a N road parallel connection, every group of D/A converter has independently output port, and sampling clock is the Q frequency multiplication of row synchronizing clock signals Hsync.
The audio signal of N road simulation is after N road AD converter 1, convert the N group to, every group of m bit (m=12 or other integer, decide on required precision) voiceband data signal, N group voice data deposits in respectively in the N group shift register 10, after the cascade of N group shift register, form one tunnel serial output, N group shift register plays and goes here and there transformation.In time, voiceband data signal is the low-rate signal of whole continuous effective, and the vision signal effective two-forty signal that is discontinuity, in order to solve this species diversity, introduced FIFO type buffer, but deposit to voice data low speed continuity FIFO in, and sense data from FIFO by phased manner at a high speed.
With audio signal is 2 the tunnel, and vision signal 24bit is an example, and every road audio signal is changed through A/D, the digital audio and video signals of output m=12 bit wide, and the processing procedure when N is worth for other with m is similar.A/D converter 4 revolutions change 1 time, the voice data that produces synchronously writes the shift register 10 of 2 groups of cascades, by Fig. 4-6 as can be known, and the low rate serial audio data stream of the output 1bit that under shift clock clk effect, continuously is shifted, at this moment, the multiple of frequency multiplier is N * m=24.Low velocity serial voice data is exported the serial audio data stream of two-forty through buffer 5, and the operation principle of buffer 5 is the same.The rgb video signal of the serial audio A of the 1bit that is read by buffer 5, spare control signal C6～C0 of 7bit and 24bit is 32bit altogether, the compound mixed video signal that becomes 2 16bit divides into groups, be sent to transmitter 7 (for example TLK2501 transceiver), wherein, 7 spare control signals can be used for brilliance control, Gamma correction control, the control of volume tone color etc.Receiving terminal a long way off, the signal that receiver 8 (for example TLK2501 transceiver) will be come through transmission line, convert 16 composite video signal to, and by reduction to composite video signal, isolate 24 rgb signals, 7 spare control signals and 1 Bits Serial audio signal, by shown in Figure 3,24 rgb signals are used for showing, 7 spare control signals are used for control action, 1 Bits Serial audio signal sends buffer 9 to, realize that voice data deposits buffer at a high speed by phased manner, and the serial voice data is read on low speed continuity ground from buffer, the operation principle of buffer 9 is the same.The serial voice data is input to the signal input part of the shift register 11 of 2 groups of mutual cascades, and after treatment, exports 2 groups of parallel audio data, by shown in Figure 11.Two groups of parallel audio data convert whole continuous audio signal of 2 groups of simulations again to behind 2 groups of D/A converters 6, thereby realize the wired remote transmission of mixing of sound, vision signal.
Claims (6)
1, sound, video signal mixed transport circuit, this circuit comprises digital data transmission circuit (3) and sets the digital signal transmitting element (1) at transmission line (3) two ends, digital signal receiving element (2) two parts circuit, it is characterized in that: described signal transmitting unit (1) comprising: audio A/D transducer (4), its signal input part links to each other with the corresponding output port of audio signal to be passed, the output port of audio A/D transducer (4) is connected to the write port that the digital signal of shift register (10) after also string is changed delivered to buffer (5), draw from output port from the digital audio and video signals that buffer (5) is read at a high speed, with digital video signal, spare control signal is delivered to transmitter (7) and is gone up corresponding parallel signal input port and be converted into high-speed serial signals TXD and send on the transmission line by mixing the marshalling rule; Described signal receiving unit (2) comprising: receiver (8), the input of high-speed digital signal RXD links to each other with the other end of signal transmssion line (3), the vision signal of drawing from the data-out port of the correspondence of receiver (8) causes the input port of this device, corresponding audio frequency serial digital signal exit then is connected the digital signal input end of buffer (9), the digital signal output end of buffer (9) is connected to shift register (11), digital signal after string and conversion is delivered to the signal input part of audio D/A converter (6), and the Parallel Digital audio signal of being exported by buffer (9) is converted to the Audio output port that multichannel analog signals causes this device through D/A converter (6).
2, sound according to claim 1, video signal mixed transport circuit, it is characterized in that comprising time schedule controller (5A) in the structure of buffer (5), the write clock signal end of buffer (5) is taken from the transmitting terminal shift clock, the transmitting terminal shift clock is taken from the frequency-doubled signal of the sampling clock (sclk_t) of A/D converter (4), the read clock signal termination video parallel data clock signal (DCLK) of buffer (5), the written request signal control end fixedly connects high level, the reading request signal control end of buffer (5) is connected on the control signal output ends of time schedule controller (5A), and the input port of time schedule controller (5A) connects video field sync signal (Vsync), data are effectively believed (dataen) and video clock signal (DCLK).
3, sound according to claim 1, video signal mixed transport circuit, it is characterized in that comprising in the structure of buffer (9) that time schedule controller (9A) forms, the reading request signal termination high level of buffer (9), read clock signal is taken from the shift clock signal of receiving terminal, the receiving terminal shift clock is identical with transmitting terminal shift clock frequency, take from the frequency-doubled signal of the sampling clock (sclk_r) of D/A converter (6), the write clock signal termination video clock signal (DCLK) of buffer (9), the control signal output ends of written request signal control termination time schedule controller (9A), field sync signal (Vsync), data believe that effectively (dataen) and video parallel data clock signal (DCLK) are connected on the signal input end of time schedule controller (9A).
4, sound according to claim 1, video signal mixed transport circuit, it is characterized in that: described A/D converter (4) is the audio A/D converter bank of a N road parallel connection, Dui Ying shift register (10) has N corresponding audio digital signal input end mouth with it, the sampled clock signal (sclk_t) of audio A/D transducer (4) is taken from the clock signal that capable synchronizing clock signals (Hsync) is produced behind Q frequency multiplier doubly, Q is 2 or 2 above integers, getting the Q value is principle with " Q of row clock frequency doubly is slightly larger than 60kHz ", shift register (11) in described receiving element (2) have N group corresponding audio digital signals read port, comprise frequency multiplier in buffer (9) structure, read clock signal is taken from Q frequency multiplier doubly, the Q value of receiving element is identical with the Q value of transmitting element, video line synchronizing signal (Hsync) output of telling in the input end of clock of frequency multiplier and the recipient (8) links to each other, audio D/A converter (6) is the D/A converter group of a N road parallel connection, every group of D/A converter has independently output port, and sampling clock is the Q frequency multiplication of line synchronizing signal (Hsync).
5, sound according to claim 1, video signal mixed transport circuit is characterized in that: transmitter (7) and receiver (8) specifically adopt chip TLK2501.
6, according to claim 2 or 3 described sounds, video signal mixed transport circuit, it is characterized in that: N is for greater than 1 positive integer.
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| CN 200520121653 CN2857377Y (en) | 2005-12-31 | 2005-12-31 | Audio, video digital signal mixing transmission circuit |
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| CN 200520121653 CN2857377Y (en) | 2005-12-31 | 2005-12-31 | Audio, video digital signal mixing transmission circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101754005B (en) * | 2008-12-15 | 2013-03-06 | 康佳集团股份有限公司 | Digital video signal conversion device and digital video signal transmission system |
| CN105680871A (en) * | 2016-04-07 | 2016-06-15 | 武汉芯泰科技有限公司 | Parallel-serial/ serial-parallel conversion device for data serial transmission |
| CN106782562A (en) * | 2016-12-20 | 2017-05-31 | Tcl通力电子（惠州）有限公司 | Audio-frequency processing method, apparatus and system |
| CN112685345A (en) * | 2019-10-18 | 2021-04-20 | 北京华航无线电测量研究所 | Parallel-serial conversion method based on FPGA |
-
2005
- 2005-12-31 CN CN 200520121653 patent/CN2857377Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101754005B (en) * | 2008-12-15 | 2013-03-06 | 康佳集团股份有限公司 | Digital video signal conversion device and digital video signal transmission system |
| CN105680871A (en) * | 2016-04-07 | 2016-06-15 | 武汉芯泰科技有限公司 | Parallel-serial/ serial-parallel conversion device for data serial transmission |
| CN105680871B (en) * | 2016-04-07 | 2018-09-28 | 武汉芯泰科技有限公司 | For data serial transmission and go here and there, serioparallel exchange device |
| CN106782562A (en) * | 2016-12-20 | 2017-05-31 | Tcl通力电子（惠州）有限公司 | Audio-frequency processing method, apparatus and system |
| CN112685345A (en) * | 2019-10-18 | 2021-04-20 | 北京华航无线电测量研究所 | Parallel-serial conversion method based on FPGA |
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