CN2857224Y - Power MOSFET element - Google Patents

Abstract

The utility model discloses a power MOSFET device which improves the loading capacity and breakdown voltage of the power MOSFET, preventing the generation of parasitic MOSFET and reducing the parasitic delay. The aluminium wire width of the MOSFET drain electrode and source cathode reduce with the reduction of current. The N-well or P-well serves as the drift-region of power MOSFET and the polycrystalline gate of power MOSFET protrudes from the active region and serves as a field plate. The both ends of the power MOSFET polycrystalline gate are led out and connected the wire, in addition, the bends of drift-region and active region on the power MOSFET have structures of arc shape or polygon shape.

Description

A kind of power MOSFET device

Technical field

The utility model belongs to the power MOSFET device structure.

Background technology

In existing power MOSFET device structure, metal line at active area, the general aluminium wiring of adopting width size the same (just sectional area is identical), because aluminum steel has current density restrictions, the aluminum steel of certain width can only pass through certain magnitude of current, when power MOSFET has big electric current to pass through, can be used for the aluminium wiring in wasteful area domain space.And because the restriction of wiring density, proposed the scheme of two-layer wiring in Chinese invention patent publication number 1423328 (open day on June 11st, 2003), but this Wiring technique is complicated and improved cost.

In addition, in existing power MOSFET device, the raceway groove and long light dope N-drift region 27 or the P-drift region of increase between 22 that drains, because the drift region impurity concentration is lower, when VDS increases, exhausts to the low concentration drift region and extends, as long as choose suitable drift region length and drift zone resistance rate, can obtain sufficiently high avalanche breakdown voltage, its domain schematic diagram as shown in Figure 1, it comprises source electrode 21, drain electrode 22, aluminium wiring 24 and polycrystalline grid 25.At U.S. Patent Publication No. US087881 (open day on February 28th, 2002), and among the Chinese invention patent publication number CN1189918 (open day: on 08 05th, 1998) the relevant elaboration arranged.

But existing power MOSFET device repeatedly uses N-, P-diffusion can increase technology difficulty and photolithography plate quantity as the drift region.

Light dope drift region N-/P-concentrates in knee electric field line density, the electric field strength maximum, as shown in Figure 2.N-drift region 27 and P type substrate 26 constitute PN junction, when electric field strength surpasses the maximum field of PN junction, PN junction punctures, so power MOSFET is very easy generation punch-through in the knee, drift region, in like manner, active area is concentrated in knee electric field line density, when electric field surpasses certain limit, grid oxide layer has had a strong impact on the voltage endurance capability of power MOSFET device with breakdown.

As shown in Figure 3, it comprises source electrode 21, drain electrode 22, grid 23, metal wire 28 and P type substrate 26.When power MOSFET device drain electrode line spreads by N/P, drain electrode 22, PSUB/NSUB (P type substrate 26 or N type substrate), other N/P diffusions and METAL (metal wire 28) by power MOSFET device constitute parasitic NMOS/PMOS, when on the alum gate (grid 23) high voltage being arranged, parasitic MOS opens, make drain electrode 22 and N/P diffusion conducting, cause short circuit.

For very big power MOSFET, the polycrystalline grid will be very long.The resistance of polysilicon self, and the parasitic capacitance of polycrystalline grid and the existence of the substrate under it will be very big, so power MOSFET will have very long delay.

Summary of the invention

The utility model provides a kind of power MOSFET device, and it can improve the load capacity of power MOSFET.

In order to solve the problems of the technologies described above, the width of the drain electrode aluminum steel of MOSFET of the present utility model reduces with electric current and narrows down gradually, the width of the source electrode aluminum steel of MOSFET reduces with electric current and narrows down gradually, and cross wire between the source electrode aluminum steel of the drain electrode aluminum steel of MOSFET and MOSFET.

In addition, the utility model also provides following technical scheme: with N trap or P trap drift region as power MOSFET,

Have again, the polycrystalline grid of power MOSFET are extended with the source region part as field plate, and around the drain electrode of described MOSFET.

Have again, every source electrode of power MOSFET all adopts dock contact hole structure, and described dock contact hole structure is that N+ diffusion and P+ diffusion abut against together, and metal aperture is across the junction of N+ and P+, and length is the twice of plain bore, and width is constant.

Have again, all draw with metal connecting line at two of the polycrystalline grid of power MOSFET, and connect two of the polycrystalline grid of power MOSFET with described metal connecting line.

Also have at last: arc or polygonized structure are adopted in the drift region of power MOSFET, the knee of active area.

The utility model is owing to adopted the aluminium wiring of different in width according to different electric currents, make power MOSFET like this under equal area, increase effective wiring of aluminum steel, under the equal area, the maximum current capability of aluminum steel will reach and be about original twice, if increase substantially the load capacity of power MOSFET and when having identical load capacity, power MOSFET can be saved about 1/4 chip area.In addition, owing to adopted with N trap or P trap,, technology difficulty and photolithography plate quantity can have been reduced like this because only use N trap or P trap as the drift region of power MOSFET.Because power MOSFET polycrystalline grid are extended with the source region part as field plate, and, can increase depletion region thickness like this, prevent the surface breakdown phenomenon, and can prevent the influence of parasitic MOSFET around the drain electrode of MOSFET.

Because every source electrode of power MOSFET all adopts butting contact (dock contact hole) structure, make like this and allow the approaching of substrate and source electrode maximum possible, promptly reduce the PSUB dead resistance between the emitter junction of parasitic NPN/PNP to greatest extent, thereby eliminated latch-up.

Because all draw with metal connecting line on the both sides of the polycrystalline grid of power MOSFET, because metallic resistance is very little, the time-delay of metal is also just very little, so signal arrives the time-delay of the metal junction at polycrystalline grid two and can ignore, connecting the polycrystalline grid from metal looks in, polycrystalline grid distal-most end is reduced to original half to the distance of metal, thereby makes signal lag also be reduced to original 1/4.

Because the drift region of power MOSFET, the knee of active area adopt arc or polygonized structure can disperse electric field line density, improve the puncture voltage of grid oxide layer, can improve the voltage endurance capability of power MOSFET.

Description of drawings

Below in conjunction with the drawings and specific embodiments, the utility model is further elaborated.

Fig. 1: existing high pressure NMOS domain schematic diagram;

Fig. 2: existing drain-drift region is assembled schematic diagram at the knee electric field line;

Fig. 3: existing high pressure NMOS drain metal line forms parasitic MOS when spreading through the N type;

Fig. 4: the high pressure NMOS generalized section of the utility model structure;

Fig. 5: the high pressure NMOS domain schematic diagram of the utility model structure;

Fig. 6: drain-drift region of the present utility model turning changes camber line into and disperses electric field line;

Fig. 7: polycrystalline grid of the present utility model are extended with the source region and around the drain electrode structure schematic diagram;

Fig. 8: the utility model uses the high pressure NMOS structural representation of grid (GATE) around drain electrode (DRAIN) structure;

Fig. 9: the utility model is used in DC-DC or AC-DC goes up structure.

Embodiment

The utility model is a kind of integrated power MOSFET structure, its profile as shown in Figure 4, its domain schematic diagram is as shown in Figure 5.

As shown in Figure 5, it is the high pressure NMOS domain schematic diagram of the utility model structure.When big electric current passes through power MOSFET, the restriction of 4 current densities because aluminium connects up, the aluminium wiring 4 of certain width can only be born certain electric current.Because power MOSFET evenly flows through electric current, the aluminum steel electric current that from left to right drains will be more and more littler, source electrode aluminum steel electric current is with increasing, so the utility model adopts the aluminum steel that from left to right drains more and more narrow, the source electrode aluminum steel is more and more wideer, be that the aluminum steel width reduces with electric current and narrows down, the structure of cross wire, in the source, the maximum current place of leaking, the aluminum steel width is increased to about and is original twice, so under equal area, the maximum current capability of aluminum steel will reach and be about original twice, increase substantially the load capacity of power MOSFET, and satisfy the requirement of aluminum steel current density, adopt the power MOSFET of traditional wiring structure will have identical load capacity, have only the aluminium of increasing wiring 4, increase chip area.

As shown in Figure 5, the utility model comprises source electrode 1, drain electrode 2, aluminium wiring 4 and polycrystalline grid 5.The utility model uses every source electrode 1 all to adopt butting contact structure, this structure is: N+ diffusion and P+ diffusion abut against together, metal aperture is across the junction of N+ and P+, length is the twice of plain bore, width is constant, make like this and allow the approaching of substrate and source electrode 1 maximum possible, promptly reduce PSUB (the P type substrate 6 between the emitter junction of parasitic NPN/PNP to greatest extent, dead resistance as shown in Figure 6), get by U=I * R, emitter junction voltage reduces, and is not enough to open parasitic NPN/PNP transistor, thereby has eliminated latch-up.

The utility model adopts polycrystalline grid 5 both-end access waies to reduce the time-delay of power MOSFET, as shown in Figure 5, be connected to two of power MOSFET polycrystalline grid 5 with metal, because metallic resistance is very little, the time-delay of metal is also just very little, so signal arrives the time-delay of the metal junction at polycrystalline grid 5 two and can ignore, connecting polycrystalline grid 5 from metal looks in, polycrystalline grid 5 distal-most end are reduced to original half to the distance of metal, it is dead resistance, parasitic capacitance all is reduced to original half, it is original 1/4 that time constant RC is reduced to, and also is reduced to original 1/4 apart from the signal lag of metal junction distal-most end on the polycrystalline grid 5 of power MOSFET.

The utility model is with the N-/P-light dope drift region of NWELL/PWELL (N trap/P trap) as power MOSFET.The ratio of the cylinder knot under the same conditions and the puncture voltage of planar junction is:

$\frac{{\mathrm{BV}}_{\mathrm{CYL}}}{{\mathrm{BV}}_{\mathrm{PP}}}=\left\{\frac{1}{2}\right[{\left(\frac{r_j}{W_c}\right)}^2+2{\left(\frac{r_j}{W_c}\right)}^{6/7}\left]\ln \right[1+2{\left(\frac{W_c}{r_j}\right)}^{8/7}]-{\left(\frac{r_j}{W_c}\right)}^{6/7}\}$

The ratio of the sphere knot under the same conditions and the puncture voltage of planar junction is:

$\frac{{\mathrm{BV}}_{\mathrm{SP}}}{{\mathrm{BV}}_{\mathrm{PP}}}={\left(\frac{r_j}{W_c}\right)}^2+2.14{\left(\frac{r_j}{W_c}\right)}^{6/7}-{[{\left(\frac{r_j}{W_c}\right)}^3+3{\left(\frac{r_j}{W_c}\right)}^{13/7}]}^{2/7}$

Hence one can see that, and the sphere junction breakdown voltage that radius of curvature is identical is tied much smaller than cylinder, and tie for sphere knot and cylinder that to be radius of curvature big more, and the puncture voltage of knot is big more.As shown in Figure 4, the utility model only uses the N trap to do the drift region, constitutes N trap drift region 7, has reduced technology difficulty and photolithography plate quantity like this.Can certainly adopt the P trap to do the drift region.

As shown in Figure 6, polygonized structure can certainly be adopted as the structure of circular arc in the power MOSFET drain-drift region NWELL/PWELL knee that the utility model uses.This structure can be disperseed electric field line density.The PN junction that constitutes by N trap drift region 7 and P type substrate 6, when circular arc (polygon) structure is used in the knee, drift region, be equivalent to increase the radius of curvature of sphere knot, when the arc radius is infinitely great, the sphere knot promptly becomes the cylinder knot, thereby improved the withstand voltage of PN junction, in like manner, the utility model active area knee adopts arc (polygon) structure can disperse electric field line density, improve the puncture voltage of grid oxide layer, so the utility model concentrates the influence to the power MOSFET voltage endurance capability that obvious improvement is arranged to the knee electric field line, can improve the voltage endurance capability of power MOSFET.

Shown in Fig. 7,8, it comprises source electrode 1, drain electrode 2, grid 3, metal wire 8 and P type substrate 6.The power MOSFET that the utility model uses is extended with the source region part as field plate 10 with the polycrystalline grid, and the 2 surrounded structures that drain.Polycrystalline grid around drain electrode 2 are extended with the source region, can increase depletion region thickness as field plate 10, prevent the surface breakdown phenomenon.Because polysilicon below aluminium, plays a major role on attraction hole/electronics, when high pressure NMOS/PMOS closes, the polycrystalline grid connect low/high potential, make parasitic NMOS/PMOS be in off status, alum gate can not be opened parasitic NMOS/PMOS, thereby eliminates parasitic NMOS/PMOS influence.Can also see that from Fig. 7 drain contact region 9, N trap 14, field plate exhaust edge 13, exhaust edge 12.

As shown in Figure 9, the utility model power MOSFET device 15 is used on the AC-DC, this moment power MOSFET device 15 drain electrode be connected on the emitter of NPN or the source electrode of NMOS, as Fig. 9 a), b) shown in; Or be used on the DC-DC, this moment power MOSFET device 15 drain electrode or source electrode connecting resistance, as the c of Fig. 9), d) shown in.

Claims (12)

1, a kind of power MOSFET device, it is characterized in that: the width of the drain electrode aluminum steel of described MOSFET reduces with electric current and narrows down gradually, the width of the source electrode aluminum steel of described MOSFET reduces with electric current and narrows down gradually, and cross wire between the source electrode aluminum steel of the drain electrode aluminum steel of described MOSFET and described MOSFET.

2, power MOSFET device as claimed in claim 1 is characterized in that: with N trap or the P trap drift region as described power MOSFET.

3, power MOSFET device as claimed in claim 1 or 2 is characterized in that: the polycrystalline grid of described power MOSFET are extended with the source region part as field plate, and around the drain electrode of described MOSFET.

4, power MOSFET device as claimed in claim 1 or 2, it is characterized in that: every source electrode of described power MOSFET all adopts dock contact hole structure, described dock contact hole structure is that N+ diffusion and P+ diffusion abut against together, metal aperture is across the junction of N+ and P+, length is the twice of plain bore, and width is constant.

5, power MOSFET device as claimed in claim 3, it is characterized in that: every source electrode of described power MOSFET all adopts dock contact hole structure, described dock contact hole structure is that N+ diffusion and P+ diffusion abut against together, metal aperture is across the junction of N+ and P+, length is the twice of plain bore, and width is constant.

6, as claim 1 or 2 or 5 described power MOSFET devices, it is characterized in that: all draw with metal connecting line at two of the polycrystalline grid of described power MOSFET, and connect two of the polycrystalline grid of power MOSFET with described metal connecting line.

7, power MOSFET device as claimed in claim 3 is characterized in that: all draw with metal connecting line at two of the polycrystalline grid of described power MOSFET, and connect two of the polycrystalline grid of power MOSFET with described metal connecting line.

8, power MOSFET device as claimed in claim 4 is characterized in that: all draw with metal connecting line at two of the polycrystalline grid of described power MOSFET, and connect two of the polycrystalline grid of power MOSFET with described metal connecting line.

9, as claim 1 or 2 or 5 or 7 or 8 described power MOSFET devices, it is characterized in that: arc or polygonized structure are adopted in the drift region of described power MOSFET, the knee of active area.

10, power MOSFET device as claimed in claim 3 is characterized in that: arc or polygonized structure are adopted in the drift region of described power MOSFET, the knee of active area.

11, power MOSFET device as claimed in claim 4 is characterized in that: arc or polygonized structure are adopted in the drift region of described power MOSFET, the knee of active area.

12, power MOSFET device as claimed in claim 6 is characterized in that: arc or polygonized structure are adopted in the drift region of described power MOSFET, the knee of active area.

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