CN2824406Y - Battery controller for hybrid power motor vehicle - Google Patents
Battery controller for hybrid power motor vehicle Download PDFInfo
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- CN2824406Y CN2824406Y CNU2005200916955U CN200520091695U CN2824406Y CN 2824406 Y CN2824406 Y CN 2824406Y CN U2005200916955 U CNU2005200916955 U CN U2005200916955U CN 200520091695 U CN200520091695 U CN 200520091695U CN 2824406 Y CN2824406 Y CN 2824406Y
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Abstract
The utility model relates to a battery controller for a hybrid power motor vehicle. A detecting module connects the voltage signal output end, the current signal output end and the temperature signal output end of an accumulator with a DSP processor by a sensor, the pulse signal end of a driving module is mutually connected with the end of the DSP the processor, the signal input end of a temperature controller and a display is connected with the DSP processor, a CAN outer bus is mutually connected with the DSP processor through a driving chip of the outer bus, a memory and a JTAG interface are mutually connected with the DSP processor, the high-voltage output end of a power supply circuit is connected with the DSP processor, and a reset circuit is connected with the DSP processor by a phase inverter. The utility model has the advantages of simple structure of the circuits, reliable operation, long life time, low cost, etc. The utility model can satisfy the requirements of the automatic control of the accumulator of the hybrid power motor vehicle, energy saving and the promotion of the propagation and the popularization of the hybrid power motor vehicle.
Description
Technical field
The utility model belongs to the electric automobile energy control technology, particularly a kind of mixed power electric car accumulator control device.
Background technology
At present, the electric automobile development all drops into huge fund all over the world and develops electric automobile, particularly mixed power electric car rapidly, and the trend of replace internal combustion engines car is arranged greatly.But also there was problems such as putting, overcharge, useful life is short in existing accumulator of electric car, therefore, how to utilize the high-speed figure chip to solve the technical problem that accumulator of electric car exists, and was the emphasis of electric automobile area research.Therefore, being badly in need of researching and solving the technical problem of accumulator of electric car control device, is to satisfy the needs that the mixed power electric car storage battery was controlled, saved the energy automatically and promotes the mixed power electric car penetration and promotion.
The utility model content
The purpose of this utility model be for solve existing mixed power electric car storage battery existed put, overcharge, the technical problem that lacks useful life, provide a kind of circuit structure simply, reliable operation, long service life and the low mixed power electric car accumulator control device of cost.
The utility model comprises detection module, driver module, temperature controller, display, the CAN external bus, dsp processor, memory, jtag interface, power circuit, reset circuit, the voltage of detection module, electric current, the temperature signal output links to each other with the input of dsp processor, the pulse signal end of driver module is handled with DSP and is linked to each other mutually, the voltage amplifier negative input end of temperature controller passes through grounding through resistance, positive input terminal joins by the output of resistance and dsp processor, the output of voltage amplifier is connected with relay switch, the signal input part of display links to each other with the output of dsp processor, the CAN external bus interconnects by external bus chip for driving and dsp processor, memory and dsp processor interconnect, the artificial mouth of jtag interface and dsp processor interconnects, the high-voltage output end of power circuit links to each other with the input of dsp processor, reset circuit is connected with the input of dsp processor by inverter, the input of inverter links to each other with power positive end by resistance, the input of inverter by resistance through switch ground connection in parallel with electric capacity;
Described detection module comprises voltage sensor, current sensor, temperature sensor, amplifier, one termination power of voltage sensor, the voltage signal output end of the other end links to each other with the dsp processor input by resistance, the current signal output end of current sensor links to each other with the input of dsp processor, one termination positive supply of temperature sensor, other end ground connection, and join by the negative input end of resistance and amplifier, the temperature signal output of temperature sensor links to each other with the input of dsp processor through amplifier by resistance, and the negative input end of amplifier and output are by resistance and connect;
Described driver module comprises HF switch, driver chip, photoelectrical coupler, the pulse signal output end of dsp processor links to each other with the input of driver module, the control signal output ends of driver chip links to each other with the input of dsp processor by photoelectrical coupler, and another output of the control signal of driver chip is connected with HF switch;
Described memory is made of memory chip I, memory chip II, the address wire output of dsp processor links to each other with the input of the address wire of memory chip I, memory chip II respectively by address bus, the data terminal of memory chip I, memory chip II interconnects by data/address bus and dsp processor respectively, and the control signal output ends of dsp processor links to each other with another input of memory chip I, memory chip II respectively;
The power positive end of described power circuit links to each other with voltage transitions chip input by diode, the output of diode links to each other with the negative terminal of power supply by filter capacitor, the output of voltage transitions chip also links to each other with the negative terminal of power supply by filter capacitor, the GND end ground connection of voltage transitions chip, the output of voltage transitions chip links to each other with the input of low pressure conversion chip, the input of low pressure conversion chip passes through resistance, light-emitting diode ground connection, the output of low pressure conversion chip links to each other with the power input of dsp processor, the input of low pressure conversion chip, output passes through capacity earth, the GND ground connection of low pressure conversion chip respectively.
The utlity model has that circuit structure is simple, reliable operation, long service life and low cost and other advantages.Can satisfy the needs that the mixed power electric car storage battery was controlled, saved the energy automatically and promotes the mixed power electric car penetration and promotion.
Description of drawings
Fig. 1 is the utility model structural principle block diagram;
Fig. 2 is the utility model circuit theory schematic diagram;
Fig. 3 is a detection module circuit theory schematic diagram;
Fig. 4 is the power circuit principle schematic diagram;
Among the figure: 1 detection module, 2 driver modules, 3 temperature controllers, 4 displays, 5 CAN external bus, 6 dsp processors, 7 memories, 8 jtag interfaces, 9 power circuits, 10 reset circuits, 11 HF switch, 12 driver chips, 13 photoelectrical couplers, 14 relay switches, 15 voltage amplifiers, 16 external bus chip for driving, 17 memory chip I, 18 memory chip II, 19 low pressure conversion chips, 20 voltage transitions chips.
Embodiment
Further specify the organization plan of the present utility model and the course of work in conjunction with example.
As shown in the figure, mixed power electric car energy amount control device comprises detection module 1, driver module 2, temperature controller 3, display 4, CAN external bus 5, dsp processor 6, memory 7, jtag interface 8, power circuit 9, reset circuit 10, HF switch 11, driver chip 12, photoelectrical coupler 13, relay switch 14, voltage amplifier 15, external bus chip for driving 16, memory chip I 17, memory chip II 18, low pressure conversion chip 19, voltage transitions chip 20.
As shown in Figure 1 and Figure 2, detection module 1 links to each other the output of the voltage of storage battery, electric current, temperature signal by transducer with input AD0, AD1, the AD2 of dsp processor 6.
Driver module 2 is made of HF switch (IGBT) 11, driver chip (EXB841) 12, photoelectrical coupler (TPL550) 13; the output PWM1 of the pulse signal of dsp processor 6 is connected with the input of driver chip (EXB841) 12; the control signal output ends of driver chip (EXB841) 12 is joined by the input IOPA7 of photoelectrical coupler 13 with dsp processor 6; play overcurrent protection, another output of the control signal of driver chip 12 is connected with HF switch (IGBT) 11.
Temperature controller 3 comprises voltage amplifier 15, relay switch 14, the negative input end of voltage amplifier 15 is by resistance R 11 ground connection, positive input terminal joins by the output IOPA2 of resistance R 10 with dsp processor 6, and the output of voltage amplifier 15 is connected with relay switch 14.
Display 4 adopts 240 * 180 blue liquid crystals screen that embedded controller T6393C is arranged, input WR, the RD of display 4, CE, C/ D link to each other with the output IOPE4～IOPE7 of dsp processor 6 respectively, and the data-signal output IOPB0～IOPB7 of dsp processor 6 links to each other with the data-signal input DB0～DB7 of display 4.
CAN external bus 5 interconnects with CANRX, the CANTX terminal of dsp processor 6 respectively by external bus chip for driving (TJA1050) 16.
Memory 7 is by memory chip I 17, memory chip II 18 forms, these two memory chip I, II is the IS63LV1024-12T static RAM (SRAM), the address wire output terminals A 0～A15 of dsp processor 6 by address bus respectively with memory chip I 17, the address wire input of memory chip II 18 is connected, data wire I/O0～I/O7 of memory chip I 17 interconnects by the least-significant byte D0～D7 of data/address bus and dsp processor 6 data wires, data wire I/O0～I/O7 of memory chip II 18 interconnects the control signal output ends DS of dsp processor 6 by the most-significant byte D8～D15 of data/address bus and dsp processor 6 data wires, WE, RD respectively with memory chip I 17, another input OE of memory chip II 18, WE, CE joins.
1,2,3,7 ends of jtag interface 8 interconnect with TMS, the TRST of dsp processor 6, TDO, TDI end respectively, 9,11 ends of jtag interface and the TCK of dsp processor 6 end interconnect, and 13,14 ends of jtag interface interconnect by EMU0, the EMU1 end of two pull-up resistor R8, R9 and dsp processor 6.
Reset circuit 10 is connected with the input RS of dsp processor 6 by the output of inverter 74LS04, the input of inverter 74LS04 links to each other with power supply 5V by resistance R 6, and the input of inverter 74LS04 passes through resistance R 7 through K switch 1 and capacitor C 1 ground connection in parallel.
As Fig. 1, shown in Figure 3, detection module 1 comprises voltage sensor KV50A/P, current sensor KA50A/P, temperature sensor LM35, amplifier, the termination power of voltage sensor KV50A/P, the voltage signal output end of the other end links to each other with the input AD0 of dsp processor 6 by resistance R 1, the current signal output end of current sensor KA50A/P links to each other with the input AD1 of dsp processor 6, the termination positive supply of temperature sensor LM35, other end ground connection, and join by resistance R 3 negative input end with amplifier, the temperature signal output of temperature sensor LM35 is connected with the input AD2 of dsp processor 6 through amplifier by resistance R 2, and the negative input end of amplifier and output are by resistance R 4 and connect.
As Fig. 1, shown in Figure 4, the power positive end of power circuit 9 links to each other with voltage transitions chip (LM1117-5.0) 20 inputs by diode IN4002, the output of diode is by filter capacitor C2, C3 link to each other with the negative terminal of power supply (being ground connection), the output of voltage transitions chip 20 is by filter capacitor C4, C5 also links to each other with the negative terminal of power supply, the GND end ground connection of voltage transitions chip 20, the output of voltage transitions chip 20 links to each other with the input of low pressure conversion chip (LM1117-3.3) 19, low pressure conversion chip 19 inputs are by resistance R 5, LED ground connection, the output of low pressure conversion chip 19 links to each other with the power supply VCC input of dsp processor 6, the input of low pressure conversion chip 19, output is respectively by capacitor C 6, C7 links to each other with ground, the GND ground connection of low pressure conversion chip 19.
The course of work of the present utility model is: as shown in Figure 1, detection module 1 sends the voltage of storage battery, electric current, temperature signal to dsp processor 6 by transducer and carries out sampling processing, on display 4, show various parameters, switch by driver module 2 control onboard chargers, rational and effective is used storage battery, prevented to put, overcharge, and monitor by temperature controller 3, simultaneously be connected the transmission signal with other control system, occur to reset by 10 pairs of devices of reset circuit when unusual by CAN external bus 5.
Claims (5)
1, the mixed power electric car accumulator control device, it is characterized in that, comprise detection module, driver module, temperature controller, display, the CAN external bus, dsp processor, memory, jtag interface, power circuit, reset circuit, the voltage of detection module, electric current, the temperature signal output links to each other with the input of dsp processor, the pulse signal end of driver module is handled with DSP and is linked to each other mutually, the voltage amplifier negative input end of temperature controller passes through grounding through resistance, positive input terminal joins by the output of resistance and dsp processor, the output of voltage amplifier is connected with relay switch, the signal input part of display links to each other with the output of dsp processor, the CAN external bus interconnects by external bus chip for driving and dsp processor, memory and dsp processor interconnect, the artificial mouth of jtag interface and dsp processor interconnects, the high-voltage output end of power circuit links to each other with the input of dsp processor, reset circuit is connected with the input of dsp processor by inverter, the input of inverter links to each other with power positive end by resistance, the input of inverter by resistance through switch ground connection in parallel with electric capacity.
2, mixed power electric car accumulator control device as claimed in claim 1, it is characterized in that, described detection module comprises voltage sensor, current sensor, temperature sensor, amplifier, one termination power of voltage sensor, the voltage signal output end of the other end links to each other with the dsp processor input by resistance, the current signal output end of current sensor links to each other with the input of dsp processor, one termination positive supply of temperature sensor, other end ground connection, and join by the negative input end of resistance and amplifier, the temperature signal output of temperature sensor links to each other with the input of dsp processor through amplifier by resistance, and the negative input end of amplifier and output are by resistance and connect.
3, mixed power electric car accumulator control device as claimed in claim 1, it is characterized in that, described driver module comprises HF switch, driver chip, photoelectrical coupler, the pulse signal output end of dsp processor links to each other with the input of driver module, the control signal output ends of driver chip links to each other with the input of dsp processor by photoelectrical coupler, and another output of the control signal of driver chip is connected with HF switch.
4, mixed power electric car accumulator control device as claimed in claim 1, it is characterized in that, described memory is made of memory chip I, memory chip II, the output of the address wire of dsp processor links to each other with the input of the address wire of memory chip I, memory chip II respectively by address bus, the data terminal of memory chip I, memory chip II interconnects by data/address bus and dsp processor respectively, and the control signal output ends of dsp processor links to each other with the input of memory chip I, memory chip II respectively.
5, mixed power electric car accumulator control device as claimed in claim 1, it is characterized in that, the power positive end of described power circuit links to each other with voltage transitions chip input by diode, the output of diode links to each other with the negative terminal of power supply by filter capacitor, the output of voltage transitions chip also links to each other with the negative terminal of power supply by filter capacitor, the GND end ground connection of voltage transitions chip, the output of voltage transitions chip links to each other with the input of low pressure conversion chip, the input of low pressure conversion chip passes through resistance, light-emitting diode ground connection, the output of low pressure conversion chip links to each other with the power input of dsp processor, the input of low pressure conversion chip, output links to each other with ground by electric capacity respectively, the GND ground connection of low pressure conversion chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2005200916955U CN2824406Y (en) | 2005-07-07 | 2005-07-07 | Battery controller for hybrid power motor vehicle |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2005200916955U CN2824406Y (en) | 2005-07-07 | 2005-07-07 | Battery controller for hybrid power motor vehicle |
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|---|---|
| CN2824406Y true CN2824406Y (en) | 2006-10-04 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2005200916955U Expired - Fee Related CN2824406Y (en) | 2005-07-07 | 2005-07-07 | Battery controller for hybrid power motor vehicle |
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| CN (1) | CN2824406Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102749869A (en) * | 2012-06-18 | 2012-10-24 | 航天东方红卫星有限公司 | On-satellite energy control system based on ARM (Advanced RISC Machine) |
| CN102879034A (en) * | 2012-09-19 | 2013-01-16 | 天津长城精益汽车零部件有限公司 | Storage battery running state monitor device |
| CN104753090A (en) * | 2013-12-25 | 2015-07-01 | 国家无线电监测中心检测中心 | Portable power management device based on digital signal processor |
-
2005
- 2005-07-07 CN CNU2005200916955U patent/CN2824406Y/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102749869A (en) * | 2012-06-18 | 2012-10-24 | 航天东方红卫星有限公司 | On-satellite energy control system based on ARM (Advanced RISC Machine) |
| CN102749869B (en) * | 2012-06-18 | 2014-10-08 | 航天东方红卫星有限公司 | On-satellite energy control system based on ARM (Advanced RISC Machine) |
| CN102879034A (en) * | 2012-09-19 | 2013-01-16 | 天津长城精益汽车零部件有限公司 | Storage battery running state monitor device |
| CN102879034B (en) * | 2012-09-19 | 2015-10-28 | 天津长城精益汽车零部件有限公司 | A kind of accumulator monitoring running state device |
| CN104753090A (en) * | 2013-12-25 | 2015-07-01 | 国家无线电监测中心检测中心 | Portable power management device based on digital signal processor |
| CN104753090B (en) * | 2013-12-25 | 2017-09-15 | 国家无线电监测中心检测中心 | portable power source management device based on digital signal processing |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |