CN2810028Y - Class-D amplifier - Google Patents
Class-D amplifier Download PDFInfo
- Publication number
- CN2810028Y CN2810028Y CN 200420117433 CN200420117433U CN2810028Y CN 2810028 Y CN2810028 Y CN 2810028Y CN 200420117433 CN200420117433 CN 200420117433 CN 200420117433 U CN200420117433 U CN 200420117433U CN 2810028 Y CN2810028 Y CN 2810028Y
- Authority
- CN
- China
- Prior art keywords
- output
- resistance
- comparator
- waveform
- integrator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Abstract
The utility model relates to a Class-D amplifier, which comprises an operational amplifier, a capacitor, a delay circuit, resistors, a comparator and an AND circuit, wherein the operational amplifier and the capacitance form an integrator integrating differences between normal side input signals and minus side input signals of analog input signals. The delay circuit is used for delaying the phase of a triangular waveform through an expected small angle, and one resistor is used for forming a combiner circuit used for combining the output of the integrator, the triangular waveform and the output of the delay circuit. The comparator is used for mutually compare the output of the combiner circuit, the AND circuit forms a buffer used for inputting the output of the comparator and the other resistor is used for feeding back the output of the buffer to the input end of the integrator.
Description
Technical field
The present invention relates to the D class A amplifier A.
Background technology
The D class A amplifier A is carried out power amplification by pulse-width modulation (PWM) input signal, and is used to carry out the power amplification of audio signal.Traditional D class A amplifier A arrangement has an integrator to come the analog input signal integration, comparator comes the output signal of integrator and predetermined triangular waveform are compared and a buffer (pulse amplifier) amplifies the output signal of this comparator with output pulse signal.In this traditional D class A amplifier A, feed back to the input of integrator from the pulse signal of buffer output.Then, the output signal of buffer by the low pass filter filtering that inductance coil and electric capacity constituted so that obtain driving analog signal such as the load of loud speaker.
Traditional pulse width modulation amplifier arrangement has a comparator that analog input signal and triangular waveform are compared, an amplifier amplifies the output of this comparator, and transformer (for example, referring to the special public clear 56-27001 communique of Japan Patent) that is arranged between amplifier and the load.
And the digital amplifying circuit of traditional use digital signal processing circuit all is equipped with noise reshaper, transducer, logical circuit, switch and filter (for example, with reference to the special table of Japan Patent 2000-500625 communique).The quantizing noise of this noise reshaper digital input signal carries out frequency shaping.This transducer becomes PWM (pulse-width modulation) signal with PCM (pulse code modulation) conversion of signals of the output of response noises reshaper.This logical circuit compensates the linearity of the output signal of this transducer.This switch is by the output control of logical circuit.The input of filter is connected to power supply by switch.
Yet in traditional D class A amplifier A described above, buffer is made of two buffers that are called positive side buffer and minus side buffer respectively.Be box lunch when not having input signal, it is 50% the signal with opposite polarity that these two buffers are also exported duty ratio.As a result, in traditional D class A amplifier A, even if do not having under the situation of input signal, the electric current low pass filter of also may flowing through, this has caused a large amount of wastes.
In the special public clear 56-27001 communique of Japan Patent, described and a kind ofly when having input signal, during not having input signal, do not turned off the technical conceive of exporting amplifier element for fear of the waste of power.But there is such problem in the traditional pulse width modulation amplifier in the patent disclosure text 1 described above: it needs transformer to come transimpedence and cuts off dc voltage, and this just may need large-sized equipment and also increase cost simultaneously.And also have the another one problem in the pulse width modulation amplifier described in the special public clear 56-27001 communique of Japan Patent: owing to comparator compares input signal and simple triangular waveform, so the distortion of output signal is very serious.
On the other hand, digital amplifying circuit described in the special table of Japan Patent 2000-500625 communique has used the output state (on off state) of three or four values, and is provided as logical circuit so that amplify this digital input signals when improving linearity when digital circuit.As a result, there is such problem in the described digital amplifying circuit of Japan Patent special table 2000-500625 communique: because this numeral amplifying circuit can not arrange to provide analog circuit, so analog input signal can not be exaggerated when maintenance is better linear.In other words, in this traditional digital amplifying circuit, when the pulse of input small-signal, owing to added compensated pulse in this small-signal pulse, therefore the output switch distortion in logical circuit has been compensated.But the circuit that is used to compensate the output switch distortion is by only providing such digital circuit to make up as logical circuit, and therefore this traditional amplifying circuit can not better amplify analog input signal under the linear case.
Summary of the invention
Therefore the present invention, provides the D that can be operated under low distortion and the little power consumption class A amplifier A with solving problem described above.
Simultaneously, the present invention also provides and can be operated in the D class A amplifier A that need not transformer under low distortion and the little power consumption.
Simultaneously, dc voltage component to the essence in exporting also is provided is the D class A amplifier A of zero volt in the present invention.
In order to solve problem described above, D class A amplifier A of the present invention has following structure.
(1) a kind of D class A amplifier A comprises:
Integrator is used for to the analog input signal integration;
First comparator is used for the output of integrator and first triangular waveform are compared;
Second comparator is used for this output of integrator and second triangular waveform are compared, and this second triangular waveform is the waveform that obtains by the phase place that forward 180 degree or very low-angle negative sense change this first triangular waveform;
Buffer is used for exporting positive side output signal and the minus side output signal based on the output of the output of this first comparator and this second comparator; With
Feedback circuit is used for the input of the differential feedback between this positive side output signal and minus side output signal to integrator.
(2) according to the D class A amplifier A of (1), wherein this buffer comprises:
First buffer is used for calculating the logical produc of output of the output of this first comparator and this second comparator to export the output signal of a result after the calculating as minus side; With
Second buffer is used for calculating the logical produc of output of the output of this first comparator and this second comparator to export the output signal of a result after the calculating as positive side.
(3) according to the D class A amplifier A of (1), wherein this feedback circuit comprises that differential amplifier is used for being amplified in the difference between positive side output signal and minus side output signal.
(4) a kind of D class A amplifier A comprises:
Integrator is used for to carrying out integration at positive side input signal that constitutes analog input signal and the difference between the minus side input signal;
Delay circuit is used for postponing by predetermined very little angle the phase place of triangular waveform;
Combiner circuit is used for each other the output of output, triangular waveform and delay circuit of synthetic integrator so that export a plurality of output signals;
Comparator is used for a plurality of output signals of combiner circuit are compared each other;
Buffer is used for the output of input comparator; With
Feedback circuit is used for the output of buffer is fed back to the input of integrator.
(5) the D class A amplifier A of basis (4), wherein,
This triangular waveform is constituted by first triangular waveform with corresponding to second triangular waveform of the waveform that produces by phase change 180 degree with this first triangular waveform,
This is delayed circuit and comprises that first delays circuit and be used for postponing the phase place of this first triangular waveform and second delay circuit by this predetermined very little angle and be used for postponing by this predetermined very little angle the phase place of this second triangular waveform,
This combiner circuit is synthetic to produce first synthetic waveform with this first triangular waveform with the minus side output of this integrator, the positive side output of this integrator is synthetic to produce second synthetic waveform with this second triangular waveform, the minus side output of this integrator is synthetic to produce the 3rd synthetic waveform with the output of this second delay circuit, the positive side output of this integrator is synthetic to produce the 4th synthetic waveform with the output of this first delay circuit
This comparator comprises that first comparator is used for this first synthetic waveform and this second synthetic waveform compares and second comparator is used for the 3rd synthetic waveform and the 4th synthetic waveform are compared,
This buffer comprise first buffer be used for calculating the logical produc of output of the output of this first comparator and this second comparator and second buffer be used for calculating the output of this first comparator and this second comparator output logical produc and
This feedback circuit comprises that first feedback circuit is used for output with this first buffer and feeds back to the positive side input of integrator and second feedback circuit and be used for the output of this first buffer is fed back to the minus side input of integrator.
(6) a kind of D class A amplifier A comprises:
Integrator is used for to carrying out integration at positive side input signal that constitutes analog input signal and the difference between the minus side input signal;
Combiner circuit is used for the output of this integrator and triangular waveform synthetic, with with the output of this integrator with have with the triangular waveform of aforesaid triangular waveform reverse phase syntheticly so that export a plurality of signals, wherein the triangular waveform of this reverse phase is corresponding to the waveform according to phase change 180 degree of aforementioned triangular waveform;
Comparator is used for the output signal of combiner circuit is compared each other;
Buffer is used for the output of comparator is imported wherein; With
Feedback circuit is used for the output of this buffer is fed back to the input of this integrator,
Wherein this combiner circuit comprises a plurality of resistance with at least two kinds of resistance values, and be arranged to and input capacitance based on the corresponding a plurality of signals of output of the combiner circuit of the resistance value of a plurality of resistance and comparator between produce phase difference.
(7) the D class A amplifier A of basis (6), wherein,
This combiner circuit comprises: first composite part is used for the minus side output of this integrator synthetic to produce first synthetic waveform with this triangular waveform; Second composite part is used for the positive side output of this integrator synthetic to produce second synthetic waveform with the triangular waveform of this reverse phase; The 3rd composite part is used for the minus side output of this integrator synthetic to produce the 3rd synthetic waveform with the triangular waveform of this reverse phase; Be used for the positive side output of this integrator synthetic to produce the 4th synthetic waveform with the 4th composite part with this triangular waveform;
This first composite part comprises first resistance and second resistance, and terminals of first resistance are connected to the minus side output of this integrator, and this triangular waveform is provided for terminals of second resistance; Another terminals of this first resistance are connected to another terminals of second resistance so that constitute an output at that;
This second composite part comprises the 3rd resistance and the 4th resistance, and terminals of the 3rd resistance are connected to the positive side output of this integrator, and this triangular waveform is provided for terminals of the 4th resistance; Another terminals of the 3rd resistance are connected to another terminals of the 4th resistance so that constitute an output at that;
The 3rd composite part comprises the 5th resistance and the 6th resistance, and terminals of the 5th resistance are connected to the minus side output of this integrator, and the triangular waveform of reverse phase is provided for terminals of the 6th resistance; Another terminals of the 5th resistance are connected to another terminals of the 6th resistance so that constitute an output at that;
The 4th composite part comprises the 7th resistance and the 8th resistance, and terminals of the 7th resistance are connected to the positive side output of this integrator, and this triangular waveform is provided for terminals of the 8th resistance; Another terminals of the 7th resistance are connected to another terminals of the 8th resistance so that constitute an output at that;
This comparator comprises having the output that an input is connected to this first composite part, and another input is connected to first comparator of the output of this second composite part, with have an input and be connected to the output of the 3rd composite part, and another input is connected to second comparator of the output of the 4th composite part;
This buffer comprises that first buffer is used for calculating the logical produc that the logical produc of output of the output of this first comparator and this second comparator and second buffer are used for calculating the output of the output of this first comparator and this second comparator;
This feedback circuit comprises that first feedback circuit is used for output with this first buffer and feeds back to the positive side input of this integrator and second feedback circuit and be used for the output of this second buffer is fed back to the minus side input of this integrator; And
The resistance value of any of this first resistance, second resistance, the 3rd resistance and the 4th resistance is all different with any resistance value of the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance.
(8) according to the D class A amplifier A of (7), wherein the resistance value of each of first resistance, second resistance, the 3rd resistance and the 4th resistance obtains by the value that multiply by except 1 according to each resistance value of the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance.
(9) a kind of D class A amplifier A comprises:
Integrator is used for the positive side input signal and the minus side input signal that constitute analog input signal are carried out integration;
Triangular waveform produces circuit, comprises current source and electric capacity;
Comparator is used for the output of the output of this integrator and triangular waveform generation circuit is compared;
Buffer is used for importing the output of this comparator; With
Feedback circuit is used for the output of this buffer is fed back to the input of this integrator.
(10) the D class A amplifier A of basis (9), wherein,
One end of this electric capacity be connected to one of input of this comparator and
The direction of this current source conversion output current is so that charge repeatedly and discharge electric capacity.
(11) the D class A amplifier A of basis (10), wherein,
One end of this current source is connected to an end of this electric capacity,
This current source when the electromotive force of this electric capacity is lower than first electromotive force, flow out electric current with the direction of electric capacity charging and when the electromotive force of this electric capacity is higher than second electromotive force with the direction outflow electric current of capacitor discharge and
This second electromotive force is than this first electromotive force height.
(12) the D class A amplifier A of basis (9), wherein,
This comparator comprises that first comparator is used for the output that the output of the minus side of this integrator and this triangular waveform produce circuit is compared and second comparator is used for the positive side output of this integrator is compared with the output that this triangular waveform produces circuit,
This buffer comprise first buffer be used for calculating the logical produc of output of the inverse value of output of this first comparator and this second comparator and second buffer be used for calculating this first comparator and this second comparator inverse value logical produc and
This feedback circuit comprises that first feedback circuit is used for output with this first buffer and feeds back to the minus side input of this integrator and second feedback circuit and be used for the output of this second buffer is fed back to the positive side input of this integrator.
According to the present invention, this D class A amplifier A can provide to move under low distortion and little power consumption.
Simultaneously, the present invention also provides under low distortion and little power consumption operation and need not the D class A amplifier A of transformer, and simultaneously, the dc voltage component in output can be reduced to zero volt in fact.
Description of drawings
The circuit diagram of Fig. 1 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 1.
Fig. 2 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that no-voltage offers D class A amplifier A as shown in Figure 1.
Fig. 3 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that a positive voltage offers D class A amplifier A as shown in Figure 1.
Fig. 4 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that a negative voltage offers D class A amplifier A as shown in Figure 1.
The circuit diagram of Fig. 5 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 2.
Fig. 6 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that no-voltage offers D class A amplifier A as shown in Figure 5.
What Fig. 7 A showed to the chart of 7C is the waveform that presents in load when a sine wave is input to D class A amplifier A according to embodiments of the invention 1 or embodiment 2.
The circuit diagram of Fig. 8 is represented is structure example according to the D class A amplifier A of embodiments of the invention mode 3.
Fig. 9 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that no-voltage offers D class A amplifier A as shown in Figure 8.
Figure 10 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that a positive voltage offers D class A amplifier A as shown in Figure 8.
Figure 11 is illustrated in the oscillogram of this D class A amplifier A operation under the situation that a negative voltage offers D class A amplifier A as shown in Figure 8.
The circuit diagram of Figure 12 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 4.
What the circuit diagram of Figure 13 was represented is the structure example of the current source of D class A amplifier A.
The oscillogram of Figure 14 has shown the operation of this current source.
The oscillogram of Figure 15 shown offer the D class A amplifier A on the occasion of situation under operation.
The oscillogram of Figure 16 has shown in the operation that offers under D class A amplifier A 0 voltage condition.
The oscillogram of Figure 17 has shown the operation under the situation that offers D class A amplifier A negative value.
Embodiment
Description is described various embodiment pattern of the present invention.
The circuit diagram of Fig. 1 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 1.
This D class A amplifier A arrangement has resistance R 1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11 and R12, capacitor C 1 and C2, operational amplifier 11, comparator 12 and 13, delay circuit 21 and 22 is with (AND) circuit 31 (low activity) and another AND circuit 32.As shown in the figure, Yu Ding triangular waveform signal " a " and " b " offer the terminals of resistance R 9 and R10 respectively.Triangular waveform signal " a " and triangular waveform signal " b " are the signals with same waveform as, and just phase phasic difference 180 is spent each other.
The terminals of resistance R 1 and R2 constitute the differential input end of analog input signal respectively.And, terminals of resistance R 1 constitute positive side input (+IN), terminals of resistance R 2 constitute the minus side input (IN).Operational amplifier 11 and capacitor C 1 and C2 constitute integrator.By this integrator integration, this integrated signal is output to resistance R 5, R6, R7 and R8 simultaneously with differential mode this analog input signal by resistance R 1 and R2 input.
Resistance R 5, R6, R7, R8, R9, R10, R11 and R12 constitute combiner circuit, and it is synthetic with the output signal of this integrator with triangular waveform signal " a " or " b ".This triangular waveform signal " a " and " b " produce by postponing triangular waveform signal " a " and triangular waveform signal " b " with a very little angle " θ " (that is θ＜＜180 degree).This combiner circuit produces the first to the 44 kind of synthetic waveform " e ", " f ", " g ", " h ".
The minus side output signal of the operational amplifier 11 of this first synthetic waveform " e " by will constituting integrator and triangular waveform signal " a " (first triangular waveform) are synthetic to be produced.The positive side output signal of the operational amplifier 11 of this second synthetic waveform " f " by will constituting integrator and triangular waveform signal " b " (second triangular waveform) are synthetic to be produced.The minus side output signal of the operational amplifier 11 of the 3rd synthetic waveform " g " by will constituting integrator and triangular waveform signal " b " are synthetic to be produced.The positive side output signal of the operational amplifier 11 of the 4th synthetic waveform " h " by will constituting integrator with synthesize and produce by postponing the triangular waveform signal that triangular waveform signal " a " produces " a ' ".
Comparator 12 (first comparator) is relatively exported a comparative result with this first synthetic waveform " e " and this second synthetic waveform " f ".When this first synthetic waveform " e " is bigger than this second synthetic waveform " f ", the signal of predetermined " low " current potential of these first comparator, 12 outputs (for example, zero potential), and when this first synthetic waveform " e " than this second synthetic waveform " f " hour, this first comparator 12 is exported the signal of predetermined " height " current potential.Comparator 13 (second comparator) is relatively exported a comparative result with the 3rd synthetic waveform " g " and the 4th synthetic waveform " h ".When the 3rd synthetic waveform " g " is bigger than the 4th synthetic waveform " h ", the signal of predetermined " low " current potential of these second comparator, 13 outputs (for example, zero potential), and when the 3rd synthetic waveform " g " than the 4th synthetic waveform " h " hour, this second comparator 13 is exported the signal of predetermined " height " current potential.Comparator 12 and 13 can be realized selectively by using operational amplifier.
The buffer circuit that 31 responses of AND circuit have the AND door function of negative logic input.AND circuit 31 is carried out an AND and is calculated (low activity), wherein when the output of the output of first comparator 12 and second comparator 13 all is " low ", " height " electric potential signal of these AND circuit 31 outputs, and export of the minus side output " OUT " of this result of calculation as this D class A amplifier A.Resistance R 3 constitutes first feedback circuit.This first feedback circuit will feed back to the positive side input of operational amplifier 11 as the output of the AND circuit 31 of buffer function.
The buffer circuit that AND circuit 32 response has the AND computing function, and between the output of the output of comparator 12 and comparator 13, carry out the AND calculating operation, export of the positive side output "+OUT " of this result of calculation then as this D class A amplifier A.Resistance R 4 constitutes second feedback circuit.This second feedback circuit will feed back to the minus side input of operational amplifier 11 as the output of the AND circuit 32 of buffer function.
Load (for example loud speaker etc.) is connected the positive side output "+OUT " of this D class A amplifier A and exports between " OUT " with minus side via low pass filter.Because these circuit arrangements are provided, so this D class A amplifier A can need not transformer is provided and amplify analog input signal "+IN " and " IN " with low distortion, and can drive load under the reduction power consumption.
Next, the operation of the D class A amplifier A of the embodiment 1 that arranges according to above narration is described with reference to figs. 2 to Fig. 4.Fig. 2 is the operation of each circuit part of expression D class A amplifier A shown in Figure 1 to Fig. 4 demonstration.Fig. 2 shows is the i.e. waveform of each circuit part of D class A amplifier A when the difference input value is zero voltage value (no input signal) of value that value when analog input signal "+IN " equals analog input signal " IN ".Fig. 3 represents as (analog input signal "+IN ")＞(analog input signal " IN "), promptly is input as the waveform of each circuit part of timing D class A amplifier A when difference.Fig. 4 represents as (analog input signal "+IN ")＜(analog input signal " IN "), promptly is input as the waveform of each circuit part of D class A amplifier A when bearing when difference.
At first explain operation, promptly do not have the situation of difference input (zero voltage value) for Fig. 2.The phase place of triangular waveform signal " a " has the different of 180 degree with the phase place of triangular waveform signal " b ".This triangular waveform signal " a " has constituted one by postponing the signal that triangular waveform signal " a " produces with very little angle " θ ".In this case, a predetermined noise that is called " shake " is selectively used to triangular waveform signal a, a ', b and b ' respectively.Because jittering noise is used to each triangular waveform signal, so output waveform distortions can be corrected.Except these triangular waveform signals a, a ', b and b ', zigzag waveform, integrated waveform etc. also can be selected to use.
Phase relation between the positive side output (the positive side output of operational amplifier 11) " d " of a, a ' and integrator is equal in fact each other.Phase relation between b, b ' and minus side output (the minus side output of operational amplifier 11) " c " also is equal in fact each other.
The output of comparator 12 " j " becomes " low " when (first synthetic waveform " e ")＞(second synthetic waveform " f "), become when (first synthetic waveform " e ")＜(second synthetic waveform " f ") " height ".The output of comparator 13 " k " becomes " low " when (the 3rd synthetic waveform " g ")＞(the 4th synthetic waveform " h "), become when (the 3rd synthetic waveform " g ")＜(the 4th synthetic waveform " h ") " height ".The output of AND circuit 31 (OUT) is " height " when the output " j " of comparator 12 and 13 and " k " are " low ".The output of AND circuit 32 when the output " j " of comparator 12 and 13 and " k " are " height " (+OUT) be " height ".
In other words, positive side output "+OUT " in this D class A amplifier A is high potential to another crosspoint (time constant " t2 ") the 3rd waveform " g " and the 4th synthetic waveform " h " at the crosspoint between first synthetic waveform " e " and second synthetic waveform " f " (time constant " t1 ") the defined time period.Minus side output " OUT " in this D class A amplifier A is high potential to another crosspoint (time constant " t4 ") the 3rd waveform " g " and the 4th synthetic waveform " h " at the crosspoint between first synthetic waveform " e " and second synthetic waveform " f " (time constant " t3 ") the defined time period.
The phase difference (very little angle " θ ") that can depend in this case, triangular waveform signal a, a ' and triangular waveform signal b, b ' in this time period of positive side output "+OUT " or minus side output " OUT ".The result, reduce the phase difference (very little angle " θ ") of triangular waveform signal a, a ' and triangular waveform signal b, b ' because enough be as short as desired value the time of delay in delay circuit 21 and 22, the time period that positive side output "+OUT " and minus side output " OUT " become high potential can enough be as short as desired value.At this moment, the voltage of the minus side of this integrator output " c " and positive side output " d " all can become very low.
In other words, in not having the situation of input signal (being the situation of following application no-voltage), positive side output+OUT and minus side output-OUT can be set to 0 duty ratio to a few percent the time period of high potential.Positive side output "+OUT " and minus side output " OUT " offer the load such as loud speaker via for example low pass filter.As a result, do not having under the situation of input signal, positive side output+OUT and minus side output-OUT can be set to 0 duty ratio to a few percent the time period of high potential, and therefore the electric current by low pass filter and load just becomes very little.As a result of, D class A amplifier A in the present embodiment is used under the situation of small-signal, and the above-mentioned low pass (LC filter etc.) that is arranged between output and the load can be disallowable.
D class A amplifier A according to embodiment 1 provides arrangement described above, under the situation that does not have analog input signal (being the situation of zero voltage value input), because output signal is the time period of high potential enough to be as short as desired value, so power consumption is compared and can be reduced in a large number with D class A amplifier A of the prior art.
Next, (analog input signal "+IN ")＞(analog input signal " IN ") described, promptly when the difference input be as shown in Figure 3 on the occasion of situation under the operation of this D class A amplifier A.It should be noted that be identical among triangular waveform signal a, a ', b, b ' and Fig. 2.Phase relation between output c, the d of triangular waveform signal a, a ', b, b ' and integrator (that is the output of operational amplifier 11) is identical with the situation of Fig. 2 representative.In Fig. 3, first to the 4th synthetic waveform e, f, g, h have with the synthetic waveform of the output of integrator.The phase place of the phase place of synthetic waveform " e " and synthetic waveform " f " differs about 180 degree, and the phase place of the phase place of synthetic waveform " g " and synthetic waveform " h " differs about 180 degree.
In Fig. 3, difference situation than shown in Figure 2 in the identical time limit of exporting between " d " in the positive side of the minus side of integrator output " c " and integrator is big.Phase difference between first synthetic waveform " e " and the 4th synthetic waveform " h ", and another phase difference between second synthetic waveform " f " and the 3rd synthetic waveform " g " is all than big in situation shown in Figure 2.The result, will grow than the time period under the situation among Fig. 2 (from time constant t1 to time constant t2) to another crosspoint (time constant t2 ') the defined time period the 3rd waveform " g " and the 4th synthetic waveform " h " in the crosspoint (time constant t1 ') between first synthetic waveform " e " and second synthetic waveform " f ", the time period that simultaneously positive side output+OUT is a high potential is than long in situation shown in Figure 2.In Fig. 3, also long to another crosspoint (time constant t4 ') the defined time period first synthetic waveform " e " and second synthetic waveform " f " than the situation among Fig. 2 from time constant t2 ' the 3rd synthetic waveform " g " and the crosspoint (time constant t3 ') between the 4th synthetic waveform " h " afterwards, simultaneously positive side output "+OUT " becomes high potential, subsequently, these operations can be carried out repeatedly.
The output of comparator 12 " j " is from becoming " height " in the crosspoint (time constant t1 ') between first synthetic waveform " e " and second synthetic waveform " f " to another crosspoint (time constant t4 ') next first synthetic waveform " e " and next second synthetic waveform " f ".Then, the output of comparator 12 " j " becomes " low " from time constant t4 ' to another crosspoint (time constant t5 ') next first synthetic waveform " e " and second synthetic waveform " f ", and subsequently, operation described above repeats.In other words, the crosspoint state of the output of comparator 12 " j " between first synthetic waveform " e " and second synthetic waveform " f " changes to " low " from " height ", or changes to " height " from " low ".
The output of comparator 13 " k " is from becoming " low " in the crosspoint (time constant t2 ') between the 3rd waveform " g " and the 4th synthetic waveform " h " to the crosspoint (time constant t3 ') next the 3rd synthetic waveform " g " and next the 4th synthetic waveform " h ".Then, the output of comparator 13 " k " becomes " height " from time constant t3 ' to another crosspoint (time constant t6 ') next the 3rd synthetic waveform " g " and the 4th synthetic waveform " h ", and subsequently, operation described above repeats.In other words, the crosspoint state of the output of comparator 13 " k " between the 3rd synthetic waveform " g " and the 4th synthetic waveform " h " changes to " low " from " height ", or changes to " height " from " low ".
Then, because positive side output "+OUT "=(output j) AND (output " k "), therefore this positive side output "+OUT " from time constant t1 ' to time constant t2 ', becoming " height " current potential from time constant t3 ' to time constant t4 ' with during time period from time constant t5 ' to time constant t6 '.As a result, becoming the duty ratio of the time period of high potential in positive side output "+OUT " is directly proportional in fact with the amplitude of the pulse value (difference value) of analog input signal.In other words, positive side output "+OUT " can constitute the signal that obtains by the pulse value (difference value) of modulating analog input signal in pulse-width modulation (PWM) mode.
On the other hand, minus side output " OUT " becomes electronegative potential continuously.This is because of device 12 and 13 output " j " and " k " become the low time period simultaneously without comparison when (analog input signal "+IN ")＞(analog input signal " IN ") as shown in Figure 3.
Next, (analog input signal "+IN ")＜(analog input signal " IN ") described, promptly when the difference input be as shown in Figure 4 on the occasion of situation under the operation of this D class A amplifier A.Should be noted in the discussion above that identical among triangular waveform signal a, a ', b, b ' and Fig. 2.Phase relation between output c, the d of triangular waveform signal a, a ', b, b ' and integrator (that is the output of operational amplifier 11) is identical with the situation of Fig. 2 representative.
Should be understood that, in situation as shown in Figure 4, the phase place of the output of integrator " c " and " d " and above more anti-phase (that is, having changed 180 degree) described in Fig. 2 and Fig. 3.About opposite with the situation shown in Fig. 3 in the time relationship in the crosspoint between the crosspoint between first synthetic waveform " e " and second synthetic waveform " f " and the 3rd synthetic waveform " g " and the 4th synthetic waveform " h ".
The output of comparator 12 " j " from the crosspoint between first synthetic waveform " e " and second synthetic waveform " f " (time constant t2 ") (time constant t3 ") becomes " height " to another crosspoint next first synthetic waveform " e " and next second synthetic waveform " f ".Then, the output of comparator 12 " j " is from time constant t3 " and to another crosspoint next first synthetic waveform " e " and second synthetic waveform " f " (time constant t6 ") become " low ", subsequently, operation described above repeats.In other words, the crosspoint state of the output of comparator 12 " j " between first synthetic waveform " e " and second synthetic waveform " f " changes to " low " from " height ", or changes to " height " from " low ".
The output of comparator 13 " k " is from (time constant t4 ") becomes " low " to the crosspoint next the 3rd synthetic waveform " g " and the next one the 4th synthetic waveform " h " at the crosspoint between the 3rd waveform " g " and the 4th synthetic waveform " h " (time constant t1 ").Then, the output of comparator 13 " k " is from time constant t4 " to (time constant t5 ") becomes " height " from another crosspoint next the 3rd synthetic waveform " g " and the 4th synthetic waveform " h ", subsequently, operation described above repeats.In other words, the crosspoint state of the output of comparator 13 " k " between the 3rd synthetic waveform " g " and the 4th synthetic waveform " h " changes to " low " from " height ", or changes to " height " from " low ".
Then, because positive side output "+OUT "=(output j) AND (output k), so this positive side output "+OUT " becomes " low " current potential continuously.As (output j) AND (output k) when being generally " low ", minus side output " OUT " becomes " height ", and the duty ratio that minus side output " OUT " simultaneously becomes the time period of high potential directly is directly proportional in fact with the amplitude of the pulse value (difference value) of analog input signal.In other words, minus side output " OUT " can constitute the signal that obtains by the pulse value (difference value) of modulating analog input signal in pulse-width modulation (PWM) mode.
As a result, according to the D class A amplifier A of embodiment 1, this analog input signal can be transformed into by zero voltage value, on the occasion of, the pwm signal with three values that negative value constituted, and with the pwm signal output after these conversions.D class A amplifier A according to embodiment 1, under analog input signal becomes than the high or equal situation of predetermined value, it only is that positive side output "+OUT " and minus side are exported any the converted-wave of sidetone signal in " OUT " that output signal wherein becomes, represented as Fig. 3 and Fig. 4.As a result of, according to the D class A amplifier A of embodiment 1, conversion power consumption wherein only is simultaneously in half of the conversion power consumption of traditional D class A amplifier A of positive side and minus side conversion.
D class A amplifier A according to embodiment 1, because analog feedback realizes by resistance R 3 and R4 are provided, therefore this D class A amplifier A can better amplify analog input signal under the linear case, and as the digital processing so in front described in the special table of the Japan Patent 2000-500625 communique operate and can not carry out.D class A amplifier A according to embodiment 1, different with in the special public clear 56-27001 communique of described Japan Patent in front, when the transformer that uses in impedance conversion and be used to cut off dc voltage no longer needs, the D class A amplifier A with low power consumption like this can provide low distortion, and DC output component wherein also is approximately equal to zero volt.
Next, will be described with reference to Figure 5 embodiments of the invention 2.The circuit diagram of Fig. 5 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 2.This D class A amplifier A arrangement has resistance R 51, R52, R53, R54, R55 and R56, capacitor C 51, optionally amplifier 61 and 64, comparator 62 and 63, AND circuit (low activity) 71 and another AND circuit 72.Triangular waveform signal " a " is provided for the positive side input of comparator 62, and another triangular waveform signal " b ' " is provided for the positive side input of comparator 63.
Further postpone corresponding to the triangular waveform signal of the triangular waveform signal that produces by the phase place of triangular waveform signal " b " " b ' " by a very little angle " θ ", wherein, triangular waveform signal " b " obtains by reverse triangular waveform signal " a " (that is phase delay 180 degree).As a result, and this triangular waveform signal " a " and triangular waveform signal " b ' " be the same signal of waveform, just phase place each other has the difference of (180 degree+very little angle " θ ").In this case, the predetermined noise that is called as " shake " can offer triangular waveform signal a and b ' selectively respectively.Because such jittering noise has been provided for these triangular waveform signals each, so output waveform distortions can be corrected.Except these triangular waveform signal a and b ', also have zigzag waveform, integrated waveform etc. can select to use.
Terminals of resistance R 51 have constituted the input of analog input signal.And another terminals of resistance R 51 are connected to the minus side input of operational amplifier 61.Operational amplifier 61 and capacitor C 51 have constituted integrator.Comparator 62 compares the output " c " of triangular waveform signal " a " with integrator, and exports a comparative result (output " j ").Comparator 63 compares the output " c " of triangular waveform signal " b ' " with integrator, and also exports a comparative result (output " k ").
AND circuit 71 is corresponding to the buffer circuits with SA AND door function.When the output " k " of the output " j " of first comparator 62 and second comparator 63 is " low ", " height " electric potential signal of these AND circuit 71 outputs, and export of the minus side output " OUT " of this signal calculated as this D class A amplifier A.AND circuit 72 is corresponding to the buffer circuits with AND door function.When the output " k " of the output " j " of first comparator 62 and second comparator 63 is " height ", " height " electric potential signal of these AND circuit 72 outputs, and export of the positive side output "+OUT " of this signal calculated as this D class A amplifier A.
Next, in conjunction with circuit arrangement described above operation according to the D class A amplifier A of embodiment 2 is described.At analog input signal is in the absence of zero (input signal), promptly, " IN " equals " 1/2VDD ", positive side output "+OUT " and minus side output " OUT " all as shown in Figure 6, and the duty ratio during the high potential to become almost be zero to arrive a few percent.As a result of, when this analog input signal is zero (not having input signal), just become in the extreme little via the electric current that filter flows out to load from this D class A amplifier A.
Analog signal be on the occasion of situation under, positive side output "+OUT " and minus side export " OUT " become with Fig. 3 in situation similar.As a result of, positive side output "+OUT " becomes by the signal that is produced on the occasion of (that is being " just " when no-voltage is provided as with reference to value the time) with the PWM mode modulated analog signal.On the other hand, minus side output " OUT " becomes electronegative potential continuously.
In analog signal is under the situation of negative value, positive side output "+OUT " and minus side export " OUT " all become with Fig. 4 in situation similar.As a result of, minus side output " OUT " becomes the signal that is produced by the negative value (that is, being " bearing " when 1/2VDD voltage is provided as the reference value) with the PWM mode modulated analog signal.On the other hand, positive side output "+OUT " becomes electronegative potential continuously.
Similar with D class A amplifier A according to embodiment 1 described above, by providing structure arrangement described above, D class A amplifier A according to embodiment 2, there be not input signal (promptly, be input as under the situation of zero volt) under the situation, because output signal is the time period of high potential enough to be as short as desired value, so power consumption is compared and can be reduced in a large number with D class A amplifier A of the prior art.
As a result of, according to the D class A amplifier A of embodiment 2, analog input signal can be converted into by null value, on the occasion of the pwm signal with three kinds of values that constitutes with negative value, and subsequently, the pwm signal after these conversions can be output.D class A amplifier A according to embodiment 2, analog input signal become higher than predetermined value or situation about equating under, output signal wherein with as Fig. 3 and the similar mode as shown in Fig. 4 to become only be that positive side output "+OUT " and minus side are exported any the converted-wave of sidetone signal in " OUT ".As a result of, according to the D class A amplifier A of embodiment 2, conversion power consumption wherein only is simultaneously in half of the conversion power consumption of traditional D class A amplifier A of positive side and minus side conversion.
D class A amplifier A according to embodiment 2, because analog feedback realizes by operational amplifier 64 and resistance R 52, R53, R54, R55, R56 are provided, therefore this D class A amplifier A can better amplify analog input signal under the linear case, and as the digital processing so in front described in the special table of the Japan Patent 2000-500625 communique operate and can not carry out.D class A amplifier A according to embodiment 2, different with in the special public clear 56-27001 communique of described Japan Patent in front, when the transformer that uses in impedance conversion and be used to cut off dc voltage no longer needs, the D class A amplifier A with low power consumption like this can provide low distortion, and DC output component wherein also is approximately equal to zero volt.
Next, Fig. 7 A has shown at a sine wave to 7C and has been input to according to the example as the output waveform under the situation of the input end of analog signal of the D class A amplifier A of Fig. 1 or embodiment 1 shown in Figure 5 or embodiment 2.In embodiment 1 and embodiment 2, be input at sine wave under the situation of input end of analog signal, their output waveform is similar.Fig. 7 (a) has shown and has been connected to the low pass filter and the load (resistance R) of exporting " OUT " according to the positive side output "+OUT " and the minus side of the D class A amplifier A of embodiment 1 and embodiment 2.Fig. 7 (b) has represented the waveform of the output " POUT " after the positive side output "+OUT " of this D class A amplifier A has been passed through this low pass filter.In Fig. 7 (b), the minus side output " OUT " that has also shown this D class A amplifier A is the waveform by the output " NOUT " behind this low pass filter.Output POUT and output NOUT only are the last half waveform of a sine wave.But, can become a sine wave corresponding to the output " OUT " of the signal that offers the load shown in Fig. 7 (c).Its reason is as follows: promptly, since load (loud speaker etc.) be connected output POUT and output NOUT between (promptly, between the positive side output " POUT " and minus side output " NOUT " of low pass filter), shown in Fig. 7 (c), therefore the output " OUT " corresponding to the signal that offers this load just becomes in the difference of exporting between POUT and the output NOUT (OUT=POUT-NOUT), has so just constituted a sine wave.
According to as the D class A amplifier A of Fig. 1 and embodiment 1 shown in Figure 5 and embodiment 2 in, used triangular waveform signal " a " at least and by reverse triangular waveform signal " a " and the resulting triangular waveform signal of further this reverse triangular waveform signal " a " of delay " b ' ".As a result of, promptly box lunch does not have input signal in the D class A amplifier A according to embodiment 1 or embodiment 2, when being similar to Fig. 2 and Fig. 6, positive side output "+OUT " and minus side output " OUT " are all by short time output (duty ratio during the high potential is set to zero to a few percent), so that voltage outputs to low pass filter a little and (exports POUT, NOUT).Simultaneously, owing to be provided for load, therefore corresponding to the output OUT vanishing volt of the signal that offers this load by the defined voltage of output POUT-output NOUT.As a result of, change to from no signal condition under the situation of small-signal input state at analog input end, can provide the amplifying signal with low distortion to load according to the D class A amplifier A of embodiment 1 or embodiment 2, promptly box lunch state has wherein changed.
Next, will embodiments of the invention 3 be described with reference to figure 8 to Figure 11.The circuit diagram of Fig. 8 is represented is structure example according to the D class A amplifier A of embodiments of the invention mode 3.Different with the D class A amplifier A according to embodiment 1, in this D class A amplifier A, delay circuit 21 and 22 does not provide and is used as construction package.In this D class A amplifier A, triangular waveform signal " a " is provided for terminals of resistance R 10, and another triangular waveform signal " b " is provided for terminals of another resistance R 12.Except the circuit arrangement of above-described D class A amplifier A in Fig. 8, the place of other of this D class A amplifier A with all be similar at the D class A amplifier A shown in Fig. 1.Should be understood that the resistance value separately that constitutes resistance R 5, R6, R7, R8, R9, R10, R11 and the R12 of combiner circuit in this D class A amplifier A is not to be to set under the defined situation of resistance R 5, R6, R7, R8, R9, R10, R11 and R12 according to the D class A amplifier A of embodiment 1.Arrangement on the circuit structure of this D class A amplifier A will be in following detailed explanation.
This D class A amplifier A arrangement has resistance R 1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11 and R12, capacitor C 1 and C2, operational amplifier 11, comparator 12 and 13, AND circuit (low activity) 31 and another AND circuit 32.Predetermined triangular waveform signal " a " is offered the terminals of resistance R 9 and R11 in the drawings respectively.Predetermined triangular waveform signal " b " is offered the terminals of resistance R 11 and R12 in the drawings respectively.Triangular waveform signal " a " has identical waveform with triangular waveform signal " b ", but phase phasic difference 180 degree.Suppose now triangular waveform signal " a " is set at as the triangular waveform in the claim 6 of the present invention that " b " is set at the triangular waveform with opposite phase in the present invention with the triangular waveform signal.
The terminals of resistance R 1 and R2 constitute the different input of analog input signal respectively.Terminals of resistance R 1 constitute positive side input (+IN), terminals of resistance R 2 constitute the minus side input (IN).Operational amplifier 11 and capacitor C 1 constitute an integrator with C2.The analog input signal of being imported in a different manner by resistance R 1 and R2 passes through this integrator integration, and this integrated signal is output to resistance R 5, R6, R7 and R8.
Resistance R 5, R6, R7, R8, R9, R10, R11 and R12 constitute a combiner circuit, and it is synthetic with the output signal of integrator with triangular waveform signal " a ' " or " b ' ".This combiner circuit produces the first to the 44 type synthetic waveform " e ", " f ", " g ", " h ".
The resistance value separately that constitutes resistance R 5, R6, R7, R8, R9, R10, R11 and the R12 of combiner circuit is determined as follows: between first composite wave " e " and second composite wave " f ", and between the 3rd synthetic waveform " g " and the 4th synthetic waveform " h " generation time difference (phase place difference), it is corresponding to the output signal based on the combiner circuit of these resistance values, and the output capacitance of comparator 12 (first comparator) and comparator 13 (second comparator).
In this circuit, resistance R 5 is corresponding to first resistance in the claim 7 that the present invention relates to.Resistance R 6 is corresponding in the present invention the 5th resistance.Resistance R 7 is corresponding in the present invention the 3rd resistance.Resistance R 9 is corresponding in the present invention second resistance.Resistance R 10 is corresponding in the present invention the 8th resistance.Resistance R 11 is corresponding in the present invention the 4th resistance.Resistance R 12 is corresponding in the present invention the 6th resistance.
Combiner circuit described above comprises first combiner circuit by the 4th synthesis unit.First synthesis unit will constitute the minus side output of the operational amplifier 11 of integrator and synthesize so that produce first synthetic waveform " e " with triangular waveform signal " a ".This first synthesis unit comprises resistance R 5 (first resistance), and an one terminals are connected to the minus side output of operational amplifier 11, also comprise resistance R 9 (second resistance).Triangular waveform " a " offers terminals of this resistance R 9.Another terminals of resistance R 5 are connected to another terminals of resistance R 9 so that constitute output.
Second synthesis unit synthesizes the positive side output of operational amplifier 11 so that produce second synthetic waveform " f " with triangular waveform " b ".Second synthesis unit comprises resistance R 7 (the 3rd resistance), and an one terminals are connected to the positive side output of operational amplifier 11, also comprise resistance R 11 (the 4th resistance).Triangular waveform " b " offers terminals of this resistance R 11.Another terminals of resistance R 7 are connected to another terminals of resistance R 11 so that constitute output.
The 3rd synthesis unit synthesizes the minus side output of operational amplifier 11 so that produce the 3rd synthetic waveform " g " with triangular waveform " b ".The 3rd synthesis unit comprises resistance R 6 (the 5th resistance), and an one terminals are connected to the minus side output of operational amplifier 11, also comprise resistance R 12 (the 6th resistance).Triangular waveform " b " offers terminals of this resistance R 12.Another terminals of resistance R 6 are connected to another terminals of resistance R 12 so that constitute output.
The 4th synthesis unit synthesizes the positive side output of operational amplifier 11 so that produce the 4th synthetic waveform " h " with triangular waveform " a ".The 4th synthesis unit comprises resistance R 8 (the 7th resistance), and an one terminals are connected to the positive side output of operational amplifier 11, also comprise resistance R 10 (the 8th resistance).Triangular waveform " a " offers terminals of this resistance R 10.Another terminals of resistance R 8 are connected to another terminals of resistance R 10 so that constitute output.
Preferably, the resistance value separately (first to the 4th resistance) that is connected to resistance R 5, R7, R9 and the R11 of comparator 12 resistance value separately that can be set at resistance R 6, R8, R10 and R12 by will being connected to comparator 13 multiply by the resistance value of the value gained except " 1 ".
For example, the resistance value of the resistance value of resistance R 5, R7, R9 and R11 and resistance R 6, R8, R10 and R12 is by with the setting of getting off:
R6＝R8＝R5×α，R5＝R7，
R10＝R12＝R9×α，R9＝R11，
In the equation above, symbol " α " is not equal to 1.
Can clearly find out in the formula from the above description, resistance value impose a condition can be selectively by with the setting of getting off:
R5=R7=R9=R11, or
R5=R7 but be not equal to R9=R11.
Under (R6=R8) and situation (R10=R12), suppose that (R10 equals R12) that (R9 R11) multiply by " α " (or 1/ α) for R5, R7 for R6, R8.
As concrete example, suppose that resistance R 5, R7, R9, R11 resistance value separately is set at 1[K Ω], resistance R 6, R8, R10, R12 resistance value separately can select to be set at 2[K Ω] or 500[K Ω].At this moment, symbol " α " equals 0.5.
Suppose that now resistance R 5, R7, R9, R11 resistance value separately is set at 20[K Ω], the resistance value of resistance R 6, R8, R10, R12 is set at 30[K Ω alternatively].At this moment, symbol " α " equals 1.5.
Suppose that now resistance R 5, R7, R9, R11 resistance value separately is set at 1[K Ω], the resistance value of resistance R 6, R8, R10, R12 is set at 30[K Ω alternatively].At this moment, symbol " α " equals 30.
Can significantly find out from the above description, above-described combiner circuit can be between this first synthetic waveform " e " and this second synthetic waveform " f ", and be connected to resistance R 5, R7, R9, the R11 of comparator 12 between the 3rd synthetic waveform " g " and the 4th synthetic waveform " h " by use and be connected between the resistance value of resistance R 6, R8, R10, R12 of comparator 13 and further, the difference between comparator 12 and 13 the input capacitance is come difference settling time (phase difference).
Comparator 12 (first comparator) is relatively exported a comparative result with first synthetic waveform " e " and second synthetic waveform " f ".When first synthetic waveform " e " is bigger than second synthetic waveform " f ", the signal of first comparator, 12 outputs, one predetermined " low " current potential (for example, zero potential), and when first synthetic waveform " e " than second synthetic waveform " f " hour, the signal of " height " current potential is scheduled in 12 outputs one of first comparator.Comparator 13 (second comparator) is relatively exported a comparative result with the 3rd synthetic waveform " g " and the 4th synthetic waveform " h ".When the 3rd synthetic waveform " g " is bigger than the 4th synthetic waveform " h ", the signal of second comparator, 13 outputs, one predetermined " low " current potential (for example, zero potential), and when the 3rd synthetic waveform " g " than the 4th synthetic waveform " h " hour, the signal of " height " current potential is scheduled in 13 outputs one of second comparator.
AND circuit 31 is corresponding to the buffer circuits of the AND door function with negative logic input.AND circuit 31 is carried out an AND and is calculated (low activity), wherein when the output of the output of first comparator 12 and second comparator 13 all is " low ", " height " electric potential signal of these AND circuit 31 outputs, and with the minus side output " OUT " of this result of calculation as this D class A amplifier A.Resistance R 3 constitutes first feedback circuit.This first feedback circuit will feed back to the positive side input of operational amplifier 11 as the output of the AND circuit 31 of buffer function.
AND circuit 32 is corresponding to the buffer circuits with AND computing function.And between the output of the output of first comparator 12 and second comparator 13, carry out the AND calculating operation, and export of the positive side output "+OUT " of this result of calculation as this D class A amplifier A.Resistance R 4 constitutes second feedback circuit.This second feedback circuit will feed back to the minus side input of operational amplifier 11 as the output of the AND circuit 32 of buffer function.
Load (loud speaker etc.) is via connecting in the positive side output "+OUT " of this D class A amplifier A and the low pass filter between the minus side output " OUT ".Because these circuit arrangements are provided, this D class A amplifier A can amplify analog input signal "+IN " and " IN " and need not to provide transformer with low distortion, further, and can driving load when reducing power consumption.
Next, with reference to figure 9 to Figure 11 operation according to the D class A amplifier A that provides above-described arrangement of embodiment 3 is described.What Fig. 9 represented to Figure 11 is the oscillogram of each circuit part operation of D class A amplifier A shown in Figure 8.Fig. 9 has shown the i.e. waveform of each circuit part of this D class A amplifier A when difference is input as zero volt (not having input signal) of value that the value when analog input signal "+IN " equals analog signal " IN ".Figure 10 has represented as (analog input signal "+IN ")＞(analog input signal " IN "), promptly is input as the waveform of each circuit part of this D class A amplifier A of timing when difference.Figure 11 represented as (analog input signal "+IN ")＜(analog input signal " IN "), promptly is input as the waveform of each circuit part of this D class A amplifier A when bearing when difference.
Represented as Fig. 9 to Figure 11, according to the main operation part of each circuit part of D class A amplifier A of embodiment 3 with according to as Fig. 2 to arrive the main operation part of each circuit part of D class A amplifier A of embodiment 1 of Fig. 4 identical.But this D class A amplifier A has following different operation.That is, two groups of triangular waveform signals " a " and " b " are provided as the triangular waveform signal, and this provides four groups of triangular waveform signal a, a ', b, b ' different with D class A amplifier A according to embodiment 1.To be described in detail in the operation of each circuit part in this D class A amplifier A below.
At first will explain operation, promptly not have the situation of difference input (zero volt input) as Fig. 9.The phase place of triangular waveform signal " a " is spent with the phasic difference mutually 180 of triangular waveform signal " b ".In this case, a predetermined noise that is called " shake " selectively offers triangular waveform signal a and b respectively.Because jittering noise has offered each triangular waveform signal, so output waveform distortions can be corrected.Except these triangular waveform signal a and b, zigzag waveform, integrated waveform etc. also can be selected to use.
Phase relation between the positive side output of triangular waveform signal " a " and integrator (the positive side output of operational amplifier 11) " d " is equal in fact each other.Phase relation between the minus side output of triangular waveform signal " b " and integrator (the minus side output of operational amplifier 11) " c " also is equal in fact each other.
As previously explained, between first synthetic waveform " e " and the 4th synthetic waveform " h ", and the reason that produces a very little angle " θ ' " between second synthetic waveform " f " and the 3rd synthetic waveform " g " will provide following.In other words, each resistance value that is connected to resistance R 5, R7, R9 and the R11 of comparator 12 is set at the value that each resistance value of resistance R 6, R8, R10 and R12 by will being connected to comparator 13 multiply by except value " 1 " and obtains.In other words, device 12 and 13 these resistance values and input capacitance have produced very little angle θ ' described above based on the comparison.Should be understood that the very little angle θ that occurs in the operation waveform of this very little angle θ ' corresponding to the D class A amplifier A of embodiment shown in Figure 21.This very little angle θ ' can be by regulating resistance R 5 to R12 resistance value adjust in mode simply.
As a result of, be similar to the D class A amplifier A according to embodiment 1, in this D class A amplifier A, when not providing input signal, positive side output+OUT and minus side output-OUT can both be set to 0 duty ratio to a few percent the time period of high potential.As a result of, D class A amplifier A in the present embodiment is used under the situation of small-signal, and the above-mentioned low pass (LC filter etc.) that is arranged between output and the load can be disallowable.
When in this D class A amplifier A, providing above-described arrangement, be similar to the D class A amplifier A of embodiment 1, there be not analog signal (promptly, under the situation of zero volt input) situation under, because output signal is the time period of high potential enough to be as short as desired value, so power consumption is compared and can be reduced in a large number with D class A amplifier A of the prior art.
Next, (analog input signal "+IN ")＞(analog input signal " IN ") described, promptly when the difference input be as shown in figure 10 on the occasion of situation under the operation of this D class A amplifier A.Figure 10 and Fig. 3 are compared, find that only difference is to provide two groups of triangular waveform signals " a " and " b " as triangular waveform in this D class A amplifier A.As a result of, even if be input as under the positive situation in difference, this D class A amplifier A except its combiner circuit part still can with move according to the identical mode of the D class A amplifier A of embodiment 1.As a result of, in this D class A amplifier A, when difference is input as timing, this positive side output "+OUT " becomes by modulating the signal that is produced on the occasion of (difference value) of analog input signal with pulse width modulation mode, and minus side output " OUT " becomes electronegative potential continuously.
Next, (analog input signal "+IN ")＜(analog input signal " IN ") described, promptly when the difference input be as shown in figure 11 on the occasion of situation under the operation of this D class A amplifier A.Figure 11 and Fig. 4 are compared, find that only difference is to provide two groups of triangular waveform signals " a " and " b " as triangular waveform in this D class A amplifier A.As a result of, even if be input as under the negative situation in difference, this D class A amplifier A except its combiner circuit part still can with move according to the identical mode of the D class A amplifier A of embodiment 1.As a result of, in this D class A amplifier A, when difference is input as when negative, this minus side output " OUT " becomes the signal that is produced by the negative value (difference value) of modulating analog input signal with pulse width modulation mode, and positive side output "+OUT " becomes electronegative potential continuously.
As a result of, be similar to the D class A amplifier A of embodiment 1, according to the D class A amplifier A of embodiment 3, this analog input signal can be transformed into by zero voltage value, on the occasion of, the pwm signal with three values that negative value constituted, and with the pwm signal output after these conversions.D class A amplifier A according to embodiment 3, under analog input signal becomes than the high or equal situation of predetermined value, it only is that positive side output "+OUT " and minus side are exported any the converted-wave of sidetone signal in " OUT " that output signal wherein becomes, represented as Figure 10 and Figure 11.As a result of, according to the D class A amplifier A of embodiment 3, conversion power consumption wherein only is simultaneously in half of the conversion power consumption of traditional D class A amplifier A of positive side and minus side conversion.
D class A amplifier A according to embodiment 3, because analog feedback realizes by resistance R 3 and R4 are provided, therefore this D class A amplifier A can better amplify analog input signal under the linear case, and as the digital processing so in front described in the special table of the Japan Patent 2000-500625 communique operate and can not carry out.D class A amplifier A according to embodiment 3, different with in the special public clear 56-27001 communique of described Japan Patent in front, when the transformer that uses in impedance conversion and be used to cut off dc voltage no longer needs, the D class A amplifier A with low power consumption like this can provide low distortion, and DC output component wherein also is approximately equal to zero volt.
And, D class A amplifier A according to embodiment 3, when delay circuit 21,22 and 81 is not provided to as structural detail, because the resistance value of resistance R 5 to R12 is adjusted, therefore between first synthetic waveform " e " and second synthetic waveform " f ", and the time difference (phase place difference) between the 3rd synthetic waveform " g " and the 4th synthetic waveform " h " is different with the D class A amplifier A described in the embodiment 1 and 2 described above.As a result of, the D class A amplifier A of this embodiment 3 can design and make in simple mode, and, can provide to have high performance D class A amplifier A.
Next, will embodiments of the invention 4 be described referring to figs. 12 to Figure 17.The circuit diagram of Figure 12 is represented is structure example according to the D class A amplifier A of embodiments of the invention pattern 4.Identical reference number represent with according to the D class A amplifier A components identical of embodiment 1.Be to provide single triangular waveform to produce circuit according to the D class A amplifier A of embodiment 4 with the different of D class A amplifier A according to embodiment 1 and 2.This D class A amplifier A will be in following detailed description.
This D class A amplifier A comprises resistance R 1, R2, R3 and R4, capacitor C 1, C2 and C100, operational amplifier 11, comparator 112 and 113, transducer 121 and 122, AND circuit 131 and 132 and current source 140.Electric capacity 100 and current source constitute the triangular waveform generation circuit of output triangular waveform to the minus side input of comparator 112 and 113.
Each a end of resistance R 1 and R2 is the differential input end of analog input signal.One end of resistance R 1 be positive side input (+IN) and an end of resistance R 2 be the minus side input (IN).Operational amplifier 11 and capacitor C 1 constitute an integrator with C2.The analog input signal that is input to difference resistance R 1 and R2 outputs to comparator 112 and 113 after by the integrator integration.
The minus side output of operational amplifier 11 is connected to the positive side input of comparator 112 (first comparator).The positive side output of operational amplifier 11 is connected to the positive side input of comparator 113 (second comparator). Comparator 112 and 113 minus side input are connected respectively to an end of electric capacity 100, and the other end of electric capacity 100 is connected to ground, and the other end of current source is connected to ground.Under such arrangement, comparator 112 compares and exports this comparative result with the minus side output of operational amplifier 11 with the output that triangular waveform produces circuit.Comparator 113 compares and exports this comparative result with the positive side output of operational amplifier 11 with the output that triangular waveform produces circuit.
The output of comparator 112 is connected to the input of transducer 121 and an input of AND circuit 132 (second buffer).The output of comparator 113 is connected to the input of transducer 122 and an input of AND circuit 131 (first buffer).The output of transducer 121 is connected to another input of AND circuit 131.The output of transducer 122 is connected to another input of AND circuit 132.Under such arrangement, AND circuit 131 calculates from the logical produc of the next signal of the output conversion of the output of comparator 112 and comparator 113, and exports this result of calculation.AND circuit 132 calculates from the logical produc of the next signal of the output conversion of the output of comparator 113 and comparator 112, and exports this result of calculation.
The output of AND circuit 131 is positive side output+OUT of this D class A amplifier A.This positive side output+OUT feeds back to the minus side input of operational amplifier by resistance R 4.The output of AND circuit 132 is minus side output-OUT of this D class A amplifier A.This minus side output-OUT feeds back to the positive side input of operational amplifier by resistance R 3.
What the circuit diagram of Figure 13 was represented is the customized configuration of the current source 140 of D class A amplifier A.This current source 140 and electric capacity 100 constitute triangular waveform and produce circuit.This current source 140 is by transistor T 1 and T2, switch S 1 and S2, comparator 141 and 142 and NAND circuit 143 and 144 constitute.
The oscillogram of Figure 14 has shown the operation of this current source 140.
At first, description is triangular waveform G at the electromotive force of tie point than the operation under the low situation of the first electromotive force VL, promptly under the situation that dotted line K1 represents.Under the situation of dotted line K1, the output of comparator 142 becomes low, and makes switch S 1 open and switch S 2 is closed.Thereby charging current is flowed through and is arrived electric capacity 100 by transistor T 1 and switch S 1.Therefore, the triangular waveform G for the electromotive force of electric capacity 100 rises.
When triangular waveform F had exceeded the first electromotive force VL and arrived the second electromotive force VH, the output of comparator 141 became low and makes switch S 2 open and switch S 1 disconnection.Therefore, flow through transistor T 2 and switch S 2 and arrival point of the discharging current of electric capacity 100.Therefore, triangular waveform G descends.
When triangular waveform G arrived this first electromotive force VL, the output of comparator 142 became low, and made and make switch S 1 open and switch S 2 is closed.Therefore, be not only charging current triangular waveform G but also rising.By repetitive operation after this, produced triangular waveform G as shown in figure 14.The inclination of triangular waveform G when descending is by being used to control the voltage V of discharging current
BNSet with the capacity of electric capacity 100.
Next, description is triangular waveform G at the electromotive force of tie point than the operation under the high situation of the first electromotive force VL, promptly under the situation that dotted line K2 represents.Under the situation of dotted line K2, the output of comparator 141 becomes low, and makes switch S 2 open and switch S 1 is closed.Thereby the discharging current of electric capacity 100 is flowed through by transistor T 2 and switch S 2.Therefore, the triangular waveform G for the electromotive force of electric capacity 100 descends.After this, as described above, the charging of electric capacity 100 and discharge repeat and generation triangular waveform G as shown in figure 14.
Therefore, in the D of present embodiment class A amplifier A, the triangular waveform with simple structure electric capacity 100 and the current source 140 that circuit passes through to be provided is provided makes up.Therefore, can provide and have cheaply efficient and the D class A amplifier A of low distortion.
Next, will be with reference to the operation of Figure 15 to 17 description according to the D class A amplifier A of embodiment 4.Figure 15 to 17 has shown the oscillogram of the various piece operation of D class A amplifier A as shown in figure 12.
Figure 15 has shown at (analog input signal "+IN ")＞(analog input signal " IN "), promptly has been input as timing in difference, the waveform of the various piece of this D class A amplifier A.Triangular waveform G is that the first electromotive force VL is a minimum value and the second electromotive force VH is peaked triangular waveform.
Because the difference of integrator just is input as, thus the minus side of this integrator output A to compare with the positive side output B of this integrator be electronegative potential.Figure 15 has shown the switch S 1 of current source 140 and the drive waveforms of S2.The switch S 1 of current source 140 is opened with the response high potential signal at the ascent stage of triangular waveform G.Switch S 1 disconnected with the response low-potential signal in the decline stage of triangular waveform G.The switch S 2 of current source 140 disconnects with the response low-potential signal at the ascent stage of triangular waveform G.Switch S 2 was opened with the response high potential signal in the decline stage of triangular waveform G.
When the comparative result of the minus side of integrator output A and triangular waveform G was A＞G, the output C of comparator 112 became height, and when comparative result was A＜G, the output C of comparator 112 became low.When the positive side output B of integrator and the comparative result of triangular waveform G were B＞G, the output D of comparator 113 became height, and when comparative result was B＜G, the output D of comparator 113 became low.
As the output D from the output C of comparator 112 and comparator 113 when to change the value of coming all be high, the output of AND circuit 131 (+OUT) E becomes height.Therefore, the amplitude on the occasion of (difference value) of duty ratio during positive side output+OUT is high potential and analog input signal is proportional in fact.In other words, positive side output+OUT is the pulse-width signal on the occasion of (difference value) of this analog input signal.
On the other hand, when to change the value of coming all be high when the output of comparator 112 with from the output D of comparator 113, (OUT) F became height in the output of AND circuit 132.Here, minus side output-OUT always is an electronegative potential.
Figure 16 shown at (analog input signal "+IN ")=(analog input signal " IN "), promptly when not having difference input (0 volt of input), and the waveform of the various piece of this D class A amplifier A.Triangular waveform G as shown in figure 16 is identical with triangular waveform G shown in Figure 15.Because the operation about the switch S 1 of the current source 140 of triangular waveform F and S2 is identical with operation shown in Figure 15, so the drive signal of switch S 1 and S2 has been omitted from Figure 16.
Since the difference of integrator be input as (+IN)=(IN), thus the positive side input B of the minus side of integrator input A and integrator have identical current potential.Because output A equals to export B, so the output D of the output C of comparator 112 and comparator 113 has identical waveform and phase place.
Because the output of AND circuit 131 (+OUT) E is (inverse value of output C) * (output D), therefore export E and in the major part in whole cycle, be electronegative potential.Because (OUT) F is (output C) * (inverse value of output D), therefore exports F and be electronegative potential in the major part in whole cycle in output.As shown in figure 16, owing to operational amplifier 11 with constitute the element of comparator 112 and 114 and the difference of the time of delay that the non-identity of inverter 121 and 122 offset voltages causes, having only a bit of positive side output+OUT and minus side output-OUT is the period of high potential.Therefore, positive side output+OUT and minus side output-OUT can be assumed to electronegative potential strictly simply in the whole cycle.
As described above, D class A amplifier A according to embodiment 4, because when analog input signal (under the situation of 0 volt input) was not provided, output signal can be contracted very shortly in the cycle of high potential, therefore compares power consumption with the conventional apparatus with simple structure and can reduce significantly.
Figure 17 shown at (analog input signal "+IN ")＜(analog input signal " IN "), promptly when difference is input as negative value, and the waveform of the various piece of this D class A amplifier A.This triangular waveform F is identical with triangular waveform G shown in Figure 15.Because the operation according to the switch S 1 of the current source 140 of triangular waveform G and S2 is identical with operation shown in Figure 15, so the drive waveforms of switch S 1 and S2 has been omitted from Figure 17.
The current potential of the minus side output A of integrator is than the positive side output B height of this integrator.When the comparative result of the minus side of integrator output A and triangular waveform G was A＞G, the output C of comparator 112 became height, and when comparative result was A＜G, the output C of comparator 112 became low.When the comparative result of the positive side output B of integrator and triangular waveform G was B＞G, the output D of comparator 113 became height, and when comparative result was B＜G, the output D of comparator 113 became low.
When the inverse value of the output D of the output C of comparator 112 and comparator 113 when all being high, (OUT) F becomes height in the output of AND circuit 132.Therefore, the amplitude of the negative value (difference value) of duty ratio during positive side output+OUT is high potential and analog input signal is proportional in fact.In other words, this minus side output-OUT is the pulse-width signal of the negative value (difference value) of analog input signal.
On the other hand, when to change the value of coming all be high from the output C of comparator 112 with from the output D of comparator 113, the output of AND circuit 131 (+OUT) E becomes height.Here, positive side output+OUT always is an electronegative potential.
As above description, according to the D class A amplifier A of embodiment 4, analog signal is by changing it into by 0 magnitude of voltage, being output on the occasion of the 3 value pwm signals of forming with negative value.According to the D class A amplifier A of embodiment 4, when analog input signal was value except that 0 volt, converted-wave only appeared on positive side output+OUT and the minus side output-OUT, shown in Figure 15 and 17.
According to the D class A amplifier A of embodiment 4, because resistance R 3 and R4 constitute analog feedback circuit, so this analog input signal can be exaggerated and need not to carry out digital processing described in the special table of Japan Patent 2000-500625 communique with favorable linearity.And according to the D class A amplifier A of embodiment 4, the direct current output component can be removed by essence and need not to provide in order to the direct voltage disconnection described in the transformer of impedance transformation and the special public clear 56-27001 communique of for example Japan Patent.Therefore the D class A amplifier A of a low distortion, high effect can be provided.
Though the embodiments of the invention pattern has been described in detail with reference to the accompanying drawings, wherein concrete structure is not limited in this embodiment pattern, and can cover defined structure in the scope that does not deviate from technical spirit of the present invention significantly.
For example, though in the D of embodiment described above class A amplifier A, integrator is constructed by basic integrator, the present invention is not limited to this, and this integrator can also constitute by the high step integration device simultaneously.By similar structure, can increase loop gain and distortion rate can further reduce.
In above description, the present invention describes as a D class A amplifier A, but the present invention is not limited to this.Therefore, the present invention can also offer signal processing circuit except the D class A amplifier A, and various pulse width modulation amplifier.
Claims (12)
1. D class A amplifier A, it comprises integrator, is used for to the analog input signal integration;
First comparator is used for the output and first triangular waveform of integrator are compared, and it is characterized in that also comprising:
Second comparator is used for the output and second triangular waveform of integrator are compared, and this second triangular waveform is the waveform that obtains by phase change forward 180 degree or very little negative angle with this first triangular waveform;
Buffer is used for exporting positive side output signal and minus side output signal based on the output of this first comparator and the output of this second comparator; With
Feedback circuit is used for the input of the differential feedback between this positive side output signal and minus side output signal to integrator.
2. D class A amplifier A as claimed in claim 1, wherein, this buffer comprises:
First buffer, the result after the logical produc that is used for calculating the output of the output of this first comparator and this second comparator is calculated with output is as the output signal of minus side; With
Second buffer, the result after the logical produc that is used for calculating the output of the output of this first comparator and this second comparator is calculated with output is as the output signal of side just.
3. D class A amplifier A as claimed in claim 1, wherein, this feedback circuit comprises that differential amplifier is used for being amplified in the difference between positive side output signal and minus side output signal.
4. D class A amplifier A, it comprises integrator, is used for it is characterized in that also comprising to being used to constitute the positive side input signal of analog input signal and the difference between the minus side input signal is carried out integration:
Delay circuit is used for the very little angle that the phase delay of triangular waveform is predetermined;
Combiner circuit is used for each other the output of output, triangular waveform and delay circuit of synthetic integrator so that export a plurality of output signals;
Comparator is used for a plurality of output signals of combiner circuit are compared each other;
Buffer is used for the output of input comparator; With
Feedback circuit is used for the output of buffer is fed back to the input of integrator.
5. according to the D class A amplifier A of claim 4, wherein,
This triangular waveform is constituted by first triangular waveform with corresponding to second triangular waveform by the waveform that phase change 180 degree of this first triangular waveform is produced,
This is delayed circuit and comprises that first delays circuit, is used for the phase delay of this first triangular waveform is somebody's turn to do predetermined very little angle, also comprises second delay circuit, be used for the phase delay of this second triangular waveform is somebody's turn to do predetermined very little angle,
This combiner circuit is synthetic to produce first synthetic waveform with this first triangular waveform with the minus side output of this integrator, the positive side output of this integrator is synthetic to produce second synthetic waveform with this second triangular waveform, the minus side output of this integrator is synthetic to produce the 3rd synthetic waveform with the output of this second delay circuit, with the positive side output of this integrator is synthetic to produce the 4th synthetic waveform with the output of this first delay circuit
This comparator comprises first comparator, is used for this first synthetic waveform and this second synthetic waveform are compared, and also comprises second comparator, be used for the 3rd synthetic waveform and the 4th synthetic waveform are compared,
This buffer comprises first buffer, is used for calculating the logical produc of the output of the output of this first comparator and this second comparator, also comprises second buffer, be used for calculating the output of this first comparator and this second comparator output logical produc and
This feedback circuit comprises first feedback circuit, is used for output with this first buffer to feed back to the positive side input of integrator, also comprises second feedback circuit, is used for the output of this first buffer is fed back to the minus side input of integrator.
6. D class A amplifier A, it comprises integrator, is used for it is characterized in that also comprising to being used to constitute the positive side input signal of analog input signal and the difference between the minus side input signal is carried out integration:
Combiner circuit, be used for the output and the triangular waveform of this integrator synthetic, with the output of this integrator with have with the triangular waveform of aforesaid triangular waveform reverse phase syntheticly so that export a plurality of signals, wherein the triangular waveform of this reverse phase is corresponding to the waveform according to phase change 180 degree of aforementioned triangular waveform;
Comparator is used for the output signal of combiner circuit is compared each other;
Buffer is used for the output of comparator is imported wherein; With
Feedback circuit is used for the output of this buffer is fed back to the input of this integrator,
Wherein, this combiner circuit comprises a plurality of resistance with at least two kinds of resistance values, and is arranged to produce phase difference between corresponding to the input capacitance based on a plurality of signals of the output of the combiner circuit of the resistance value of these a plurality of resistance and comparator.
7. according to the D class A amplifier A of claim 6, wherein,
This combiner circuit comprises: first composite part is used for the minus side output of this integrator synthetic to produce first synthetic waveform with this triangular waveform; Second composite part is used for the positive side output of this integrator synthetic to produce second synthetic waveform with the triangular waveform of this reverse phase; The 3rd composite part is used for the minus side output of this integrator synthetic to produce the 3rd synthetic waveform with the triangular waveform of this reverse phase; With the 4th composite part, be used for the positive side output of this integrator synthetic to produce the 4th synthetic waveform with this triangular waveform;
This first composite part comprises first resistance, and its terminals is connected to the minus side output of this integrator, also comprises second resistance, and wherein this triangular waveform is provided for terminals of this second resistance; Another terminals of this first resistance are connected to another terminals of second resistance so that constitute output;
This two composite part comprises the 3rd resistance, and its terminals are connected to the positive side output of this integrator, also comprise the 4th resistance, and wherein this triangular waveform is provided for terminals of the 4th resistance; Another terminals of the 3rd resistance are connected to another terminals of the 4th resistance so that constitute output;
The 3rd composite part comprises the 5th resistance, and its terminals are connected to the minus side output of this integrator, also comprise the 6th resistance, and wherein the triangular waveform of this reverse phase is provided for terminals of the 6th resistance; Another terminals of the 5th resistance are connected to another terminals of the 6th resistance so that constitute output;
The 4th composite part comprises the 7th resistance, and its terminals are connected to the positive side output of this integrator, also comprise the 8th resistance, and wherein this triangular waveform is provided for terminals of the 8th resistance; Another terminals of the 7th resistance are connected to another terminals of the 8th resistance so that constitute output;
This comparator comprises having the output that an input is connected to this first composite part, and another input is connected to first comparator of the output of this second composite part, also comprise having the output that an input is connected to the 3rd composite part, and another input is connected to second comparator of the output of the 4th composite part;
This buffer comprises first buffer, is used for calculating the logical produc of the output of the output of this first comparator and this second comparator, also comprises second buffer, is used for calculating the logical produc of the output of the output of this first comparator and this second comparator;
This feedback circuit comprises first feedback circuit, is used for output with this first buffer to feed back to the positive side input of this integrator, also comprises second feedback circuit, is used for the output of this second buffer is fed back to the minus side input of this integrator; And
The resistance value of any of this first resistance, second resistance, the 3rd resistance and the 4th resistance is all different with any resistance value of the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance.
8. according to the D class A amplifier A of claim 7, wherein, the resistance value of each of first resistance, second resistance, the 3rd resistance and the 4th resistance obtains by the value that multiply by except 1 according to each resistance value of the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance.
9. D class A amplifier A, it comprises integrator, is used for it is characterized in that also comprising to being used to constitute the positive side input signal of analog input signal and the difference between the minus side input signal is carried out integration:
Triangular waveform produces circuit, comprises current source and electric capacity;
Comparator is used for the output of this integrator and the output of triangular waveform generation circuit are compared;
Buffer is used for importing the output of this comparator; With
Feedback circuit is used for the output of this buffer is fed back to the input of this integrator.
10. according to the D class A amplifier A of claim 9, wherein,
One end of this electric capacity be connected to this comparator input and
The direction of this current source conversion output current is so that charge repeatedly and discharge electric capacity.
11. according to the D class A amplifier A of claim 10, wherein,
One end of this current source is connected to an end of this electric capacity,
This current source direction with electric capacity charging when the electromotive force of this electric capacity is lower than first electromotive force flows out electric current, and when the electromotive force of this electric capacity is higher than second electromotive force with the direction outflow electric current of capacitor discharge and
This second electromotive force is than this first electromotive force height.
12. according to the D class A amplifier A of claim 9, wherein,
This comparator comprises first comparator, is used for the minus side output of this integrator is compared with the output that this triangular waveform produces circuit, also comprises second comparator, be used for the positive side output of this integrator is compared with the output that this triangular waveform produces circuit,
This buffer comprises first buffer, be used for calculating the logical produc of the output of the inverse value of output of this first comparator and this second comparator, also comprise second buffer, be used for calculating this first comparator and this second comparator inverse value logical produc and
This feedback circuit comprises first feedback circuit, is used for output with this first buffer to feed back to the minus side input of this integrator, also comprises second feedback circuit, is used for the output of this second buffer is fed back to the positive side input of this integrator.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003395285 | 2003-11-26 | ||
| JP2003395285 | 2003-11-26 | ||
| JP2004184995 | 2004-06-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2810028Y true CN2810028Y (en) | 2006-08-23 |
Family
ID=36926209
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420117433 Expired - Lifetime CN2810028Y (en) | 2003-11-26 | 2004-11-26 | Class-D amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2810028Y (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101958690A (en) * | 2009-07-17 | 2011-01-26 | 上海沙丘微电子有限公司 | Class-D audio power amplifier circuit |
| CN101369802B (en) * | 2007-08-16 | 2012-09-05 | 美国芯源系统股份有限公司 | Closed-loop D-class power amplifier and its control method |
| CN103296982A (en) * | 2012-02-27 | 2013-09-11 | 无锡华润矽科微电子有限公司 | Circuit structure capable of realizing self-adaptive function in class-D audio power amplification circuit |
| CN101944887B (en) * | 2009-07-07 | 2013-10-23 | 德信科技股份有限公司 | Ended output type D-class amplifier of double-feedback differential circuit |
| CN103491485A (en) * | 2013-09-04 | 2014-01-01 | 国光电器股份有限公司 | Dual-voice-coil horn D-class digital amplification system and signal processing method thereof |
| CN104104343A (en) * | 2014-07-10 | 2014-10-15 | 矽力杰半导体技术(杭州)有限公司 | Triangular wave generating method and triangular wave generating circuit applied to D-class audio frequency amplifier |
| CN105634448A (en) * | 2016-01-08 | 2016-06-01 | 嘉兴禾润电子科技有限公司 | Triangular wave generation circuit in class-D chip provided with boost module |
| CN106208991A (en) * | 2015-05-08 | 2016-12-07 | 意法半导体研发(深圳)有限公司 | There is the efficient class-D amplifier that the EMI of minimizing generates |
-
2004
- 2004-11-26 CN CN 200420117433 patent/CN2810028Y/en not_active Expired - Lifetime
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369802B (en) * | 2007-08-16 | 2012-09-05 | 美国芯源系统股份有限公司 | Closed-loop D-class power amplifier and its control method |
| CN101944887B (en) * | 2009-07-07 | 2013-10-23 | 德信科技股份有限公司 | Ended output type D-class amplifier of double-feedback differential circuit |
| CN101958690A (en) * | 2009-07-17 | 2011-01-26 | 上海沙丘微电子有限公司 | Class-D audio power amplifier circuit |
| CN103296982A (en) * | 2012-02-27 | 2013-09-11 | 无锡华润矽科微电子有限公司 | Circuit structure capable of realizing self-adaptive function in class-D audio power amplification circuit |
| US9331641B2 (en) | 2012-02-27 | 2016-05-03 | Wuxi China Resources Semico Co. | Circuit structure for achieving adaptive function in class-D audio power amplifier circuit |
| CN103296982B (en) * | 2012-02-27 | 2016-10-05 | 无锡华润矽科微电子有限公司 | D class audio frequency power amplification circuit realizes the circuit structure of adaptation function |
| CN103491485A (en) * | 2013-09-04 | 2014-01-01 | 国光电器股份有限公司 | Dual-voice-coil horn D-class digital amplification system and signal processing method thereof |
| CN104104343A (en) * | 2014-07-10 | 2014-10-15 | 矽力杰半导体技术(杭州)有限公司 | Triangular wave generating method and triangular wave generating circuit applied to D-class audio frequency amplifier |
| CN104104343B (en) * | 2014-07-10 | 2017-09-29 | 矽力杰半导体技术(杭州)有限公司 | Triangular wave generation method and circuit applied to D audio frequency amplifier |
| CN106208991A (en) * | 2015-05-08 | 2016-12-07 | 意法半导体研发(深圳)有限公司 | There is the efficient class-D amplifier that the EMI of minimizing generates |
| CN106208991B (en) * | 2015-05-08 | 2019-12-03 | 意法半导体研发(深圳)有限公司 | The efficient class-D amplifier that EMI with reduction is generated |
| CN105634448A (en) * | 2016-01-08 | 2016-06-01 | 嘉兴禾润电子科技有限公司 | Triangular wave generation circuit in class-D chip provided with boost module |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1642001A (en) | Class-D amplifier | |
| CN1711678A (en) | Power amplifier | |
| CN1198393C (en) | DC bias compensating circuit, difference amplifying circuit and photoelectric pulse converting circuit | |
| CN1692551A (en) | Differential amplifier and calculation amplifier | |
| CN1175554C (en) | Control circuit and method for piezoelectric transformer | |
| CN1244898C (en) | Display driving apparatus and display apparatus using same | |
| CN1090839C (en) | Amplifier circuit and multistage amplifier circuit | |
| CN1204679C (en) | Power conversion device | |
| CN1407701A (en) | Switch power supply device | |
| CN1260881C (en) | Differential curcuit and amplifying circuit and display using said amplifying circuit | |
| CN1675819A (en) | Voltage conversion device, voltage conversion method, and computer-readable recording medium containing program for causing computer to execute voltage conversion control | |
| CN1707942A (en) | Voltage comparator circuit | |
| CN1960171A (en) | Class d amplifier and infrared data receiving apparatus using the same | |
| CN1941613A (en) | Class d amplifier | |
| CN1976544A (en) | Capacitive load driving circuit, electrostatic transducer, ultrasonic speaker | |
| CN1826691A (en) | Multi-power source voltage semiconductor device | |
| CN1670577A (en) | Driving voltage control device | |
| CN2810028Y (en) | Class-D amplifier | |
| CN1491476A (en) | DC-DC converter | |
| CN1677846A (en) | Differential amplifier, digital-to-analog converter and display apparatus | |
| CN1741370A (en) | An amplifier apparatus and method | |
| CN1599257A (en) | Class D amplifier | |
| CN1259770C (en) | Gate control device and method for tree-electrical level inverter | |
| CN1187890C (en) | Semiconductor amplifier circuit and system | |
| CN1142136A (en) | Current-order type pulsewidth modulation transformer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Effective date of abandoning: 20090311 |
|
| C25 | Abandonment of patent right or utility model to avoid double patenting |