CN2762463Y - Digital TV movable receiver - Google Patents

Digital TV movable receiver Download PDF

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Publication number
CN2762463Y
CN2762463Y CNU200420102627XU CN200420102627U CN2762463Y CN 2762463 Y CN2762463 Y CN 2762463Y CN U200420102627X U CNU200420102627X U CN U200420102627XU CN 200420102627 U CN200420102627 U CN 200420102627U CN 2762463 Y CN2762463 Y CN 2762463Y
Authority
CN
China
Prior art keywords
decoder chip
digital television
chip
mobile receiver
receiver according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU200420102627XU
Other languages
Chinese (zh)
Inventor
侯卫兵
周凡
郭文秀
胡曾千
金涛
马飞虹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Leaguer Shida Technology Co., Ltd.
Original Assignee
SHENZHEN LEAGUER DIGITAL TV CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN LEAGUER DIGITAL TV CO Ltd filed Critical SHENZHEN LEAGUER DIGITAL TV CO Ltd
Priority to CNU200420102627XU priority Critical patent/CN2762463Y/en
Application granted granted Critical
Publication of CN2762463Y publication Critical patent/CN2762463Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a digital TV movable receiver on the basis of Tsinghua university digital television standard protocol (DMB-T), which comprises a tuner 1, a DMB-T demodulation chip 2 and a main decoding chip 3 (U1), wherein the tuner 1, the DMB-T demodulation chip 2 and the main decoding chip 3 (U1) are respectively connected. The received radio frequency signals can be converted into intermediate frequency signals via the tuner 1 and can be demodulated into TS (transport Stream) via the DMB-T demodulation chip 2, and the signals can enter the main decoding chip 3 (U1) for decoding. The utility model has the characteristic of the digital TV movable receiver can output high quality image and audio programs, and the utility model is suitable for receive and process the digital television signals in automobiles or other mobile environments.

Description

The Digital Television mobile receiver
Technical field
The utility model is about the Digital Television mobile receiver, more particularly, is about be used for wireless receiving and handle the receiver of digital television program signal under Tsing-Hua University's digital television standard agreement (be called for short DMB-T standard).
Background technology
Traditional simulated television is because its intrinsic very poor noiseproof feature causes picture quality all multifactor extremely responsive to antenna direction, signal strength signal intensity, surrounding environment etc.This just makes simulated television can't be used for outdoor mobile reception, particularly vehicle-mounted reception.Use wired mode to transmit and existing Digital Television more, can't realize moving reception.In addition, that existing mobile digital TV adopts is European mobile digital TV standard DVB-T, can not fine adaptation China's actual conditions, the needs of existence conditions and policy.
Summary of the invention
The utility model purpose is to provide a kind of and (is called for short the DMB-T standard based on Tsing-Hua University's digital television standard agreement, the back mentions that this standard adopts this abbreviation) the Digital Television mobile receiver, can in automobile or other mobile environment, receive and handle digital television signal.
The utility model adopts following technical scheme: a kind of Digital Television mobile receiver, comprise tuner 1, also comprise DMB-T demodulation chip 2, main decoder chip 3 (U1), described tuner 1, DMB-T demodulation chip 2 and main decoder chip 3 (U1) are connected successively, the radiofrequency signal that receives converts intermediate-freuqncy signal to through tuner 1, decodes through the laggard decoding chip 3 (U1) of becoming owner of of DMB-T demodulation chip 2 demodulation becoming TS (Transport Stream) stream again.
In the utility model, main decoder chip 3 (U1) is built-in with MPEG-2 decoder module (31), is used for the decoding of vision signal.
The utility model also comprises video amplification module 4, audio decoder chip 5 (U10) and audio frequency amplification module 6, and wherein video amplification module 4 connects main decoder chip 3 (U1); And described main decoder chip 3 (U1), audio decoder chip 5 (U10) are connected successively with audio frequency amplification module 6,
The utility model also comprises clock circuit 7, synchronous DRAM (SDRAM) 8 and flash memory 9, and described clock circuit 7, synchronous DRAM (SDRAM) 8 and flash memory 9 are connected with main decoder chip 3 (U1) respectively.
The radiofrequency signal that antenna receives converts intermediate-freuqncy signal to through tuner 1 (TUNER), through 2 demodulation of DMB-T demodulation chip, becomes TS (Transport Stream) stream.TS flows to and becomes owner of decoding chip 3, amplifies output at last after wherein vision signal is decoded by main decoder chip 3 built-in MPEG-2 decoder modules 31 again through video amplification module 4; Audio signal is exported through audio frequency amplification module 6 after being decoded by audio decoder chip 5 (U10).See Fig. 1.
Image and sound programme with energy outputting high quality of the present utility model is fit to move the characteristics that receive.
Description of drawings
Fig. 1 is the utility model theory diagram;
Fig. 2 is the circuit diagram of the output of the utility model embodiment;
Fig. 3 is the circuit diagram of the storage area of the utility model embodiment;
Fig. 4 is the circuit diagram of the data processing section of the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing the utility model is further described.
In the utility model embodiment shown in Fig. 2,3,4, the radiofrequency signal that antenna receives becomes 8 road TS stream through demodulation, by socket JP4, goes here and there exclusion RP17 and RP18 again, enters the input port IPO3_0 to IPO3_7 of main decoder chip (U1) then respectively.Vision signal decoding back is from the output of main decoder chip CV_OUT pin, through becoming final video output signals after the amplification of active power filtering amplifying circuit.Audio signal flows out from the DAC_PCMOUT1 of U1, enters audio decoder chip (U10) decoding.After audio decoder was finished, stereo audio R/L exported from VOUTR and the VOUTL of U10 respectively, and enters audio amplifier circuit.The output AUR of audio amplifier circuit and AUL are final stereo audio output signal.
Video amplification module wherein: based on the inverting amplifier of PNP triode Q1.The 5V DC power supply provides voltage for amplifier.
The audio decoder of present embodiment and amplifier section: BCK, the SCK of audio decoder chip 5 (U10), DATA, LRCK pin connect 51,53,55, No. 56 pins of U1 respectively, 13,14, No. 15 pins of U10 connect 189,190, No. 191 pins of U1 respectively, are used for the transmission of data and control signal.3.3V, 5V and ground receives VDD, VCC and the GND of audio decoder chip 5 (U10) respectively.(power supply connects by inductance L 4, L5 respectively, and by shunt capacitance ground connection).7, No. 8 pins of U10 are exported left and right audio signal, carry out anti-phase amplification through integrated operational amplifier (U4).Signal every directly, enters integrated operational amplifier (U4) end of oppisite phase by C41, C43.The 12V DC power supply is divided into 6V through R49, R50 and enters integrated operational amplifier (U4) in-phase end and be used to raise output level.Amplified signal is exported by filtering again.
In this embodiment, synchronous DRAM (SDRAM) 8 (U5, U6) and flash memory 9 (FLASH) are (U8), the DQ0-DQ15 of U5 is connected with the CPU_DATA0-CPU_DATA15 pin of the DO0-DO15 of U8, U1, the A0-A20 of U8 is connected with the CPU_ADR1-CPU_ADR21 of U1 and the respective pins of U5 respectively, the SMI_DATA0-SMI_DATA15 of U1 is connected with the DQ0-Q15 of U6, and SMI_ADR0-SMI_ADR13 also is connected with the respective pins of U6.In addition, the VCC of U5, U6 and U8 meets 3.3V, GND ground connection, and separate with electric capacity (C1-C16) between 3.3V and the ground.
Clock circuit 7 parts are the 3.3V power supplys that connected process filtering by the vdd terminal of VCXO VCXO.U1 is by PWM2 mouth control VCXO.The OUT pin output 27MHz of VCXO receives the PIX_CLK pin of U1.

Claims (9)

1, a kind of Digital Television mobile receiver, comprise tuner (1), it is characterized in that: also comprise DMB-T demodulation chip (2), main decoder chip (3) (U1), described tuner (1), DMB-T demodulation chip (2) and main decoder chip (3) (U1) are connected successively.
2, Digital Television mobile receiver according to claim 1 is characterized in that: described main decoder chip (3) (U1) is built-in with MPEG-2 decoder module (31), is used for the decoding of vision signal.
3, Digital Television mobile receiver according to claim 1 is characterized in that: also comprise video amplification module (4), wherein video amplification module (4) connects main decoder chip (3) (U1).
4, Digital Television mobile receiver according to claim 1, it is characterized in that: also comprise audio decoder chip (5) (U10) and audio frequency amplification module (6), described main decoder chip (3) (U1), audio decoder chip (5) (U10) is connected successively with audio frequency amplification module (6).
5, Digital Television mobile receiver according to claim 1, it is characterized in that: also comprise clock circuit (7), synchronous DRAM (SDRAM) (8) and flash memory (9), described clock circuit (7), synchronous DRAM (SDRAM) (8) and flash memory (9) (U1) are connected with main decoder chip (3) respectively.
6, Digital Television mobile receiver according to claim 3 is characterized in that: described video amplification module (4) comprises the inverting amplifier of PNP triode and is that video amplification module (4) provides voltage by the 5V DC power supply.
7, Digital Television mobile receiver according to claim 4, it is characterized in that: audio decoder chip (5) BCK, SCK, DATA, LRCK pin (U10) connects main decoder chip (3) 51,53,55, No. 56 pins (U1) respectively, audio decoder chip (5) 13,14, No. 15 pins (U10) are 189,190, No. 191 pins respectively, are used for the transmission of data and control signal; 3.3V and the 5V power supply is connected to audio decoder chip (5) VDD and VCC (U10) by inductance (L4, L5) respectively, earth terminal is connected to audio decoder chip (5) GND end (U10) by shunt capacitance; Audio decoder chip (5) 7, No. 8 pins (U10) are exported left and right audio signal, carry out anti-phase amplification through integrated operational amplifier (U4), and signal every directly, enters integrated operational amplifier (U4) end of oppisite phase by electric capacity; The 12V DC power supply enters integrated operational amplifier (U4) in-phase end after becoming 6V through electric resistance partial pressure.
8, Digital Television mobile receiver according to claim 5 is characterized in that: synchronous DRAM (SDRAM) DQ0-DQ15 (U5) is connected with the CPU_DATA0-CPU_DATA15 pin of DO0-DO15, the U1 of U8.The A0-A20 of U8 is connected with the CPU_ADR1-CPU_ADR21 of U1 and the respective pins of U5 respectively;
The SMI_DATA0-SMI_DATA15 of U1 is connected with the DQ0-DQ15 of U6, and SMI_ADR0-SMI_ADR13 also is connected with the respective pins of U6;
The VCC of U5, U6 and U8 meets 3.3V, GND ground connection, and the centre separates with electric capacity.
9, Digital Television mobile receiver according to claim 5, it is characterized in that: described clock circuit (7) comprises a VCXO, the vdd terminal of described VCXO connects the 3.3V power supply through filtering, and described VCXO OUT pin is connected with main decoder chip (3) PIX_CLK pin (U1).
CNU200420102627XU 2004-12-17 2004-12-17 Digital TV movable receiver Expired - Fee Related CN2762463Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU200420102627XU CN2762463Y (en) 2004-12-17 2004-12-17 Digital TV movable receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU200420102627XU CN2762463Y (en) 2004-12-17 2004-12-17 Digital TV movable receiver

Publications (1)

Publication Number Publication Date
CN2762463Y true CN2762463Y (en) 2006-03-01

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Application Number Title Priority Date Filing Date
CNU200420102627XU Expired - Fee Related CN2762463Y (en) 2004-12-17 2004-12-17 Digital TV movable receiver

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CN (1) CN2762463Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113296275A (en) * 2021-06-01 2021-08-24 佳木斯大学 Medical image observation lamp box for image department

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113296275A (en) * 2021-06-01 2021-08-24 佳木斯大学 Medical image observation lamp box for image department

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: SHENZHEN LIHESHIDA TECHNOLOGY CO., LTD.

Free format text: FORMER OWNER: SHENZHEN LIHE DIGITAL TELEVISION CO., LTD.

Effective date: 20090814

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20090814

Address after: Research Institute of Shenzhen Tsinghua University, Nanshan District hi tech Southern District, Guangdong, Shenzhen 518057, China

Patentee after: Shenzhen Leaguer Shida Technology Co., Ltd.

Address before: A319 Research Institute, Shenzhen District, Nanshan District science and Technology Park, Guangdong,, China

Patentee before: Shenzhen Leaguer Digital TV Co., Ltd.

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20060301

Termination date: 20121217