CN2739702Y - Apparatus for power management in disk drives - Google Patents
Apparatus for power management in disk drives Download PDFInfo
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- CN2739702Y CN2739702Y CN 200420059824 CN200420059824U CN2739702Y CN 2739702 Y CN2739702 Y CN 2739702Y CN 200420059824 CN200420059824 CN 200420059824 CN 200420059824 U CN200420059824 U CN 200420059824U CN 2739702 Y CN2739702 Y CN 2739702Y
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- bus interface
- interface logic
- electronic circuit
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- dog
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Abstract
The utility model discloses the electronic circuit of a hard disk drive, comprising (a) a main electronic circuit, (b) a bus interface logic, (c) the monitor of the bus interface logic which monitors the movement of the main interface, and (d) a regulator which provides power to the monitor of the bus interface logic, the bus interface logic and the main electronic circuit, wherein, the monitor of the bus interface logic decides whether to enter into a sleep pattern, if the electronic circuit of the hard disk drive enters into the sleep pattern, the power supply from the regulator is switched off on the bus interface logic and the main electronic circuit.
Description
Technical field
One or more embodiment of the present invention relates generally to be used for the method and apparatus of the power management of hard disk drive.
Background technology
Small-sized (small form factor) hard disk drive, such as (giving an example, be not limited thereto) observe the hard disk drive of " CF+ and CF calliper lattice (CF+ and Compact FlashSpecification) " second correction of issuing in May, 2003 by CF card (high density flash memory) association that is positioned at Palo Alto city, California, be normally used for doing in the portable main machine of power supply, such as (be for example rather than be limited to this) digital camera with battery.In this environment, the action that the operation of hard disk drive is normally extremely very brief has this very brief action such as (being not limited thereto for example) when between hard disk drive and main frame data transmission having taken place.In a data transfer to interim of data transmission next time, hard disk drive oneself or answer the request of main frame to enter " sleep pattern ".We know that according to prior art, among sleep pattern, all operations of driver are all ended, and wait for from the command/request of main frame for new data transmission.
We know that the most of assemblies in the hard disk drive all have powder source management mode, and this pattern makes the part assembly be suspended work when sleep pattern, to save energy.For example, in general hard disk drive, the assembly that integrated circuit constituted generally has this kind performance, and the assembly that discrete component constituted does not then have this kind performance.Can reduce power consumption significantly although in sleep pattern, the part assembly turned off, still have such problem, promptly or even under sleep pattern, also have some these class components at least still in electricity consumption.
For example, under certain application cases, the time that sleep pattern (time spent) is consumed may be that 10 times of operator scheme institute time-consuming are to 100 double-lengths.As a result, because the power supply of hard disk drive obtains from main frame usually, such as, obtain from the battery of main frame, get off for a long time, main frame was still at consumed power when hard disk drive was in sleep pattern, and this battery life to main frame can have a negative impact.
Based on above viewpoint, need overcome one or more problems of pointing out above.
Summary of the invention
One or more embodiment of the present invention has satisfied one or more top described requirements technically.Especially, one embodiment of the present of invention are electronic circuit parts of hard disk drive, and it comprises: (a) main electronic circuit; (b) bus interface logic; (c) bus interface logic watch-dog, the activity on its monitoring main interface; And (d) regulator, described bus interface logic watch-dog, described bus interface logic, and described main electronic circuit are given in power supply; Wherein whether this bus interface logic watch-dog decision enters sleep pattern, if enter, then the power supply that comes self tuning regulator is turned off from bus interface logic and main electronic circuit.
Description of drawings
Fig. 1 has provided the synoptic diagram according to the hard disk drive electronic circuit of one or more embodiment manufacturings of the present invention.
Embodiment
Fig. 1 has provided the synoptic diagram according to the hard disk drive electronic circuit 100 of one or more embodiment manufacturings of the present invention.As shown in Figure 1, hard disk drive electronic circuit 100 comprises: main interface 110, and it comprises interface bus 120 and power supply driver 130 (for example, be not limited thereto, power supply driver 130 is connected to power supply, for example, be not limited thereto, this power supply can be the battery in the main frame).The habitual function of main interface 110, interface bus 120 and power supply driver 130 can provide with the ordinary electronic circuit according to any manufacturing in the known numerous methods of those of ordinary skills.Further illustrate as Fig. 1, interface bus 120 is connected to bus interface logic 140, and bus interface logic 140 is connected to main electronic circuit 160 via internal bus and logical circuit line 150 then.The habitual function of internal bus and logical circuit line 150 and main electronic circuit 160 can provide with the ordinary electronic circuit according to any manufacturing in the known numerous methods of those of ordinary skills.According to one or more embodiment of the present invention, bus interface logic 140 is made up of two parts, and promptly the bus interface logic watch-dog 140
1With bus interface logic 140
2Bus interface logic watch-dog 140
1Be an independent parts of bus interface logic 140, the activity on the monitor-interface bus 120, and or even when hard disk drive 100 is in sleep pattern, still working.Bus interface logic 140
2Be responsible for handling all the other functions of bus interface logic 140.Bus interface logic circuit supervision device 140
1With bus interface logic 140
2Habitual function, can provide with ordinary electronic circuit skill according to any manufacturing in the known numerous methods of those of ordinary skills.
As further illustrating among Fig. 1, power supply driver 130 is connected to, and auxiliary governor 170 and master selector 200 (we know, consider the input potentially unstable of power supply driver 130, and auxiliary governor 170 and master selector 200 are to be used for the constant of sustaining voltage) are given in power supply.As further illustrating among Fig. 1, auxiliary governor 170 is given bus interface logic 140 via circuit 180 power supplies, and (in particular, bus interface logic watch-dog 140 is given in power supply
1), and master selector 200 is being received from bus interface logic watch-dog 140
1Behind " enabling primary power " signal as input signal, give main electronic circuit 160 via circuit 210 power supplies.As further illustrating among Fig. 1, should " enabling primary power " signal via circuit 190 from bus interface logic watch-dog 140
1(another alternative also can pass through bus interface logic 140 to offer master selector 200
2The transmission, described " enabling primary power " signal from bus interface logic watch-dog 140
1Offer master selector 200).
According to one or more embodiment of the present invention, bus interface logic watch-dog 140
1Comprise and make its initiation enter the electronic circuit of sleep pattern: after (a) in a predetermined amount of time, not having activity via interface bus 120 requests; Perhaps (b) main frame sends the order that enters sleep pattern via interface bus 120.According to one or more embodiment of the present invention, bus interface logic watch-dog 140
1From circuit 190, close " enabling primary power ".This has caused master selector 200 to stop power supply to main electronic circuit 160, and main electronic circuit 160 is quit work.Then, or side by side, bus interface logic watch-dog 140
1Make auxiliary governor 170 stop power supply to bus interface logic 140
2Be for example rather than be limited to this that this can finish (not shown) by the internal switch of opening in the bus interface logic 140.According to the embodiment of one or more accommodations of the present invention, bus interface logic watch-dog 140
1Can send a signal and give bus interface logic 140
2To enter sleep pattern.Above-mentioned functions can provide with the ordinary electronic circuit according to any manufacturing in the known numerous methods of those of ordinary skills.
When hard disk drive 100 is in sleep pattern, bus interface logic watch-dog 140
1Just come continued power by independent also preferably small-sized and cheap auxiliary governor 170, and, when master selector 200 has been deactivated, bus interface logic watch-dog 140
1Continuous service is with the activity on the monitor-interface bus 120.Especially, the bus interface logic watch-dog 140
1Whether monitoring hard disk drive 100 is called, if, then according to one or more embodiment of the present invention, bus interface logic watch-dog 140
1Again it is as follows to activate hard disk drive 100.According to one or more embodiment of the present invention, bus interface logic watch-dog 140
1" enabling primary power " signal is added on the circuit 190.This makes master selector 200 power supplies give main electronic circuit 160, and has therefore started main electronic circuit 160.Then, perhaps side by side, bus interface logic watch-dog 140
1Make auxiliary governor 170 begin power supply and give bus interface logic 140
2Be for example rather than restriction therewith, this can finish by the internal switch (not shown) of closing in the bus interface logic 140.According to the embodiment of one or more accommodations of the present invention, bus interface logic watch-dog 140
1Can send a signal and give bus interface logic 140
2So that it withdraws from sleep pattern.Above-mentioned functions can provide with the ordinary electronic circuit according to any manufacturing in the known numerous methods of those of ordinary skills.
Advantageously, according to described one or more embodiment of the present invention in the above, by the monitoring bus function is separated from remaining driver electronics 100, the power supply that is added to all the other electronic circuits of driver 100 can be by complete stop supplies, the power consumption when having eliminated it thus and being in sleep pattern.In addition, when make described bus interface logic watch-dog 140 of the CMOS logic module
1The time, independently the bus interface logic watch-dog 140
1Only will consume a little energy during movable on monitor-interface bus 120 passively.
According to the embodiment of one or more accommodations of the present invention, can utilize single actuator to replace utilizing two regulators.So according to the embodiment of this one or more accommodations, single actuator is still to act in sleep pattern, so that bus interface logic watch-dog 140 is given in power supply
1, wherein can utilize a switch to close remaining electronic circuit of hard disk drive 100.For example, described switch can be in response to from bus interface logic watch-dog 140
1Signal operate, this method and top the description utilize mode that described " enabling primary power " signal opens or closes master selector 200 much at one.
Although provided and described in detail the various embodiment that combine instruction of the present invention, person skilled in the art person can easily design many other embodiment miscellaneous, and these embodiment miscellaneous still quote instruction of the present invention.
Claims (11)
1, hard disk drive electronic circuit comprises:
Main electronic circuit;
Bus interface logic;
A bus interface logic watch-dog, the activity on its monitoring main interface; And
A regulator, described bus interface logic watch-dog, described bus interface logic, and described main electronic circuit are given in its power supply;
Wherein whether this bus interface logic watch-dog decision enters sleep pattern, if enter, then the power supply that comes self tuning regulator is removed from this bus interface logic and this main electronic circuit.
2, according to the hard disk drive electronic circuit in the claim 1, wherein, this bus interface logic watch-dog also will determine whether to withdraw from sleep pattern, if then power supply is added in described bus interface logic and described main electronic circuit.
3, according to the hard disk drive electronic circuit in the claim 1, wherein, this bus interface logic watch-dog perhaps according to the predetermined message of being received, determines whether entering sleep pattern by determining do not have activity on the described main interface in the time of a predetermined length on this main interface.
4, according to the hard disk drive electronic circuit in the claim 2, wherein, this bus interface logic watch-dog determines whether withdrawing from sleep pattern according to message received on described main interface.
5, according to the hard disk drive electronic circuit in the claim 2, wherein, described regulator comprises that a power supply gives the auxiliary governor of described bus interface logic watch-dog and described bus interface logic, and the master selector of described main electronic circuit is given in power supply.
6, according to the hard disk drive electronic circuit in the claim 5, wherein, described master selector in response to one from described bus interface logic watch-dog impose on it enable signal with the power supply.
7, according to the hard disk drive electronic circuit in the claim 6, wherein, as long as this is enabled signal one and is cancelled, described master selector is just turned off power supply from described main electronic circuit.
8, according to the hard disk drive electronic circuit in the claim 5, wherein, described auxiliary governor imposes on its signal of enabling in response to one from described bus interface logic watch-dog, gives described bus interface logic with power supply.
9, the hard disk drive electronic circuit in according to Claim 8, wherein, as long as this is enabled signal one and is cancelled, described auxiliary governor is just turned off power supply from bus interface logic.
10, according to the hard disk drive electronic circuit in the claim 5, wherein, described auxiliary governor is given bus interface logic in response to the caused switch closure of this bus interface logic watch-dog with power supply.
11, according to the hard disk drive electronic circuit in the claim 10, wherein, described auxiliary governor is in response to the caused switch opens of this bus interface logic watch-dog, so that power supply is turned off from bus interface logic.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/687,051 | 2003-10-16 | ||
US10/687,051 US20040083396A1 (en) | 2002-10-22 | 2003-10-16 | Method and apparatus for power management in disk drives |
Publications (1)
Publication Number | Publication Date |
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CN2739702Y true CN2739702Y (en) | 2005-11-09 |
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ID=35067526
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200420059824 Expired - Fee Related CN2739702Y (en) | 2003-10-16 | 2004-05-21 | Apparatus for power management in disk drives |
CN 200410084872 Pending CN1680928A (en) | 2003-10-16 | 2004-10-08 | Method and apparatus for power management in disk drives |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
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CN 200410084872 Pending CN1680928A (en) | 2003-10-16 | 2004-10-08 | Method and apparatus for power management in disk drives |
Country Status (1)
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CN (2) | CN2739702Y (en) |
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2004
- 2004-05-21 CN CN 200420059824 patent/CN2739702Y/en not_active Expired - Fee Related
- 2004-10-08 CN CN 200410084872 patent/CN1680928A/en active Pending
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CN1680928A (en) | 2005-10-12 |
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C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |