CN2735426Y - Real-time clock feed circuit capable of clearing CMOS settings - Google Patents
Real-time clock feed circuit capable of clearing CMOS settings Download PDFInfo
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- CN2735426Y CN2735426Y CN 200420077943 CN200420077943U CN2735426Y CN 2735426 Y CN2735426 Y CN 2735426Y CN 200420077943 CN200420077943 CN 200420077943 CN 200420077943 U CN200420077943 U CN 200420077943U CN 2735426 Y CN2735426 Y CN 2735426Y
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Abstract
The utility model discloses a real time clock circuit for clearing up a CMOS setup, comprising a south-bridge static memorizer, a power supply, a key-press circuit and a press key S1. The electric current output by the power supply is input into the power supply base pin VCCREC and the reset base pin RTCRST of the south-bridge static memorizer, and when the reset base pin RTCRST is at low level, the CMOS setup is cleared up; the key-press circuit is used for starting the clearing up operation of the CMOS setup; one end of the press key S1 is grounded, and the other end of the press key S1 is connected to the reset base pin RTCRST to control the reset base pin RTCRST whether be at low level or not. The utility model is provided a press key for clearing up the CMOS at the external surface, so that the users can conveniently and reliably execute the movement of clearing up the CMOS.
Description
Technical field
The utility model relates to a kind of real-time clock (RTC) feed circuit, relates in particular to the RTC feed circuit that a kind of CMOS of removing is provided with.
Background technology
CMOS is a kind of storer made from complementary metal oxide semiconductor (CMOS), is a read-write chip on the computer motherboard, is used for preserving the hardware configuration of current system and the user setting to some parameter.
CMOS itself is a block storage just, and it can only play the effect of storage to data wherein, and can not the data that be stored in wherein be provided with.Set parameters among the CMOS needs by special program--and the CMOS setting program is finished.Early stage CMOS setting program is (as the PC/AT type of IBM) that resides on the floppy disk, uses and to carry out the parameter setting very inconvenient.BIOS (Basic Input﹠amp has accomplished with the CMOS setting program in producer now; Output System Basic Input or Output System (BIOS)) in the chip, after user's modification CMOS parameter, the parameter that the user is provided with is stored in the static memory of south bridge (ICH).After computer restarted, these parameters can be called by the BIOS system in POST (Power On SelfTest) process, thereby realized the change of hardware setting.The user just can enter the CMOS setting program by specific button and easily system is provided with when start, so the CMOS setting is called the BIOS setting again.
CMOS can be powered by the battery on the mainboard, even the power-off of computer motherboard, the data that are stored among the CMOS can not lost yet.When the user is provided with CMOS by BIOS setup program, the value of setting does not have back among the CMOS of depositing, but be put in the static memory of south bridge (ICH), these storeies need the power supply supply to keep the information of its storage inside constantly, will not lose in case there is power supply to supply these information.After COMPUTER DETECTION arrives the information dropout of ICH memory stores, just calling in the most original default configuration from CMOS comes each register is carried out initialization, if it is incorrect among the CMOS about configuration information of computer, can cause that system performance reduces, parts can not be discerned, and the hardware and software failure of initiating system thus.
In actual use, the computer user often runs into start does not have situation about showing, does not have in the analysis of causes that shows in start, finds that the problem of quite a few causes owing to user BIOS is provided with mistake, or because misoperation such as undesired shutdown, cause CMOS to be provided with that mistake causes.Do not show because start has, cause entering BIOS setup program, thus can't normal boot-strap.The conventional solution that this problem occurs is to remove ICH (south bridge) feed circuit, removing wrong CMOS is provided with, the particular value that the CMOS that is about to store among the ICH is provided with is removed, if the problem that CMOS is provided with, so in start next time, BIOS is the CMOS configuration loss in detecting ICH, will access default configuration from CMOS, thereby realizes normal boot-strap.
Figure 1 shows that the circuit theory diagrams of RTC circuit of the prior art, comprise south bridge static memory, diode D1, diode D2, current-limiting resistance R1, the standing power supply of current-limiting resistance R2,3.3V and battery, 3.3V the 3.3V electric current of standing power supply output is input to the power pin VCCREC of south bridge static memory by diode D2 forward, the 3.3V electric current of the standing power supply output of 3.3V is input to the reseting pin RTCRST of south bridge static memory by diode D2, current-limiting resistance R1, current-limiting resistance R2; The electric current of battery output is input to the power pin VCCREC of south bridge static memory by diode D1, current-limiting resistance R1, and the electric current of battery output is input to the reseting pin RTCRST of south bridge static memory by diode D1, current-limiting resistance R2; The reseting pin RTCRST of south bridge static memory is by capacitor C 1 ground connection.
The VCCRTC pin is the power supply pin of the inner static memory of ICH, as long as the voltage of VCCRTC is higher than the content that 2V just can be maintained the inner static memory storage of ICH, but ICH does not allow to remove the CMOS setting in the mode that directly the VCCRTC pin is pulled down to below the 2V.Remove the CMOS setting and will pass through another one pin RTCRST, it is effective that the RTCRST pin is pulled down to low level, and ICH just can dispose the content in the static memory, removes the purpose that CMOS is provided with thereby reach.
3.3VSB ICH inside static memory is powered by the VCCRTC pin with the BATTERY battery, puts a high position by R2 to RTCRST simultaneously.This part circuit all is distributed on the mainboard, when the user need remove CMOS and is provided with, need pull out power lead, open cabinet, remove the battery on the mainboard then, the RTCRST pin of the inner static memory of ICH is pulled down to low level, could removes CMOS and be provided with, the operating process that this removing CMOS is provided with is comparatively complicated concerning domestic consumer.
Summary of the invention
The technical matters that the utility model solves provides real-time clock (RTC) feed circuit that a kind of CMOS of removing is provided with.
In order to solve the problems of the technologies described above, the utility model by the following technical solutions:
A kind of real time clock circuit of removing the CMOS setting, comprise south bridge static memory and power supply, the electric current of power supply output is input to the power pin VCCREC and the reseting pin RTCRST of south bridge static memory, and when reseting pin RTCRST was low level, CMOS was provided with and is cleared; Also comprise key circuit, be used to start CMOS clear operation is set that further comprise an end ground connection, the other end is connected with reseting pin RTCRST, whether control reseting pin RTCRST is low level button S1.
Also comprise holding circuit; described holding circuit comprises the reseting pin RTCRST that is connected on the south bridge static memory and the switching device between button S1; described switching device control end be used to show that the standing voltage of 5V whether computer power supply closes is connected; control its closed and disconnection, it is only effective when computer power supply is closed to make CMOS that clear operation is set.
Described switching device is normally closed electromagnetic relay.
When the standing voltage of described 5V existed, switching device was an off-state, and it is invalid that the CMOS that S1 carries out of pushing button this moment empties operation; When the standing voltage of described 5V did not exist, switching device was a closure state, and the CMOS that the S1 that pushes button this moment carries out empties efficient in operation.
Described power supply comprises standing voltage of 3.3V and battery; 3.3V standing voltage is input to the power pin VCCREC of south bridge static memory by diode D2 forward, the standing voltage of 3.3V is input to the reseting pin RTCRST of south bridge static memory by diode D2, current-limiting resistance R1, current-limiting resistance R2; The electric current of battery output is input to the power pin VCCREC of south bridge static memory by diode D1, current-limiting resistance R1, and the electric current of battery output is input to the reseting pin RTCRST of south bridge static memory by diode D1, current-limiting resistance R2; The reseting pin RTCRST of south bridge static memory is by capacitor C 1 ground connection.
The standing voltage of described 3.3V is formed by the standing voltage modulated of 5V.
Described button S1 is positioned at the computer cabinet outside surface.
The end of described button S1 is by resistance R 4 ground connection.
The resistance value ratio of described resistance R 2 and resistance R 4 is greater than 8.
The utility model compared with prior art has the following advantages:
The button that the utility model will be removed CMOS is put into the computer cabinet outside; the CMOS action is removed in the convenient and reliable execution of user's energy; and, can avoid under the situation that connects power supply user's mistake to press CMOS and remove the unnecessary loss that button caused by the protection of the switching device in the circuit.
Description of drawings
Fig. 1 is the circuit theory diagrams of RTC circuit in the prior art;
Fig. 2 is a theory diagram of the present utility model;
Fig. 3 is the circuit theory diagrams of RTC circuit of the present utility model.
Embodiment
In order to realize that the user removes the action of CMOS easily, the utility model will be removed CMOS and make a button, be placed into computer cabinet outside surface (as front panel or back I/O catch), and the user can carry out CMOS easily and remove action like this.But because the importance that CMOS is provided with if remove the action that CMOS is provided with in the normal execution in service of computing machine, can cause computing machine the collapsibility consequence to occur, even can burn out CPU.The normal process of removing CMOS should be a system closedown, pulls out the 220V power supply then, carries out CMOS again and removes action.
In order to realize normally removing the CMOS flow process, must design an electrization protection circuit, make the user under the server electrifying condition or under the situation of 220V power supply maintenance connection, can't remove operation or the exercise void of CMOS.For this reason, must selection can represent the 220V power supply to keep the signal of connection status, in the utility model, select 5VSB (the standing voltage of 5V) as representative, 5VSB is the power supply that computer power supply is just exported when the 220V power supply provides, it is different with other power supply outputs (as 3V, 5V and 12V), not output of 5VSB is independent output, if can show that so the 220V power supply does not provide.
As shown in Figure 2, the utility model is made up of power supply, ICH static memory, holding circuit and key circuit, and the electric current of power supply output is input to the power pin VCCREC and the reseting pin RTCRST of south bridge static memory, and power supply comprises 3.3VSB and battery.When computing machine connects the 220V AC power, by 3.3VSB the power pin VCCREC and the reseting pin RTCRST of ICH static memory are powered, when the 220V of computing machine AC power disconnects, be that the power pin VCCREC and the reseting pin RTCRST of ICH static memory powers by battery.Key circuit is connected with the reseting pin RTCRST of ICH static memory by holding circuit.
Figure 3 shows that RTC power supply circuit of the present utility model, VCCRTC is the power supply pin of the inner static memory of ICH, as long as the voltage of VCCRTC is higher than the content that 2V just can be maintained inner static memory storage, but ICH does not allow to remove the CMOS setting in the mode that directly the VCCRTC pin is pulled down to below the 2V.Remove CMOS and be provided with and as long as it is effective that the RTCRST pin is pulled down to low level, will dispose the content in the ICH static memory by another one pin RTCRST so, reach and remove the purpose that CMOS is provided with.
The VCCRTC pin power supply of the static memory of ICH is by battery BATTERY and 3.3VSB (the standing voltage of 3.3V, by 5VSB process voltage modulated) finish jointly, 3.3V the 3.3V electric current of standing power supply output is input to the power pin VCCREC of south bridge static memory by diode D2 forward, the 3.3V electric current of the standing power supply output of 3.3V is input to the reseting pin RTCRST of south bridge static memory by diode D2, current-limiting resistance R1, current-limiting resistance R2; The electric current of battery output is input to the power pin VCCREC of south bridge static memory by diode D1, current-limiting resistance R1, and the electric current of battery output is input to the reseting pin RTCRST of south bridge static memory by diode D1, current-limiting resistance R2; D1 and D2 are used for the isolation of 3.3VSB and battery BATTERY.The reseting pin RTCRST of south bridge static memory is by capacitor C 1 ground connection.JP1 is one three a frame jack, and JP2 is one three a frame plug, and JP1 is linked to each other with JP2, and button S1 is placed on the cabinet surface as front panel or I/O catch position, back.The pin 3 of JP1 is through current-limiting resistance R4 ground connection, and the pin one of JP1 is connected with the RTCRST supervisor of the static memory of ICH by a normally closed electromagnetic relay K1, and the solenoid of normally closed electromagnetic relay K1 is connected with the 5VSB power supply by current-limiting resistance R3.The button that S1 is provided with for removing CMOS, when S1 is pressed, the pin one of JP2 and pin 3 conductings, the i.e. pin one of JP1 and pin 3 conductings.
At open state or connecting under the off-mode of 220 AC power, 5VSB and 3.3VSB exist, the power supply of the inner static memory of ICH this moment is provided by 3.3VSB, 3.3VSB give capacitor C 1 charging by diode D2, current-limiting resistance R1, current-limiting resistance R2, making the RTCRST pin of the inner static memory of ICH is high level.If at this moment the user supresses button S1, the pin one of JP1 interface and pin 3 conductings, pin one is a low level, but because the existence of 5VSB, making normally closed electromagnetic relay K1 is open mode, thereby makes the user press the invalid operation that is operating as of S1 button.
When the user with attaching plug when the 220V AC Power supply socket is pulled out, 3.3VSB and 5VSB disconnects, the power supply of the VCCRTC pin of the inner static memory of ICH this moment is provided by battery BATTERY, if at this moment the user supresses button S1, the pin one of JP1 interface and pin 3 conductings, pin one is a low level, because 5VSB does not exist, making normally closed electromagnetic relay K1 is closure state, the pin one of JP1 interface is connected with capacitor C 1 by K1, because pin one is a low level, and capacitor C 1 discharge, the RTCRST pin voltage of the inner static memory of ICH is dragged down, and carries out CMOS the removing action is set.
The voltage of RTCRST pin is pulled down to the resistance value ratio that low level effectively need rationally be provided with R2 and R4, and the ratio of R2 and R4 should be greater than 8, thereby guarantee to drag down reliably the RTCRST pin.
Normally closed electromagnetic relay in the foregoing description also can other types switching device, as electronic switching tube etc., but because the electric current leakage circuit of electronic switching tube may cause the electric leakage of battery, therefore preferred normally closed electromagnetic relay.
Claims (9)
1, a kind of real time clock circuit of removing the CMOS setting, comprise south bridge static memory and power supply, the electric current of power supply output is input to the power pin VCCREC and the reseting pin RTCRST of south bridge static memory, and when reseting pin RTCRST was low level, CMOS was provided with and is cleared; It is characterized in that: also comprise key circuit, be used to start CMOS clear operation is set, comprise further whether an end ground connection, the other end are connected, control reseting pin RTCRST with reseting pin RTCRST is low level button S1.
2, the real time clock circuit of removing the CMOS setting as claimed in claim 1; it is characterized in that: also comprise holding circuit; described holding circuit comprises the reseting pin RTCRST that is connected on the south bridge static memory and the switching device between button S1; described switching device control end be used to show that the standing voltage of 5V whether computer power supply closes is connected; control its closed and disconnection, it is only effective when computer power supply is closed to make CMOS that clear operation is set.
3, the real time clock circuit that can remove the CMOS setting fast according to claim 1 and 2, it is characterized in that: described switching device is normally closed electromagnetic relay.
4, according to claim 3ly can remove the real time clock circuit that CMOS is provided with fast, it is characterized in that: when the standing voltage of described 5V existed, switching device was an off-state, and it is invalid that the CMOS that the S1 that pushes button this moment carries out empties operation; When the standing voltage of described 5V did not exist, switching device was a closure state, and the CMOS that the S1 that pushes button this moment carries out empties efficient in operation.
5, the real time clock circuit that can remove the CMOS setting fast according to claim 2, it is characterized in that: described power supply comprises standing voltage of 3.3V and battery; 3.3V standing voltage is input to the power pin VCCREC of south bridge static memory by diode D2 forward, the standing voltage of 3.3V is input to the reseting pin RTCRST of south bridge static memory by diode D2, current-limiting resistance R1, current-limiting resistance R2; The electric current of battery output is input to the power pin VCCREC of south bridge static memory by diode D1, current-limiting resistance R1, and the electric current of battery output is input to the reseting pin RTCRST of south bridge static memory by diode D1, current-limiting resistance R2; The reseting pin RTCRST of south bridge static memory is by capacitor C 1 ground connection.
6, the real time clock circuit that can remove the CMOS setting fast according to claim 5, it is characterized in that: the standing voltage of described 3.3V is formed by the standing voltage modulated of 5V.
7, the real time clock circuit that can remove the CMOS setting fast according to claim 1, it is characterized in that: described button S1 is positioned at the computer cabinet outside surface.
8, the real time clock circuit that can remove the CMOS setting fast according to claim 1, it is characterized in that: the end of described button S1 is by resistance R 4 ground connection.
9, the real time clock circuit that can remove the CMOS setting fast according to claim 8 is characterized in that: the resistance value ratio of described resistance R 2 and resistance R 4 is greater than 8.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420077943 CN2735426Y (en) | 2004-07-15 | 2004-07-15 | Real-time clock feed circuit capable of clearing CMOS settings |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200420077943 CN2735426Y (en) | 2004-07-15 | 2004-07-15 | Real-time clock feed circuit capable of clearing CMOS settings |
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| CN101576764B (en) * | 2008-10-10 | 2011-06-22 | 鸿富锦精密工业（深圳）有限公司 | CMOS data clear circuit |
| CN102194432A (en) * | 2010-03-10 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Display provided with complementary metal oxide semiconductor (CMOS) data removing circuit and mainboard for supporting display |
| CN102262431A (en) * | 2010-05-31 | 2011-11-30 | 鸿富锦精密工业（深圳）有限公司 | Computer system |
| US8230206B2 (en) | 2008-09-26 | 2012-07-24 | Asustek Computer Inc. | Bios parameter erasing method and apparatus applied to computer system |
| CN103064486A (en) * | 2011-10-18 | 2013-04-24 | 纬创资通股份有限公司 | Computer device and method for resetting real-time clock signal thereof |
| CN103365387A (en) * | 2012-03-30 | 2013-10-23 | 纬创资通股份有限公司 | Clearing circuit of memory |
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| CN107516938A (en) * | 2017-09-28 | 2017-12-26 | 迈普通信技术股份有限公司 | A kind of power supply circuit and electronic equipment |
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| CN110007972A (en) * | 2019-03-25 | 2019-07-12 | 联想(北京)有限公司 | A kind of information processing method and information processing unit |
| CN112114617A (en) * | 2020-09-09 | 2020-12-22 | 恒为科技（上海）股份有限公司 | Device and method for realizing Feiteng ARM CPU Clear CMOS |
| CN112817647A (en) * | 2021-02-25 | 2021-05-18 | 杭州迪普科技股份有限公司 | Method for emptying CMOS and computer equipment |
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- 2004-07-15 CN CN 200420077943 patent/CN2735426Y/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US8230206B2 (en) | 2008-09-26 | 2012-07-24 | Asustek Computer Inc. | Bios parameter erasing method and apparatus applied to computer system |
| CN101576764B (en) * | 2008-10-10 | 2011-06-22 | 鸿富锦精密工业（深圳）有限公司 | CMOS data clear circuit |
| CN102194432A (en) * | 2010-03-10 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Display provided with complementary metal oxide semiconductor (CMOS) data removing circuit and mainboard for supporting display |
| CN102262431A (en) * | 2010-05-31 | 2011-11-30 | 鸿富锦精密工业（深圳）有限公司 | Computer system |
| CN103064486B (en) * | 2011-10-18 | 2016-02-17 | 纬创资通股份有限公司 | Computer device and method for resetting real-time clock signal thereof |
| CN103064486A (en) * | 2011-10-18 | 2013-04-24 | 纬创资通股份有限公司 | Computer device and method for resetting real-time clock signal thereof |
| CN103365387A (en) * | 2012-03-30 | 2013-10-23 | 纬创资通股份有限公司 | Clearing circuit of memory |
| CN103902928A (en) * | 2014-03-24 | 2014-07-02 | 同方计算机有限公司 | Network physical isolation device |
| CN104503857A (en) * | 2014-12-30 | 2015-04-08 | 宁波江东波莫纳电子科技有限公司 | Computer startup management control system |
| CN106155249A (en) * | 2015-03-31 | 2016-11-23 | 鸿富锦精密工业（深圳）有限公司 | Data dump system |
| CN107516938A (en) * | 2017-09-28 | 2017-12-26 | 迈普通信技术股份有限公司 | A kind of power supply circuit and electronic equipment |
| CN109857234A (en) * | 2018-12-28 | 2019-06-07 | 曙光信息产业(北京)有限公司 | The online resetting apparatus of the real-time clock of blade server |
| CN109857234B (en) * | 2018-12-28 | 2021-10-19 | 曙光信息产业(北京)有限公司 | Online resetting device of real-time clock of blade server |
| CN110007972A (en) * | 2019-03-25 | 2019-07-12 | 联想(北京)有限公司 | A kind of information processing method and information processing unit |
| CN112114617A (en) * | 2020-09-09 | 2020-12-22 | 恒为科技（上海）股份有限公司 | Device and method for realizing Feiteng ARM CPU Clear CMOS |
| CN112114617B (en) * | 2020-09-09 | 2022-05-20 | 恒为科技（上海）股份有限公司 | Device and method for realizing Feiteng ARM CPU Clear CMOS |
| CN112817647A (en) * | 2021-02-25 | 2021-05-18 | 杭州迪普科技股份有限公司 | Method for emptying CMOS and computer equipment |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20051019 Termination date: 20120715 |