CN202025278U

CN202025278U - CMOS (complementary metal oxide semiconductor) clear circuit of mainboard

Info

Publication number: CN202025278U
Application number: CN2011200939825U
Authority: CN
Inventors: 陈志列; 许和军; 刘君玲
Original assignee: EVOC Intelligent Technology Co Ltd
Current assignee: EVOC Intelligent Technology Co Ltd
Priority date: 2011-04-01
Filing date: 2011-04-01
Publication date: 2011-11-02
Anticipated expiration: 2021-04-01

Abstract

The utility model discloses a CMOS (complementary metal oxide semiconductor) clear circuit of a mainboard. The CMOS clear circuit comprises an initial clear signal generation circuit, an OR gate module, a reversed-phase module and a switching tube. The two input ends of the OR gate module are respectively connected with a start-up signal source and a restart signal source; the output end of the OR gate module is connected with the input end of the reversed-phase module; the output end of the reversed-phase module is connected with the control end of the switching tube; one end of the other two ends of the switching tube is grounded and the other end is connected with the output end of the initial clear signal generation circuit and connected with the CMOS circuit; the OR gate module and the reversed-phase module adopt the standby voltage as the working power. The CMOS clear circuit of the mainboard utilizes the start-up signal and the restart signal of the mainboard body and is convenient to operate. On the other hand, the two keys are pressed at the same time to clear the CMOS, so as to avoid incorrect operation. In addition, the circuit structure has simple structure, so as to save the material cost.

Description

Mainboard CMOS removes circuit

[technical field]

The utility model relates to the motherboard circuit field, especially relates to a kind of mainboard CMOS and removes circuit.

[background technology]

When the electronic equipment of industrial control computer or other use mainboards goes wrong, can solve fault by removing mainboard CMOS sometimes.CMOS itself is meant a kind of complementary metal oxide semiconductor (CMOS), can be used as the read-write storage chip on the computer motherboard, is used for preserving the configuration of current system and the user setting to some parameter.

Traditional CMOS removes circuit and is positioned on the mainboard, it can keep the clock circuit of the RTCRST# signal of a noble potential to CMOS, when needs are removed CMOS, the external structure of utilizing contact pin type is connected different stitch with the jumping cap or thereby external button makes the RTCRST# signal ground of this noble potential become electronegative potential, the clock circuit of CMOS is resetted, then the configuration information among the CMOS returns to default conditions, reaches the purpose of removing CMOS.In addition, also have and CMOS is removed circuit receive the separate button of cabinet panel, be used to control the removing of CMOS by line.

For the structure of contact pin type, complete machine need be taken apart usually, will jump cap and take off wire jumper is set, operate comparatively complicated loaded down with trivial details.Mode for the external button of existing independence then is easy to produce maloperation, usually makes the CMOS that sets be eliminated, and makes troubles, and this mode takies unnecessary positions of panels and increases the research and development Material Cost simultaneously.

[utility model content]

Based on this, be necessary to provide a kind of simple to operate and can avoid the mainboard CMOS of maloperation to remove circuit.

A kind of mainboard CMOS removes circuit, comprise initial clear signal generation circuit, or door module, anti-phase module and switching tube, two input ends described or the door module connect starting-up signal source and Restart Signal source respectively, output terminal described or the door module connects the input end of described anti-phase module, the output terminal of described anti-phase module connects control end of switching tube, a wherein end ground connection at the other two ends of described switching tube, the other end is connected with the output terminal of initial clear signal generation circuit and is connected to cmos circuit, and described or module and anti-phase module provide working power by standby voltage.

Preferably, also connect delay circuit between the output terminal of described anti-phase module and the control end of switching tube.

Preferably, described delay circuit comprises time delay resistance and delay capacitor, and described time delay resistance is connected between the output terminal and control end of switching tube of described anti-phase module, and described delay capacitor is connected between control end of switching tube and the ground.

Preferably, also comprise buffer capacitor between two output terminals that are connected described switching tube.

Above-mentioned mainboard CMOS removes circuit, has utilized the starting-up signal and the Restart Signal of mainboard itself, and is simple to operate; Could remove CMOS because must assurance press two keys simultaneously on the other hand, so can prevent maloperation.In addition, this circuit does not need extra signal source generating circuit, so circuit is fairly simple, has saved Material Cost.

[description of drawings]

Fig. 1 is that the mainboard CMOS of an embodiment removes circuit theory diagrams;

Fig. 2 is the circuit theory diagrams that produce starting-up signal and Restart Signal in general a kind of industrial computer mainboard.

[embodiment]

As shown in Figure 1, be the mainboard CMOS removing circuit theory diagrams of an embodiment.This removing circuit comprises initial clear signal generation circuit 100 or door module 200, anti-phase module 300 and switching tube 400.

Initial clear signal generation circuit 100 is used to keep the RTCRST# signal of a noble potential.

Or two input ends of door module 200 connect starting-up signal source and Restart Signal source respectively.Starting-up signal when the starting-up signal source provides mainboard to start, the Restart Signal source provides the Restart Signal in the mainboard operational process.On the main frame of electronic equipment, all be provided with start button and reboot button usually.When the start button is pressed, provide starting-up signal to boot-strap circuit; When reboot button is pressed, provide Restart Signal to reset circuit.As shown in Figure 2, be the circuit theory diagrams that starting-up signal in a kind of industrial control computer mainboard and Restart Signal produce.When starting-up signal PWRBTN# does not press at the start button, export the noble potential that provides by standby voltage VCC5SB to boot-strap circuit.The start button is located at electronic device exterior and is connected to 1 pin and 2 pin of FP by lead, when the start button is pressed, connects between 1 pin and 2 pin, because 2 pin ground connection, starting-up signal PWRBTN# forms electronegative potential, and this electronegative potential can trigger boot-strap circuit work.Restart Signal SYSRST# exports the noble potential that is provided by standby voltage VCC 3_3SB to reset circuit when reboot button is not pressed.Reboot button is located at electronic device exterior and is connected to 3 pin and 4 pin of FP by lead, when reboot button is pressed, connects between 3 pin and 4 pin, because 3 pin ground connection, SYSRST# forms electronegative potential, and this electronegative potential can trigger reset circuit work.

Or the output terminal of door module 200 connects the input end of anti-phase module 300.Anti-phase module 300 is used for the current potential of input is carried out oppositely, is about to noble potential and becomes electronegative potential, or electronegative potential is become noble potential.

The output terminal of anti-phase module 300 connects the control end 402 of switching tube 400, and a wherein end 404 ground connection at the other two ends 404,406 of switching tube 400, the other end 406 are connected with the initial output terminal of clear signal generation circuit 100 and are connected to cmos circuit 500.Or door module 200 and anti-phase module 300 provide working power by standby voltage VCC 3_3SB.

Further, also connect delay circuit between the control end 402 of the output terminal of anti-phase module 300 and switching tube 400.Delay circuit is preferably and comprises that time delay resistance R3 and delay capacitor C3, time delay resistance R3 are connected between the control end 402 of the output terminal of anti-phase module 300 and switching tube 400, and delay capacitor C3 is connected between the control end 402 and ground of switching tube 400.The interference that may by mistake remove CMOS that delay circuit produces when being used to eliminate plug AC power or Switching Power Supply supply.

Further, the removing circuit of present embodiment also comprises the buffer capacitor C4 between two output terminals 404,406 that are connected switching tube 400.Standby voltage VCC3_3SB became and causes in the low level process that the level that RTCRST# produces descends, and causes mistake to remove the problem of CMOS when buffer capacitor C4 can eliminate owing to the disconnection AC power.

The principle of work of circuit below is described:

There are three kinds of states in mainboard: do not have power supply (G3) fully, have and power but start shooting (S5) and open state (S0).

Do not having fully under the power supply state, the power module of mainboard (normally ATX power supply) access failure externally fed, so power module can't work, each operational module of mainboard because the voltage that does not have power module to provide therefore do not work.This state is called the G3 state.

Power supply is being arranged but not under the open state, the power module of mainboard connects externally fed, the different voltages of the exportable multichannel of power module this moment are for each operational module work of mainboard.Power module also provides standby voltage, comprises 5V standby voltage and 3.3V standby voltage, is expressed as VCC 5SB and VCC 3_3SB respectively.When mainboard was not started shooting, standby voltage was in noble potential, other each road voltages can not be exported, so each operational module of mainboard still can not be worked.This state is called the S5 state.

Under open state, each road voltage of power module is exported to each operational module of mainboard, and each operational module of mainboard is started working.This state is called the S0 state.

As from the foregoing, the mainboard CMOS of present embodiment removes circuit because need starting-up signal PWRBTN# and Restart Signal SYSRST#, so must be in S0 or S5 state.

When mainboard is in the S5 state, restart key if press separately, mainboard does not have any action, if press the start key separately, then mainboard can be started shooting.No matter be to press separately to restart key or press the start key separately, the mainboard CMOS of present embodiment remove circuit from or the output terminal of door module 200 all export noble potential, after anti-phase module 300 is anti-phase is electronegative potential, therefore switching tube 400 is in off state, and the reset clock signal RTCRST# of initial clear signal generation circuit 100 outputs is in noble potential.Cmos circuit 500 works on.

When pressing the start key and restarting key simultaneously, starting-up signal PWRBTN# and Restart Signal SYSRST# are in electronegative potential, or door module 200 output low level signals, obtain high level signal through after the anti-phase module 300, high level signal makes switching tube 400 conductings, the output head grounding of initial clear signal generation circuit 100, and reset clock signal RTCRST# is in electronegative potential, this moment, cmos circuit 500 resetted, thereby the information of preserving in the CMOS is eliminated.

When mainboard was in the S0 state, it was the same to remove principle.In general, do not advise when mainboard is in open state, removing CMOS.And when the S5 state is removed CMOS, for guaranteeing not enter open state, should take to press earlier and restart key, press the mode of start key then and carry out.

The above embodiment has only expressed several embodiment of the present utility model, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model claim.Should be pointed out that for the person of ordinary skill of the art under the prerequisite that does not break away from the utility model design, can also make some distortion and improvement, these all belong to protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be as the criterion with claims.

Claims

1. a mainboard CMOS removes circuit, comprise initial clear signal generation circuit, it is characterized in that, also comprise or the door module, anti-phase module and switching tube, two input ends described or the door module connect starting-up signal source and Restart Signal source respectively, output terminal described or the door module connects the input end of described anti-phase module, the output terminal of described anti-phase module connects control end of switching tube, a wherein end ground connection at the other two ends of described switching tube, the other end is connected with the output terminal of initial clear signal generation circuit and is connected to cmos circuit, and described or module and anti-phase module provide working power by standby voltage.

2. mainboard CMOS as claimed in claim 1 removes circuit, it is characterized in that, also connects delay circuit between the output terminal of described anti-phase module and the control end of switching tube.

3. mainboard CMOS as claimed in claim 2 removes circuit, it is characterized in that, described delay circuit comprises time delay resistance and delay capacitor, described time delay resistance is connected between the output terminal and control end of switching tube of described anti-phase module, and described delay capacitor is connected between control end of switching tube and the ground.

4. mainboard CMOS as claimed in claim 1 removes circuit, it is characterized in that, also comprises the buffer capacitor between two output terminals that are connected described switching tube.