CN2682570Y

CN2682570Y - Impulse gating control module of solid relay

Info

Publication number: CN2682570Y
Application number: CN 200420007445
Authority: CN
Inventors: 赵笃良; 董向一; 曾波; 林琳
Original assignee: KETONG ELECTRONIC RELAY GENERAL PLANT BEIJING
Current assignee: KETONG ELECTRONIC RELAY GENERAL PLANT BEIJING
Priority date: 2004-03-22
Filing date: 2004-03-22
Publication date: 2005-03-02
Anticipated expiration: 2014-03-22

Abstract

The utility model relates to an impulse gating control module of a solid relay, comprising a control signal input end for inputting the impulse train in the certain range of the frequency, a shaping circuit for processing an input signal, a circuit switching the frequency and the voltage of a square wave signal which is shaped, a range identification circuit for recognizing the impulse signal exceeding the range of the frequency and generating an opening signal or a closing signal, an opening and closing control signal drive circuit, an isolation circuit and an opening and closing control output end. The opening and closing control output end is connected with a direct current load or an alternating current load. The utility model can effectively avoid the uncontrolled phenomenon of an executing part when a computer or an SCM is invalidated, and the operating states of the executing part is automatically switched to the safe states. The module is solidified with a relay into an integrated structure to form the solid relay without the drive circuit and the solid relay is directly driven by the computer or the SCM.

Description

The pulse gate control module of solid state relay

Technical field

The utility model relates to the pulse gate control module that a kind of single-chip microcomputer or computer are directly controlled solid state relay.

Background technology

The control mode of existing relay mostly adopts the fixed voltage type of drive, after the control end of relay applies required control voltage, the relay adhesive, remove control voltage after, relay discharges.For magnetic latching relay, its course of action is: add operation voltage (or electric current) pulse at common port and adhesive end, the relay adhesive also keeps this state, adds operation voltage (or electric current) pulse at common port and release end, and relay discharges the worker and keeps this state.

When with computer or Single-chip Controlling relay, by computer or single-chip microcomputer output control level, through the drive circuit control relay, by the operation of relay control execution unit.Its typical control circuit structure as shown in Figure 1.

When computer or monolithic function normal row, this circuit energy operate as normal, but when computer or single one-sidedness machine can not normally move, because the output level of computer or single-chip microcomputer can't change, the out of control and continuous firing of execution unit was in original operating state.There is main following defective in this mode:

1. this mode is actually by program (software) and controls, when the hardware fault and the program " race flies " of computer or single-chip microcomputer or enter " endless loop " can not correctly return the time, computer or single-chip microcomputer can cause output to remain on " height " or " low " state, can not effectively control execution unit, if execution unit is in running status at this moment, then might cause accident;

2. need add drive circuit between computer or single-chip microcomputer and the relay.

Summary of the invention

The pulse gate control module of solid state relay described in the utility model, in the time of can solving the inefficacy of computer or single-chip microcomputer, the problem out of control of issuable execution unit.

The pulse gate control module of solid state relay described in the utility model, it comprises that the signal input end of the impulse train of an input certain frequency scope, shaping circuit of handling input signal, one carry out frequency/voltage translation circuit, one to the square-wave signal after the shaping amplitude discrimination circuit that opens or closes control signal, switch controlling signal drive circuit, buffer circuit and switch control output end are discerned and produced to the pulse signal that exceeds frequency range; Described switch control output end is connected with DC load or AC load.

The pulse gate control module of aforesaid solid state relay, input signal shaping circuit wherein adopt filtering and digital trigger or simulation monostable circuit.

The pulse gate control module of aforesaid solid state relay, frequency/voltage translation circuit wherein adopt resistance, have source differential and integrating circuit or V/F converter ic.

The pulse gate control module of aforesaid solid state relay, amplitude discrimination circuit wherein comprise two comparator circuits and a logical circuit; Described drive circuit is selected opener electrode output circuit or emitter-follower output circuit according to different logical circuits.

The pulse gate control module of aforesaid solid state relay, wherein buffer circuit adopts photoelectricity to isolate or the transformer isolation mode.

The pulse gate control module of aforesaid solid state relay, this control module is co-located in the housing with direct current that is connected with its output or ac solid relay load, forms the relay that computer or microprocessor directly drive.

The utility model is compared with traditional relay, has following advantage and good effect:

1. in the time of can effectively avoiding computer or single-chip microcomputer to lose efficacy, issuable execution unit out-of-control phenomenon, the operating state with execution unit switches to safe condition automatically:

2. this module and relay are cured as integrative-structure, the solid state relay that formation need not drive circuit directly drives work by computer or single-chip microcomputer.

Description of drawings

Fig. 1 is traditional automatic control relay circuit structure block diagram;

Fig. 2 is a module built-up circuit structured flowchart of the present utility model;

Fig. 3 is that a physical circuit principle of amplitude discrimination circuit of the present utility model is implemented illustration;

Fig. 4 is that another physical circuit principle of amplitude discrimination circuit of the present utility model is implemented illustration;

Fig. 5 is that another physical circuit principle of amplitude discrimination circuit of the present utility model is implemented illustration;

Fig. 6 is that the 4th physical circuit principle of amplitude discrimination circuit of the present utility model implemented illustration;

Fig. 7 is an input/output frequency control characteristic schematic diagram of the present utility model.

Embodiment

The composition and the operation principle of each element circuit of the present utility model are as follows: centre frequency of this module and conducting bandwidth can be done suitably to adjust on the basis of Fig. 7 according to customer requirements.Circuit unit among Fig. 2 comprises input signal shaping, frequency/voltage conversion, amplitude discrimination circuit, drive circuit, buffer circuit and switch output.

Input signal shaping: because the frequency and the amplitude difference of input signal are bigger, the allowed band that might exceed the frequency/voltage translation circuit, simultaneously might have some burrs, make the frequency/voltage translation circuit produce wrong output, must be input signal shaping in addition, amplitude, carrot-free square wave such as become.The input signal shaping circuit can adopt filtering and digital trigger or simulation monostable circuit to realize.

Frequency/voltage translation circuit: the square-wave signal of input shaper circuit output is become galvanic current pressure through active differential of R, C and integrating circuit.The frequency/voltage translation circuit also can adopt existing V/F converter ic.

Amplitude discrimination circuit: comprise two comparator circuits and a logic NAND circuit, the output of frequency/voltage translation circuit relatively through comparator, when the output of frequency/voltage translation circuit is higher than reference voltage or is lower than reference voltage, comparator output high level; When the output of frequency/voltage translation circuit was lower than high reference voltage or be higher than low reference voltage, the comparator output low level became switching signal output behind the logic NAND.

Amplitude discrimination circuit, also can pass through two comparator circuits and a logical, or two comparator circuits and a logical "or" circuit, or two comparator circuits and a logic NOR circuit, two comparator circuits are realized with " trigger " circuit, but in order to guarantee the logic state of switch output unit, follow-up drive circuit need change.

Amplitude discrimination circuit can also can be used circuit as shown in Figure 4 with circuit realization as shown in Figure 3, circuit, one of circuit realization as shown in Figure 6 as shown in Figure 5.In amplitude discrimination circuit, comparator circuit plays the effect of low frequency gating, high frequency gating and Static Detection.

Drive circuit: drive circuit adopts OC output circuit (corresponding diagram 3, Fig. 6 circuit) or emitter-follower output circuit (corresponding diagram 4 circuit, Fig. 5 circuit).

Buffer circuit: buffer circuit can adopt photoelectricity to isolate or the transformer isolation mode.

Switch output:, can adopt transistor, field effect transistor or the JGBT way of output corresponding to DC load; Corresponding to exchanging output, can adopt the controllable silicon way of output.

Send the action of the impulse train control execution unit of particular frequency range by computer or single-chip microcomputer.When the frequency of input pulse and amplitude satisfy action request of the present utility model, the execution unit action, when the action request of the frequency of input pulse and the discontented unabridged version utility model of amplitude, execution unit recovers.When the control impuls of sending at computer or single-chip microcomputer satisfies action request of the present utility model (illustrating that computer or single-chip microcomputer are in normal operating conditions), the utility model can move according to the instruction of computer, during the action request of the discontented unabridged version utility model of sending when computer or single-chip microcomputer of control impuls (illustrating that computer or single-chip microcomputer are in abnormal operating state), the utility model can be automatically switches to " safe condition " with the operating state of execution unit.

Specifically, when input is imported the impulse train of satisfactory frequency range, relay is in on-state (for open type) or off state (for closed type), when the input of not satisfying relay when the frequency of input pulse required, relay was in off state (to open type) or on-state (for closed type).

The utility model can be independent control module (not containing relay) product, also can be to solidify pulse gate solid state relay product in one with relay.

Claims

1. the pulse gate control module of a solid state relay is characterized in that: it comprises that the signal input end of the impulse train of an input certain frequency scope, shaping circuit of handling input signal, one carry out frequency/voltage translation circuit, one to the square-wave signal after the shaping amplitude discrimination circuit that opens or closes control signal, switch controlling signal drive circuit, buffer circuit and switch control output end are discerned and produced to the pulse signal that exceeds frequency range; Described switch control output end is connected with DC load or AC load.

2. the pulse gate control module of solid state relay as claimed in claim 1 is characterized in that: input signal shaping circuit employing filtering wherein and digital trigger or simulation monostable circuit.

3. the pulse gate control module of solid state relay as claimed in claim 1 is characterized in that: frequency/voltage translation circuit wherein adopts resistance, has source differential and integrating circuit or V/F converter ic.

4. the pulse gate control module of solid state relay as claimed in claim 1, it is characterized in that: amplitude discrimination circuit wherein comprises two comparator circuits and a logical circuit; Described drive circuit is selected opener electrode output circuit or emitter-follower output circuit according to different logical circuits.

5. the pulse gate control module of solid state relay as claimed in claim 1 is characterized in that: wherein buffer circuit adopts photoelectricity to isolate or the transformer isolation mode.

6. the pulse gate control module of solid state relay as claimed in claim 1, it is characterized in that: this control module is co-located in the housing with direct current that is connected with its output or ac solid relay load, forms the relay that computer or microprocessor directly drive.