CN2676532Y - Compatible receiver for high-definition digital television - Google Patents
Compatible receiver for high-definition digital television Download PDFInfo
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- CN2676532Y CN2676532Y CNU2004200382953U CN200420038295U CN2676532Y CN 2676532 Y CN2676532 Y CN 2676532Y CN U2004200382953 U CNU2004200382953 U CN U2004200382953U CN 200420038295 U CN200420038295 U CN 200420038295U CN 2676532 Y CN2676532 Y CN 2676532Y
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Abstract
A compatible receiver for high-definition digital television belongs to the television technique. Its movement comprises a digital video signal processing circuit, a CPU, periphery of the CPU, a viewing playing circuit, line-field scan, an AV interface and power supply, etc. The digital video signal processing circuit comprises digit progressive processing chips which input common simulation video signal, digit YUV signal and 24-bit digit YUV and RGB signal, D/A converting and coding cut-over chips and previewing playing chips. PIP signal is converted to the digit YUV signal by PIP decoding chips A/D. The type of the digit progressive processing chip is DPTV-3D, and the type of the D/A converting and coding cut-over chip is P15V 330, and the type of the previewing playing chip is TA1316, and the type of the PIP chip is VPX3226. The utility model can display all of the present high-definition formats of program signal and can be compatible with common program signal. The utility model is also provided with the display functions of VGA, SVGA and XGA and is an information and multi-media terminal which is suitable for families.
Description
Technical field
The utility model belongs to technical field of television sets, more particularly relates to the improvement of high definition digital television compatible receiver.
Background technology
Along with starting broadcasting of domestic part city high definition digital television, the market of high definition TV also is activated gradually.Domesticly will carry out the digitlization of television set in 2015 comprehensively.This high definition digital television machine that just requires to produce in the recent period must can receive general analogue signal.That is to say that to the transition period that Digital Television is popularized comprehensively, in the stage of also not realizing digital radio fully, television set must be both can receive present general analogue signal, can support the compatible of high definition display format again from now.Must cater to the demand in market at present, release a high-end high definition digital television compatible receiver.
Summary of the invention
The purpose of this utility model is exactly: design and a kind ofly can show present all high-definition format programme signals---comprise 1080I (50/60HZ), 720P (50/60HZ), 480P forms such as (4: 3/16: 9), simultaneously can compatiblely show the general programs signal, and to the general programs signal carry out digital processing convert to 60HZ line by line, the high-end Digital Television compatible receiver of 100 interlacing or the accurate video picture scanning of 1250 lines.This machine should possess VGA, SVGA, XGA Presentation Function simultaneously, can be used as computer and shows, is a kind of information and multimedia terminal that family uses that be very suitable for.
In order to achieve the above object, the utility model is made up of casing and the movement circuit that is installed in the casing.Movement circuit comprises digital video signal processing circuit, with the CPU of digital video signal processing circuit interconnection and peripheral circuit thereof, video amplifier circuit, line-field sweep circuit, AV interface circuit and to the power circuit of above-mentioned circuit supply.The numeral that digital video signal processing circuit comprises input common simulation vision signal, digital YUV signal and 24 s' digital YUV and rgb signal line by line process chip, the D/A conversion that is connected of process chip and coding switch chip and change the previewing that is connected with the commutation circuit of encoding with D/A and put chip line by line with numeral.The output that previewing is put chip is put chip and is connected with looking, and the common simulation vision signal is from tuner and AV signal-processing board, and digital YUV signal is that the PIP signal is got through picture-in-picture decoding chip A/D conversion.
Numeral process chip line by line can be the DPTV-3D type, and it is the P15V330 type that D/A conversion and coding switch chip, and it is the TA1316 type that previewing is put chip, and cpu chip is the M37281EKSP type, and pip controller is the VPX3226 type.Video amplifier circuit adopts 3 integrated wideband videos to amplify chip TDA6120Q.Line-field sweep circuit adopts the automatic tracking Control chip of multifrequency KB2511.
Signal processing is one of core technology of this machine, many numerals line by line in the process chip the utility model selected the DPTV-3D chip of TRIDENT company.This chip except the translation function line by line that has general this type of chip and comprise, also have PIP (picture-in-picture), VBI functions such as CCD, DIGITAL 3DCOMB FILTER (digital three-dimensional comb filter), MULITI-PICTURE PANOROMAAND CINEMA SCREEN DISPLAY NONLINEAR ZOOM.It is more thorough that particularly its digital three-dimensional dressing filter makes the light tone separation, can significantly improve image quality.The DPTV-3D chip can be handled 24 digital YUV and rgb signal, can carry out the normalization line frequency to high definition, SD and the VGA signal of different-format and handle when guaranteeing signal bandwidth.
The previewing of this machine is put the TA1316 that chip adopts Toshiba.This partial circuit adopts the chip TA1316AN of Toshiba, and this chip has the input of two-way YPBPR signal, 1 road RGB input, 1 road OSD input, and inside also has a row oscillating circuit.Its output then has RGB and the output of SVM signal.Output pin is 41,42,43,54 pin, puts plate by penetrating to output to look with circuit respectively.
TA1316AN has following functional characteristics: dynamically Y proofreaies and correct; Brightness, chroma edge improve; The brightness group delay is proofreaied and correct; Chrominance detail strengthens; Controls such as velocity modulation output and brightness, contrast, colourity, tone.
The built-in matrix operation circuit can with 525P, 625P, 750P, 1125I the YUV signal of P, PAL100HZ and NTSC120HZ be treated to rgb signal.Because its high bandwidth and abundant brightness, colourity processing capacity, the previewing that makes it be suitable as very much high definition TV is put process chip.
The DPTV3D that decoding deck of the present utility model adopts TRIDENT company is process chip line by line, and the interlacing that has realized vision signal becomes that line by line processing, picture-in-picture handled, the format conversion of high-definition signal.The picture-in-picture decoding chip adopts VPX3226, and the input of high-definition signal adopts AD9883 to carry out the A/D conversion, is input to DPTV3D then and handles.This machine adopts the mode of multifrequency normalizing, and the signal unification of various inputs is become the form output of 1920*1080I, and line frequency is 33.75KHz, field frequency are 60Hz, in addition to the pal mode signal of TV, also realized the output of the form of 100Hz, 1250I, but line frequency are 33.75KHz.To the high-definition signal of the form of 1920*1080I, be to improve picture quality, adopted straight-through mode, idiographic flow is as follows:
The DPTV chip will be handled from the common simulation vision signal of tuner, AV signal-processing board (comprising VIDEO, S-VIDEO, YCRCB), carry out separated in synchronization and digital quantization, convert the digital Y/U/V signal of 4: 2: 2 forms to, carry out the interlacing change again and promote processing with field frequency line by line, at last by D/A conversion and coding commutation circuit, this signal D/A is become the YPRPB signal of simulation, enter TA1316 and carry out matrix operation, being converted to the analog rgb signal exports to look and puts plate, after video amplifies, drive picture tube three rifles.
For the PIP signal, be converted to by VPX3226 chip AD and enter the DPTV-3D chip after 4: 2: 2 the digital YUV signal and carry out the processing of picture-in-picture, picture out picture, two pictures with key frame.
For simulation YPRPB (non-1080I/60HZ) signal or rgb signal from high definition, carry out digital quantization through entering AD9883 after the PI5V330 switching, be transformed into 24 digital YUV (RGB) signal and enter the DPTV chip and carry out the line frequency conversion process, convert simulation YPRPR (1920*1080I/50/60HZ) signal then to and enter TA1316 and carry out matrix operation and be reduced to analog rgb and drive back level video amplifier circuit.If the high-definition signal of 1920*10801 (60HZ) form then directly enters TA1316 and carries out matrix operation, be reduced to the analog rgb signal, drive picture tube.
The design of normalized line frequency can be simplified the design of line-field sweep circuit greatly and reduce cost when guaranteeing image quality, and frequent line frequency switches when having avoided receiving unlike signal, improves the reliability of complete machine.
Look and put the plate circuit and mainly form by two parts, the one, the video amplifier circuit part; The 2nd, the both scan velocity modulation part.
The amount of information of high-definition programming is very big, accomplish to reduce substantially programme signal, video amplifier circuit must be accomplished high bandwidth, high dynamic range, under the situation of 100VP-P, at least should guarantee that looking of 30M put bandwidth, the at present common integrated video amplifier circuit and the performance of discrete device circuit can not reach requirement.The video amplifier circuit of this type machine adopts the integrated wideband video amplifying circuit TDA6120Q of three PHILIPS Co.s, and it can reach looking of 30M and put bandwidth under the situation of 100VP-P; Under the situation of 80VP-P, can reach looking of 40M and put bandwidth, can satisfy the requirement of high resolution displayed signal fully.
Capable field circuit of the present utility model has mainly been taked two technology: (A) frequently automatic tracking technique, (B) designing technique of high-power row, field circuit of multirow.Its acp chip adopts the advanced automatic tracking Control integrated circuit of multifrequency KB2511, and this chip is I
2The waveform of the total line traffic control of C generates and control chip, the polarity automatic switching circuit of built-in synchronizing signal, a row vibration phase-locked loop output circuit etc.This chip has advantages such as peripheral component is few, multiple functional, and control is convenient.
The frequency range of multirow field frequency is line frequency 30KHz--40KHz, and field frequency is 50Hz--90Hz, and this row field frequencies range synchronizing signal is input to KB2511, produces row energization pulse and field scan sawtooth voltage, respectively de-energisation line scanning high-tension circuit and field-scanning circuit.This chip also produces pillow school parabolic voltage and dynamic focusing row field parabolic is broadcast voltage, realizes pincushion correction and dynamic focusing after amplifying.
Line scanning and circuit for producing high voltage adopt duplicate rows pipe circuit, and line scanning and horizontal high voltage are produced circuit separately, produce stable line scanning amplitude and stable picture tube anode high voltage frequently down to realize multirow.Two parts circuit adopts the booster circuit power supply respectively.Line-scan circuit is from the sampling of line flyback pulse commutating voltage, and the control booster circuit forms closed loop; Horizontal high voltage produces circuit and takes a sample from horizontal high voltage, and the control booster circuit also forms closed loop.Both have finished high pressure and line scanning electric current required when picture tube is worked.
AV interface circuit of the present utility model has mainly been realized following function:
The input of videos such as video 1, video 2, video 3, S terminal, YCBCR, YPBPR and audio frequency; The output of 1 road video/audio is provided; Realize the handoff functionality of each road audio frequency and video; By the audio frequency and video input terminal of standard, each road audio frequency and video is input to whole set of television.The switching of each road video realizes by TA1218AN.
The TA1218AN major functions and features is: the input of 5 tunnel video channels, the output of 2 road videos; The input of 5 road audio frequency, the output of 3 road audio frequency; Vision signal is carried out separated in synchronization; Has the I/O controlled function.
CPU adopts the M37281EKSP of Mitsubishi, is 52 pin DIP encapsulation.
The switching power circuit of this machine is by the input of 220V alternating voltage, produces main power source output and accessory power supply output totally 9 tunnel outputs.Required most of voltage when main power source provides the machine operate as normal, accessory power supply provide the supply power voltage of MPU under MPU operating voltage under the normal operating conditions and the holding state.
Task of the present utility model comes to this and finishes.
The utility model is handled various vision signal fully digitalizations by adopting the Digital Video Processing technology, support under the normal signal 60HZ line by line, 100HZ interlacing and the accurate developing triple scanning of 1250 lines, improved definition greatly, the Chinese defective of having eliminated the common simulation TV simultaneously as: flicker, interline flicker between, crosstalk, creep, the character shake, can't be fine and smooth represent literal etc.As high definition TV, this machine can be supported the high-definition signal of 1920*1080I (50/60HZ), 1280*720P, 480p form.As computer monitor, only support under the situation of VGA (640*480/60HZ) at the similar model of existing market, this machine not only can be supported more high-resolution SVGA (800*600) signal, more can support XGA (1024*768), reach the display effect of present main flow display, widened the range of application of this machine under network, multimedia environment greatly.It can be widely used in the places such as family.
Description of drawings
Fig. 1 is a cassette mechanism structure block diagram of the present utility model.
Fig. 2 is the block diagram of digital video signal processing circuit.
Fig. 3 is the schematic diagram of digital video signal processing circuit.
Fig. 4 is the pin definitions of M37281EKSP type CPU.
Embodiment
Embodiment 1.A kind of high definition digital television compatible receiver is as Fig. 1~shown in Figure 4.It is made up of casing and the movement circuit that is installed in the casing.Movement circuit comprises digital video signal processing circuit 1, with the CPU of digital video signal processing circuit 1 interconnection and peripheral circuit 2 thereof, video amplifier circuit 3, line-field sweep circuit 4, AV interface circuit 5 and to the power circuit 6 of above-mentioned circuit supply.Digital video signal processing circuit 1 comprises input common simulation vision signal, digital YUV signal and 24 digital YUV and the numeral of rgb signal, and process chip 7, the D/A conversion that is connected with digital process chip 7 line by line and coding switch chip 8, put chip 9 with the D/A conversion with the previewing that the commutation circuit 8 of encoding is connected line by line.The output that previewing is put chip 9 is put chip 10 and is connected with looking, and the common simulation vision signal is from tuner and AV signal-processing board, and digital YUV signal is that the PIP signal is got through picture-in-picture decoding chip 11A/D conversion.
Claims (4)
1. high definition digital television compatible receiver, it is made up of casing and the movement circuit that is installed in the casing, movement circuit comprises digital video signal processing circuit, CPU and peripheral circuit thereof with the digital video signal processing circuit interconnection, video amplifier circuit, line-field sweep circuit, AV interface circuit and to the power circuit of above-mentioned circuit supply, it is characterized in that said digital video signal processing circuit comprises input common simulation vision signal, numeral YUV signal and 24 s' the digital YUV and the numeral of rgb signal be process chip line by line, with numeral line by line the D/A conversion and the coding that are connected of process chip switch chip, put chip with the D/A conversion with the previewing that the coding commutation circuit is connected, the output that previewing is put chip is put chip and is connected with looking, the common simulation vision signal is from tuner and AV signal-processing board, and digital YUV signal is that the PIP signal is got through picture-in-picture decoding chip A/D conversion.
2. according to the described high definition digital television compatible receiver of claim 1, it is characterized in that said numeral line by line process chip be the DPTV-3D type, it is the P15V330 type that D/A conversion and coding switch chip, it is the TA1316 type that previewing is put chip, cpu chip is the M37281EKSP type, and pip controller is the VPX3226 type.
3. according to claim 1 or 2 described high definition digital television compatible receivers, it is characterized in that said video amplifier circuit adopts 3 integrated wideband videos to amplify chip TDA6120Q.
4. according to the described high definition digital television compatible receiver of claim 3, it is characterized in that said line-field sweep circuit adopts the automatic tracking Control chip of multifrequency KB2511.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CNU2004200382953U CN2676532Y (en) | 2004-02-10 | 2004-02-10 | Compatible receiver for high-definition digital television |
Applications Claiming Priority (1)
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CNU2004200382953U CN2676532Y (en) | 2004-02-10 | 2004-02-10 | Compatible receiver for high-definition digital television |
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CN2676532Y true CN2676532Y (en) | 2005-02-02 |
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CNU2004200382953U Expired - Fee Related CN2676532Y (en) | 2004-02-10 | 2004-02-10 | Compatible receiver for high-definition digital television |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100405816C (en) * | 2005-02-06 | 2008-07-23 | 厦门华侨电子股份有限公司 | Method for sharing high-clarity signal interface and AV video-frequency signal interface |
CN100448274C (en) * | 2005-09-29 | 2008-12-31 | 圆刚科技股份有限公司 | Image processing device with multiple display function |
CN103297823A (en) * | 2013-05-08 | 2013-09-11 | 无锡北斗星通信息科技有限公司 | Digital television receiver compatible with multiple data connecting interfaces |
-
2004
- 2004-02-10 CN CNU2004200382953U patent/CN2676532Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100405816C (en) * | 2005-02-06 | 2008-07-23 | 厦门华侨电子股份有限公司 | Method for sharing high-clarity signal interface and AV video-frequency signal interface |
CN100448274C (en) * | 2005-09-29 | 2008-12-31 | 圆刚科技股份有限公司 | Image processing device with multiple display function |
CN103297823A (en) * | 2013-05-08 | 2013-09-11 | 无锡北斗星通信息科技有限公司 | Digital television receiver compatible with multiple data connecting interfaces |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |