CN2662448Y - Circuit module with joint line - Google Patents
Circuit module with joint line Download PDFInfo
- Publication number
- CN2662448Y CN2662448Y CN 200320101520 CN200320101520U CN2662448Y CN 2662448 Y CN2662448 Y CN 2662448Y CN 200320101520 CN200320101520 CN 200320101520 CN 200320101520 U CN200320101520 U CN 200320101520U CN 2662448 Y CN2662448 Y CN 2662448Y
- Authority
- CN
- China
- Prior art keywords
- circuit board
- circuit
- joint line
- copper foil
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
The utility model discloses a circuit module with joint line, comprising a circuit board, a welding cushion, a radiating fin, a chip, a first package layer and a second package layer; wherein, the circuit board is provided with a copper foil line which is formed at least on the surface and the bottom surface via the image transferred, provided with a plurality of drillings and through holes, and provided with a plurality of passive elements, at least one hollow chamber formed at an appropriate position; the welding cushion is positioned at the bottom layer of the circuit board via penetrating an organic glue film, and electrically connected with the copper foil line via the through holes; the radiating fin is positioned on the same layer with the welding cushion, and corresponded with the lower space of the chamber formed on the circuit board; at least one chip is positioned inside the chamber of the circuit board, and electrically connected with the copper foil line on the surface of the circuit board; the first package layer is formed on the surface of the circuit board; the second package layer is formed on the bottom layer of the circuit board, and positioned between the welding cushion and the radiating fin. The utility model has the advantages of providing a requirement of high loading, being good for the power chip radiating and having development of multiple chips and high density circuit, and enabling to decrease the cost as well.
Description
Technical field
The utility model relates to a kind of circuit module with joint line, refers to the modularization package level element of a kind of built-in RLC, chip terminated line especially.
Background technology
Although IC industry is very flourishing, various numerals even analog circuit can both be made into IC via integrated process, but and do not mean that all circuit can follow this kind mode and reach, in fact, IC itself also is an electronic component, still must mate during its practice, just can provide the function that meets certain desired with other circuit.Flourish along with communication industry, must use a large amount of RLC circuits in the Wireless Telecom Equipment, no matter and be passive devices such as resistance, electric capacity, inductance, its integrated known technology that is, but as described in preceding taking off, individual elements integrated, on practice in the future, still must and install with the circuit coupling, so as will on practice, have more elasticity and efficient, and be necessary to integrate at relevant element, with effective minimizing assembling work in the future, and improve production quality and efficient.
The utility model content
Therefore, the utility model main purpose is providing a kind of circuit module with joint line, its element with multiple different process, characteristic (as chip, electric capacity and resistance) is integrated on it, to constitute a modularization package level element with RLC, chip terminated line.
Make the aforementioned circuit module include for reaching the major technique means that aforementioned purpose takes:
One circuit board is formed with copper foil circuit at least through image transfer on surface and bottom surface, and has boring and via, forms the groove chamber of at least one sky again on the appropriate location;
One soldering pad layer is positioned at the bottom of circuit board, and sees through via and be electrically connected with copper foil circuit on the circuit board;
One fin is positioned at on one deck with aforementioned soldering pad layer, and the corresponding below that forms the groove chamber on the circuit board that is positioned at;
At least one chip, the groove of being located at circuit board is indoor, and is electrically connected with the copper foil circuit formation of circuit board surface;
Resistance is located on the circuit board through processing and is connected with its surperficial copper foil circuit;
Surface adhesion components is located on the circuit board and with its surperficial copper foil circuit and is connected;
One first encapsulated layer is formed at the surface of circuit board;
One second encapsulated layer is formed at the bottom surface of circuit board, and between soldering pad layer and fin.
The processing of aforementioned soldering pad layer and fin, see through an organic glued membrane and circuit board pressing by a thick copper coin after, behind thick copper etching step, form.
Aforementioned chip is installed on the fin, sees through routing again and is connected with the circuit of circuit board surface.
Aforementioned resistance is a film resistor, the processing of this film resistor is to be attached on the surface and/or bottom surface of circuit board with one Copper Foil/impedance layer (OHMEGA PLY) earlier, through image transfer and copper etching step, can form copper foil circuit, through further removing the Copper Foil part on Copper Foil/impedance layer, stay impedance layer, can finish the making of film resistor.
Aforementioned resistance is a chip-resistance, sees through routing and is connected with copper foil circuit.
Be provided with another line layer between aforementioned circuit plate and soldering pad layer, the processing of this line layer constitutes after thick copper coin surface is carried out image transfer and electroplated ambrose alloy nickel gold thin film earlier.
Description of drawings
Fig. 1 is the section plan of the utility model one preferred embodiment.
Fig. 2 is the decomposing schematic representation of the utility model one preferred embodiment.
Fig. 3 is the substrate partial sectional view of the utility model one preferred embodiment.
Fig. 4 is the section plan of the another preferred embodiment of the utility model.
Fig. 5 is the decomposing schematic representation of the another preferred embodiment of the utility model.
Embodiment
A relevant preferred embodiment of the present utility model sees also shown in Figure 1, and it includes:
One circuit board 10 is formed with copper foil circuit 11,12 at least through image transfer on surface and bottom surface, and finishes the making of boring and via 13, forms the groove chamber 14 of at least one sky again on the appropriate location; Wherein, 11 of copper foil circuits are provided with passive devices such as resistance 15, electric capacity 16 and inductance be not shown in the figures, and in present embodiment, this resistance 15 is form of film, and its processing mode is detailed later, and this electric capacity 16, inductance are then installed in surface mount (SMT) mode; Be provided with a chip 17 again in the aforementioned grooves chamber 14, this chip 17 and constitute with the copper foil circuit 11 on circuit board 10 surfaces is electrically connected; In present embodiment, this chip 17 is connected with copper foil circuit 11 formations in routing (wire bonding) mode;
One soldering pad layer 20 is made up of a plurality of weld pads 21,22, and the contact that connects as the outside uses, and it sees through the bottom that an organic glued membrane 40 is located at circuit board 10, and sees through via 13 and be electrically connected with copper foil circuit 11,12 on the circuit board 10;
One fin 23 is positioned at on one deck with aforementioned soldering pad layer 20, and the corresponding below that is positioned at the groove chamber 14 that forms on the circuit board 10, and is provided with on it for chip 17;
One first encapsulated layer 31 is formed at the surface of circuit board 10, and the circuit that it is surperficial covers fully, and tamps in the groove chamber 14 of circuit board 10;
One second encapsulated layer 32 be formed at the bottom surface of circuit board 10, and filling is between each weld pad 21,22 and fin 23.
Can find out that by above-mentioned explanation the concrete structure of the utility model one preferred embodiment below will further specify its processing mode:
At first, see also shown in Figure 2ly, aforesaid circuit board 10 mainly is to see through an organic glued membrane 40 and thick copper coin 200 pressings; Wherein:
After circuit board 10 sees through organic glued membrane 40 and thick copper coin 200 pressings, promptly hole earlier and bore a hole plating, to be made into via (this is not shown in the figures), make the copper foil circuit 11 on the circuit board 10,12 see through via is electrically connected with thick copper coin 200, then be etched with and form weld pad 21 respectively via thick copper, 22 and fin 23, wherein weld pad 21,22 can constitute the outside contact that connects, and after forming fin 23, it can constitute support in 14 bottoms, groove chamber on the circuit board 10, can install chip 17 this moment on the fin in the groove chamber 14 23, and routing is connected with copper foil circuit 11 on the circuit board 10.
Resistance on the aforementioned circuit plate 10 15 processing again, it is the one Copper Foil/impedance layer (OHMEGA PLY) 110,120 that on the surface of a substrate 100 and/or bottom surface, is sticked earlier, aforementioned circuit plate 10 can be that individual layer is two-sided, multilayer single face or multilayer are two-sided, in present embodiment, this circuit board 10 is an individual layer double-sided PCB, so the Copper Foil/impedance layer 110,120 that all has been sticked in substrate 100 table/bottom surfaces.Please cooperate consult shown in Figure 3, the internal layer of this Copper Foil/impedance layer 110,120 is one deck nickel phosphate 110A, 120A, be electroplate with layer of copper paper tinsel 110B, 120B on it, Copper Foil/impedance layer 110,120 through image transfer and copper etching and copper sulphate etching step removal logicalnot circuit pattern part, can form copper foil circuit 11,12 respectively, as through further removing the Copper Foil 110B part in Copper Foil/impedance layer 110 on the aforementioned circuit, stay nickel phosphate 110A, can finish the making of film resistor.Except that aforementioned film resistor, this resistance 15 also can be made of a chip-resistance, and this chip-resistance system sees through routing and is connected with copper foil circuit.
Relevant aforesaid Copper Foil/impedance layer 110,120 can adopt the film product (OHMEGA PLY) of American-European gal technology company (Ohmega Technologies Inc.) exploitation, and its impedance can see through following formula and obtain:
R is the resistance of expectation resistance, R
SBe film itself resistance under certain thickness, L, W then are respectively the length and the width of nickel phosphate film.
In other words, as long as we see through the length/width degree that changes the nickel phosphate film, can obtain the film resistor of specific resistance, refers in particular to precision resistance.
From the above, the utility model provides aforesaid circuit module, can integrate RC circuit and chip simultaneously in wherein, more can be multicore sheet form wherein in the chip part, under this situation, it can reduce circuit coupling operation when in the future using with modular package level element, effectively guarantees the production quality and raises the efficiency.
The plane graph of the another preferred embodiment of the utility model shown in Figure 4, its structure is roughly the same with last embodiment, it is to be provided with another layer copper foil circuit 24 at organic glued membrane 40 and 20 of soldering pad layers that difference is in present embodiment, this copper foil circuit 24 is first after carrying out image transfer in order to thick copper coin 200 surfaces that make soldering pad layer 20 and fin 23, and plating ambrose alloy nickel gold thin film constitutes (seeing also shown in Figure 5).
Via as can be known above-mentioned, the concrete structure of each embodiment of the utility model except afore-mentioned characteristics, further possesses following advantages with these designs:
1. contact aspect externally is to adopt thick copper coin to form through etching and processing, for power and Current loading provides the high capacity demand.
2. form the groove chamber with accommodating chip at circuit board, consist of the design of supporting with fin, To help the heat radiation of power chip.
3. the like product of the Thickness Ratio ceramic substrate of element integral body formation has advantage (thinner), And because adopting circuit board technology, it reduces the use of ceramic substrate, so can reduce cost.
4. adopt special Copper Foil/resistance film material to consist of the film resistor of flush type, can Vacate more welding space for surface adhesion components is installed, be conducive to simultaneously multi-chip and highly dense The exploitation of degree circuit.
5. utilizing special joint line design can be beneficial to high density sets type and more large-area life Produce, and help to reduce manufacturing cost.
In sum, take off listed every advantage before the utility model has really possessed, its compared to Existing technology has possessed remarkable efficacy and has promoted.
Claims (9)
1. circuit module with joint line is characterized in that it includes:
One circuit board is formed with copper foil circuit at least through image transfer on surface and bottom surface, and has boring and via, and other is provided with a plurality of passive devices, forms the groove chamber of at least one sky again on the appropriate location;
One soldering pad layer sees through the bottom that an organic glued membrane is located at circuit board, and sees through via and be electrically connected with copper foil circuit on the circuit board;
One fin is positioned at on one deck with aforementioned soldering pad layer, and the corresponding below that forms the groove chamber on the circuit board that is positioned at;
At least one chip, the groove of being located at circuit board is indoor, and is electrically connected with the copper foil circuit formation of circuit board surface;
One first encapsulated layer is formed at the surface of circuit board;
One second encapsulated layer is formed at the bottom surface of circuit board, and between soldering pad layer and fin.
2. the circuit module with joint line as claimed in claim 1 is characterized in that: this soldering pad layer is made up of a plurality of weld pads, and itself and fin see through an organic glued membrane and circuit board pressing by a thick copper coin and formed through thick copper etching.
3. the circuit module with joint line as claimed in claim 1 or 2 is characterized in that: this chip is installed on the fin, sees through routing again and is connected with the circuit of circuit board surface.
4. the circuit module with joint line as claimed in claim 1 is characterized in that: the passive device on this circuit board comprises resistance, electric capacity and inductance.
5. the circuit module with joint line as claimed in claim 4 is characterized in that: this resistance is a film resistor.
6. the circuit module with joint line as claimed in claim 4 is characterized in that: this electric capacity is a surface adhesion components, and it is located on the circuit board and with its surperficial copper foil circuit and is connected.
7. the circuit module with joint line as claimed in claim 1 is characterized in that: be provided with another layer film circuit between organic glued membrane of this circuit board bottom and soldering pad layer.
8. the circuit module with joint line as claimed in claim 7 is characterized in that: this wiring thin film is constituted by carrying out image transfer on thick copper coin surface and electroplate ambrose alloy nickel gold thin film.
9. as claim 1,5,7 or 8 described circuit modules with joint line, it is characterized in that: this circuit board is that individual layer is two-sided, multilayer single face or multilayer are two-sided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200320101520 CN2662448Y (en) | 2003-10-21 | 2003-10-21 | Circuit module with joint line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200320101520 CN2662448Y (en) | 2003-10-21 | 2003-10-21 | Circuit module with joint line |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2662448Y true CN2662448Y (en) | 2004-12-08 |
Family
ID=34339695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200320101520 Expired - Lifetime CN2662448Y (en) | 2003-10-21 | 2003-10-21 | Circuit module with joint line |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2662448Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106252334A (en) * | 2015-06-09 | 2016-12-21 | 英飞凌科技美国公司 | There is the semiconductor package body of embedded output inductor |
| CN108878408A (en) * | 2017-05-10 | 2018-11-23 | 叶秀慧 | It is thinned the encapsulating structure that splices of dual chip |
-
2003
- 2003-10-21 CN CN 200320101520 patent/CN2662448Y/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106252334A (en) * | 2015-06-09 | 2016-12-21 | 英飞凌科技美国公司 | There is the semiconductor package body of embedded output inductor |
| CN106252334B (en) * | 2015-06-09 | 2019-04-19 | 英飞凌科技美国公司 | Semiconductor package body with embedded output inductor |
| CN108878408A (en) * | 2017-05-10 | 2018-11-23 | 叶秀慧 | It is thinned the encapsulating structure that splices of dual chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1196392C (en) | Wiring baseplate and its manufacture method | |
| US7808799B2 (en) | Wiring board | |
| CN100359996C (en) | Printed circuit board and manufacturing method thereof | |
| US7532453B2 (en) | Built-in capacitor type wiring board and method for manufacturing the same | |
| US6281446B1 (en) | Multi-layered circuit board and method of manufacturing the same | |
| US7704548B2 (en) | Method for manufacturing wiring board | |
| US7932471B2 (en) | Capacitor for incorporation in wiring board, wiring board, method of manufacturing wiring board, and ceramic chip for embedment | |
| US6967138B2 (en) | Process for manufacturing a substrate with embedded capacitor | |
| US6930257B1 (en) | Integrated circuit substrate having laminated laser-embedded circuit layers | |
| US20060191711A1 (en) | Embedded chip printed circuit board and method of manufacturing the same | |
| CN1823555A (en) | Circuit board with embedded components and method of manufacture | |
| CN1531071A (en) | Semiconductor device and producing method thereof | |
| CN1933697A (en) | Multilayered wiring substrate and manufacturing method thereof | |
| US7006359B2 (en) | Modular electronic assembly and method of making | |
| CN1332598A (en) | Printed-wiring board with cavity for mounting electronic component and manufacture thereof | |
| CN1221551A (en) | Multi-layer circuit having via matrix interlayer connection and method for fabricating the same | |
| US8826531B1 (en) | Method for making an integrated circuit substrate having laminated laser-embedded circuit layers | |
| CN101044801A (en) | Circuit board assembly with reduced capacitive coupling | |
| CN100405594C (en) | Interposer for decoupling integrated circuits on a circuit board | |
| CN107734859B (en) | PCB manufacturing method and PCB | |
| CN108055767B (en) | PCB and manufacturing method thereof | |
| CN2662448Y (en) | Circuit module with joint line | |
| CN1347276A (en) | Method for making multi-layer PCB composed of flexible and rigid layers | |
| CN2591772Y (en) | Chip package structure | |
| CN1574345A (en) | Semiconductor package |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20131021 Granted publication date: 20041208 |