CN2660781Y - Controlled driver for phase-shifting resonance soft switching inverter - Google Patents
Controlled driver for phase-shifting resonance soft switching inverter Download PDFInfo
- Publication number
- CN2660781Y CN2660781Y CN 03253489 CN03253489U CN2660781Y CN 2660781 Y CN2660781 Y CN 2660781Y CN 03253489 CN03253489 CN 03253489 CN 03253489 U CN03253489 U CN 03253489U CN 2660781 Y CN2660781 Y CN 2660781Y
- Authority
- CN
- China
- Prior art keywords
- pin
- connect
- circuit
- resistance
- ground connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Abstract
The utility model provides a technic proposal of a control driving device used for phase-shift resonant soft switch inverter. The technic proposal mainly includes a super-forearm impulse occurrence conditioning circuit with conventional under-voltage protection circuit, a lag arm impulse occurrence conditioning circuit as well as a conventional enlarging isolation circuit used as output. The super-forearm impulse occurrence conditioning circuit provided by the technical proposal adapts current-mode control and has slope compensation circuit. The lag arm impulse occurrence conditioning circuit has a pulse width control circuit. The super-forearm impulse occurrence conditioning circuit consists of a current control mode pulse width modulator U3, a resistor and a capacitor. The slope compensation circuit consists of an operational amplifier U1B and a resistive and capacitive network. The lag arm pulse width control circuit consists of a voltage comparator U2D and a corresponding resistor and a corresponding capacitor. The lag arm impulse occurrence conditioning circuit consists of a voltage comparator U2A, a trigger U4B and U4A as well as a door U5A and U5B and a corresponding resistor and a corresponding capacitor.
Description
Affiliated technical field:
The utility model relates to the drive circuit that a kind of inverter is used, especially a kind of phase-shifting resonance soft switching inverter Control Driver.
Background technology:
In the prior art, the phase-shifting resonance soft switching inverter is a kind of inverter circuit of excellent performance, and the switching loss of this circuit is little, efficient height, reliability height.The phase-shifting resonance soft switching inverter is made of leading arm and lagging leg, the control Driver Circuit of known leading arm, lagging leg all is to adopt the voltage-type control model, therefore, the problem that exists is that response speed is slow, overcurrent important disadvantages during the main transformer magnetic bias, in addition, the control impuls width of lagging leg is unadjustable, in the inverter power output hour, also have the control blind area.
Summary of the invention:
The utility model is at the existing in prior technology deficiency, and provide a kind of phase-shifting resonance soft switching inverter Control Driver technical scheme, this scheme adopts the current-mode control pattern, can improve system response time, reduce the overcurrent of main transformer, add lagging leg control impuls width-adjustable again, can eliminate the control blind area of inverter when the output small-power.
This programme is realized by following technical measures: mainly comprise the leading arm pulse generation regulating circuit and the lagging leg pulse generation regulating circuit that have under-voltage protecting circuit, and as the amplification buffer circuit of exporting, the characteristics of this programme are that described leading arm pulse generation regulating circuit is to adopt current-mode control, and have slope compensation circuit; Described lagging leg pulse generation regulating circuit then has pulse width control circuit; Described leading arm pulse generation regulating circuit is by current control mode pulse width modulator U3 and resistance, electric capacity is formed, its physical circuit is, the given signal Ig of the electric current of input connects 5 pin of U3,3 pin of U3,12 pin ground connection, 6,7 pin short circuits, 15 pin connect+15 volts of power supplys, 9 pin are through resistance R 7 ground connection, 13 pin also meet electric capacity E3 and C3 ground connection connects+15 volts of power supplys through resistance R 6 simultaneously, between+15 volts of power supplys and the ground electric capacity E2 is arranged, 1,2 pin and 16 pin series resistor R5 connect under-voltage protecting circuit, 14 and 11 pin connect the amplification buffer circuit, connect 10 pin and 8 pin of trigger U4B in the lagging leg pulse generation regulating circuit simultaneously again, and 4 pin of U3 connect slope compensation circuit, 10 pin of U3 connect 5 pin of voltage comparator U2A in the lagging leg pulse generation regulating circuit, and the 8 foot meridian capacitor C6 ground connection of U3 connect 5 pin of operational amplifier U1B in the slope compensation circuit simultaneously; Described slope compensation circuit is made up of operational amplifier U1B and resistance-capacitance network, its physical circuit is, the current feedback signal If of input is connecting resistance R15 and R13 simultaneously, R15 also connects capacitor C 12 and resistance R 16 ground connection connect 16 pin of U3 simultaneously, resistance R 13 is through resistance R 12 ground connection, simultaneously connect-15 volts of power supplys through resistance R 11, simultaneously also and connecting resistance R9, capacitor C 4 and resistance R 10 and 7 pin that meet U1B after capacitor C 5 is connected, 6 pin short circuits, 7 pin of U1B, pulse width control circuit is removed in 7 pin output, meets electric capacity E4 between power supply-15 volt and ground; Described pulse width control circuit is made up of voltage comparator U2D and corresponding resistance capacitance, its physical circuit is, 7 pin of U1B are exported 11 pin that meet U2D through resistance R 21, and 11 pin are again through R22 ground connection, and 10 pin of U2D meet the given signal Ig of electric current of input simultaneously through capacitor C 10 ground connection through resistance R 8; The output Io of described amplification buffer circuit then removes the leading arm and the lagging leg of control inverter.The concrete characteristics of this programme also have; described lagging leg pulse generation regulating circuit is by voltage comparator U2A; trigger U4B and U4A and or door U5A and U5B and corresponding resistor electric capacity composition; its concrete circuit is; 5 pin of voltage comparator U2A connect 10 pin of U3 simultaneously through resistance R 17 ground connection; 4 pin of U2A and connecting resistance R19 and capacitor C 7 ground connection connect+15 volts of power supplys through resistance R 18 simultaneously; 3 pin connect+and 15 volts of power supplys are simultaneously through capacitor C 8 ground connection; 12 pin ground connection; 2 pin output through R20 connect+15 volts of power supplys connect 11 pin of trigger U4B simultaneously; 4 pin of U4A and or 10 pin of 5 pin U5B of door U5A; 14 pin of trigger U4B connect+15 volts of power supplys; 7 pin ground connection; connect capacitor C 9 between 14 pin and 7 pin; 10 pin and 8 pin connect 14 and 11 pin of U3 respectively; 9 pin and 12 pin connect or the door U5B 9 pin; 13 pin connect or the door U5A 2 pin; 6 pin of trigger U4A through resistance R 23 connect+15 volts of power supplys connect the 13 pin output of U2D simultaneously; 5 pin; 3 pin ground connection; 1 pin connects or 3 pin of door U5A and 12 pin of U5B; or 14 pin of door U5A connect+15 volts power supplys whiles are through capacitor C 11 ground connection; 7 pin ground connection; or door 4 pin of U5A and 11 pin of U5B connect under-voltage protecting circuit, or 1 pin of door U5A and 13 pin of U5B connect the amplification buffer circuit simultaneously.What described operational amplifier U1B adopted is that model is the operational amplifier of LF347.What described pulse width modulator U3 adopted is that model is the UC3846 current control mode pulse width modulator.What described voltage comparator U2A and U2D adopted is that model is the voltage comparator of LM339.What described trigger U4A and U4B adopted is that model is two D flip-flops of CD4013.Described or door U5A and U5B adopt is that model is two four inputs or the door of CD4072.
The beneficial effect of this programme can be learnt according to the narration to such scheme, owing in this scheme, adopted the pulse width modulator U3 of current-control type, the given signal Ig of input current that is come by the prime control circuit is defeated by pulse width modulator U3 and voltage comparator U2D, the input current feedback signal If that is come by the converter main circuit feedback sends into U3 after resistance R 12 and R13 dividing potential drop, U3 is according to the width of the size adjustment output pulse of Ig and If, as the drive signal of leading arm, and export to and amplify the leading arm that buffer circuit removes control inverter.Current feedback signal If is a square wave basically, when comparing, be difficult to stable intersection point with Ig, so need If to be transformed into sawtooth pulse by slope compensation circuit, this programme is the sawtooth waveforms oscillator signal that utilizes the 8 pin output of U3, this signal is after U1B isolates, network by R9, R10, C4 and C5 form obtains desirable ramp signal on R12, can obtain required sawtooth pulse behind this ramp signal and the If signal synthesis.The lagging leg drive signal is the more low level dead band pulse signal of 10 pin output by U3, this signal is transformed into the pulse signal of 0-15 volt through voltage comparator U2A, then by trigger U4B frequency division, the square-wave pulse signal that the opposite and frequency of two phase places of 13 pin of U4B and 12 pin output is low one times, respectively as or door U5A and U5B allow to pass through control signal.When given signal Ig is low, this signal and the sawtooth signal that is formed by If are after pulse width control circuit compares, and export one group of broad-adjustable pulse signal by U2D, the pulse signal of this adjustable-width forms the drive signal of inverter lagging leg behind U4A, U5A and U5B, make inverter lagging leg drive signal have the function of turnable pulse width.In addition, because U3 is different to the response current potential of given signal Ig with U2D, when Ig is low, U3 does not work, U2D then has square wave output, its output pulse width is subjected to the control of given signal Ig, and this is exported to lagging leg pulse generation regulating circuit output two path control signal control inverter and forms half-bridge work; When given signal Ig becomes big, U3 starts working, U2D this moment work as usual, this just makes leading arm pulse generation regulating circuit and lagging leg pulse generation regulating circuit that two-way output is all arranged, make the amplification buffer circuit that four tunnel pulses output be arranged, control inverter becomes full-bridge work by half-bridge work, and this has just overcome the control blind area of inverter in power output hour existence.This shows that the utility model has adopted the current-mode control pattern, has improved system response time, reduce the overcurrent of main transformer, and increased the lagging leg control impuls of turnable pulse width, therefore eliminated the control blind area of inverter when the output small-power.So compared with prior art, have substantive distinguishing features and progress, the beneficial effect of its enforcement also is conspicuous.
Description of drawings:
Fig. 1 is the box structure schematic diagram of the utility model embodiment.
Fig. 2 is the circuit diagram of the utility model embodiment.
1 is the lagging leg pulse width control circuit among the figure; 2 is lagging leg pulse generation regulating circuit; 3 is slope compensation circuit; 4 is leading arm pulse generation regulating circuit; 5 is under-voltage protecting circuit, and 6 for amplifying buffer circuit, and Ig is the given signal of input current; If is the input current feedback signal, and Io is for amplifying the buffer circuit output signal.
Embodiment:
For clearly demonstrating the technical characterstic of this programme,, and, this programme is set forth in conjunction with its accompanying drawing below by an embodiment of on inverter type welder, using.
By accompanying drawing as can be seen, the phase-shifting resonance soft switching inverter Control Driver of this programme, mainly comprise the leading arm pulse generation regulating circuit (4) and the lagging leg pulse generation regulating circuit (2) that have conventional under-voltage protecting circuit (5), and as the routine amplification buffer circuit of exporting (6), the described leading arm pulse generation regulating circuit of this programme (4) is to adopt current-mode control, and has slope compensation circuit (3); Described lagging leg pulse generation regulating circuit (2) then has pulse width control circuit (1); Described leading arm pulse generation regulating circuit (4) is by current control mode pulse width modulator U3 and resistance, electric capacity is formed, its physical circuit is, the given signal Ig of the electric current of input connects 5 pin of U3,3 pin of U3,12 pin ground connection, 6,7 pin short circuits, 15 pin connect+15 volts of power supplys, 9 pin are through resistance R 7 ground connection, 13 pin also meet electric capacity E3 and C3 ground connection connects+15 volts of power supplys through resistance R 6 simultaneously, between+15 volts of power supplys and the ground electric capacity E2 is arranged, 1,2 pin and 16 pin series resistor R5 connect under-voltage protecting circuit (5), 14 and 11 pin connect and amplify buffer circuit (6), connect simultaneously 10 pin and 8 pin of trigger U4B in the lagging leg pulse generation regulating circuit (2) again, 4 pin of U3 connect slope compensation circuit (3), 10 pin of U3 connect 5 pin of voltage comparator U2A in the lagging leg pulse generation regulating circuit (2), and the 8 foot meridian capacitor C6 ground connection of U3 connect 5 pin of operational amplifier U1B in the slope compensation circuit simultaneously; Described slope compensation circuit (3) is made up of operational amplifier U1B and resistance-capacitance network, its physical circuit is, the current feedback signal If of input is connecting resistance R15 and R13 simultaneously, R15 also connects capacitor C 12 and resistance R 16 ground connection connect 16 pin of U3 simultaneously, resistance R 13 is through resistance R 12 ground connection, simultaneously connect-15 volts of power supplys through resistance R 11, simultaneously also and connecting resistance R9, capacitor C 4 and resistance R 10 and 7 pin that meet U1B after capacitor C 5 is connected, 6 pin short circuits, 7 pin of U1B, pulse width control circuit (1) is removed in 7 pin output, meets electric capacity E4 between power supply-15 volt and ground; Described pulse width control circuit (1) is made up of voltage comparator U2D and corresponding resistance capacitance, its physical circuit is, the 7 pin output of U1B connects 11 pin of U2D through resistance R 21,11 pin are again through R22 ground connection, and 10 pin of U2D meet the given signal Ig of electric current of input simultaneously through capacitor C 10 ground connection through resistance R 8; The output Io of described amplification buffer circuit (6) then removes the leading arm and the lagging leg of control inverter.Described lagging leg pulse generation regulating circuit (2) is by voltage comparator U2A; trigger U4B and U4A and or door U5A and U5B and corresponding resistor electric capacity composition; its concrete circuit is; 5 pin of voltage comparator U2A connect 10 pin of U3 simultaneously through resistance R 17 ground connection; 4 pin of U2A and connecting resistance R19 and capacitor C 7 ground connection connect+15 volts of power supplys through resistance R 18 simultaneously; 3 pin connect+and 15 volts of power supplys are simultaneously through capacitor C 8 ground connection; 12 pin ground connection; 2 pin output through R20 connect+15 volts of power supplys connect 11 pin of trigger U4B simultaneously; 4 pin of U4A and or 10 pin of 5 pin U5B of door U5A; 14 pin of trigger U4B connect+15 volts of power supplys; 7 pin ground connection; connect capacitor C 9 between 14 pin and 7 pin; 10 pin and 8 pin connect 14 and 11 pin of U3 respectively; 9 pin and 12 pin connect or the door U5B 9 pin; 13 pin connect or the door U5A 2 pin; 6 pin of trigger U4A through resistance R 23 connect+15 volts of power supplys connect the 13 pin output of U2D simultaneously; 5 pin; 3 pin ground connection; 1 pin connects or 3 pin of door U5A and 12 pin of U5B; or 14 pin of door U5A connect+15 volts power supplys whiles are through capacitor C 11 ground connection; 7 pin ground connection; or door 4 pin of U5A and 11 pin of U5B connect under-voltage protecting circuit (5), or 13 pin of 1 pin of door U5A and U5B connect simultaneously and amplify buffer circuit (6).What described operational amplifier U1B adopted is that model is the operational amplifier of LF347.What described pulse width modulator U3 adopted is that model is the UC3846 current control mode pulse width modulator.What described voltage comparator U2A and U2D adopted is that model is the voltage comparator of LM339.What described trigger U4A and U4B adopted is that model is two D flip-flops of CD4013.Described or door U5A and U5B adopt is that model is two four inputs or the door of CD4072.
Claims (7)
1. phase-shifting resonance soft switching inverter Control Driver, mainly comprise the leading arm pulse generation regulating circuit and the lagging leg pulse generation regulating circuit that have under-voltage protecting circuit, and as the amplification buffer circuit of exporting, it is characterized in that: described leading arm pulse generation regulating circuit is to adopt current-mode control, and has slope compensation circuit; Described lagging leg pulse generation regulating circuit then has pulse width control circuit; Described leading arm pulse generation regulating circuit is by current control mode pulse width modulator U3 and resistance, electric capacity is formed, its physical circuit is, the given signal Ig of the electric current of input connects 5 pin of U3,3 pin of U3,12 pin ground connection, 6,7 pin short circuits, 15 pin connect+15 volts of power supplys, 9 pin are through resistance R 7 ground connection, 13 pin also meet electric capacity E3 and C3 ground connection connects+15 volts of power supplys through resistance R 6 simultaneously, between+15 volts of power supplys and the ground electric capacity E2 is arranged, 1 of U3,2 pin and 16 pin connect under-voltage protecting circuit through resistance R 5,14 and 11 pin connect the amplification buffer circuit, connect 10 pin and 8 pin of trigger U4B in the lagging leg pulse generation regulating circuit simultaneously again, and 4 pin of U3 connect slope compensation circuit, 10 pin of U3 connect 5 pin of voltage comparator U2A in the lagging leg pulse generation regulating circuit, and the 8 foot meridian capacitor C6 ground connection of U3 connect 5 pin of operational amplifier U1B in the slope compensation circuit simultaneously; Described slope compensation circuit is made up of operational amplifier U1B and resistance-capacitance network, its physical circuit is, the current feedback signal If of input is connecting resistance R15 and R13 simultaneously, R15 also connects capacitor C 12 and resistance R 16 ground connection connect 16 pin of U3 simultaneously, resistance R 13 is through resistance R 12 ground connection, simultaneously connect-15 volts of power supplys through resistance R 11, simultaneously also and connecting resistance R9, capacitor C 4 and resistance R 10 and 7 pin that meet U1B after capacitor C 5 is connected, 6 pin short circuits, 7 pin of U1B, pulse width control circuit is removed in 7 pin output, meets electric capacity E4 between power supply-15 volt and ground; Described pulse width control circuit is made up of voltage comparator U2D and corresponding resistance capacitance, its physical circuit is, 7 pin of U1B are exported 11 pin that meet U2D through resistance R 21, and 11 pin are again through R22 ground connection, and 10 pin of U2D meet the given signal Ig of electric current of input simultaneously through capacitor C 10 ground connection through resistance R 8; The output Io that amplifies buffer circuit removes control inverter.
2. Control Driver according to claim 1; it is characterized in that: described lagging leg pulse generation regulating circuit is by voltage comparator U2A; trigger U4B and U4A and or door U5A and U5B and corresponding resistor electric capacity composition; its concrete circuit is; 5 pin of voltage comparator U2A connect 10 pin of U3 simultaneously through resistance R 17 ground connection; 4 pin of U2A and connecting resistance R19 and capacitor C 7 ground connection connect+15 volts of power supplys through resistance R 18 simultaneously; 3 pin connect+and 15 volts of power supplys are simultaneously through capacitor C 8 ground connection; 12 pin ground connection; 2 pin output through R20 connect+15 volts of power supplys connect 11 pin of trigger U4B simultaneously; 4 pin of U4A and or 10 pin of 5 pin U5B of door U5A; 14 pin of trigger U4B connect+15 volts of power supplys; 7 pin ground connection; connect capacitor C 9 between 14 pin and 7 pin; 10 pin and 8 pin connect 14 and 11 pin of U3 respectively; 9 pin and 12 pin connect or the door U5B 9 pin; 13 pin connect or the door U5A 2 pin; 6 pin of trigger U4A through resistance R 23 connect+15 volts of power supplys connect the 13 pin output of U2D simultaneously; 5 pin; 3 pin ground connection; 1 pin connects or 3 pin of door U5A and 12 pin of U5B; or 14 pin of door U5A connect+15 volts power supplys whiles are through capacitor C 11 ground connection; 7 pin ground connection; or door 4 pin of U5A and 11 pin of U5B connect under-voltage protecting circuit, or 1 pin of door U5A and 13 pin of U5B connect the amplification buffer circuit simultaneously.
3. Control Driver according to claim 1 is characterized in that: what described operational amplifier U1B adopted is that model is the operational amplifier of LF347.
4. Control Driver according to claim 1 is characterized in that: what described pulse width modulator U3 adopted is that model is the UC3846 current control mode pulse width modulator.
5. Control Driver according to claim 1 and 2 is characterized in that: what described voltage comparator U2A and U2D adopted is that model is the voltage comparator of LM339.
6. Control Driver according to claim 1 and 2 is characterized in that: what described trigger U4A and U4B adopted is that model is two D flip-flops of CD4013.
7. Control Driver according to claim 1 and 2 is characterized in that: described or door U5A and U5B adopt is that model is two four inputs or the door of CD4072.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03253489 CN2660781Y (en) | 2003-09-22 | 2003-09-22 | Controlled driver for phase-shifting resonance soft switching inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03253489 CN2660781Y (en) | 2003-09-22 | 2003-09-22 | Controlled driver for phase-shifting resonance soft switching inverter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2660781Y true CN2660781Y (en) | 2004-12-01 |
Family
ID=34328308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03253489 Expired - Lifetime CN2660781Y (en) | 2003-09-22 | 2003-09-22 | Controlled driver for phase-shifting resonance soft switching inverter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2660781Y (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100341656C (en) * | 2004-12-06 | 2007-10-10 | 陈仁富 | Device for realizing soft switching while welder no-load and light load for inverse welder |
| CN102136808A (en) * | 2011-03-21 | 2011-07-27 | 济宁奥太电气有限公司 | Compensation circuit for stabilizing output current of phase shift resonance soft switching inverter |
| CN102205476A (en) * | 2011-05-26 | 2011-10-05 | 太原市星云焊接设备有限公司 | High-frequency soft switching contravariant digital multifunctional welding machine |
| CN101546957B (en) * | 2008-03-24 | 2012-07-25 | 凹凸电子（武汉）有限公司 | DC to DC converter having controller and control method thereof |
| CN102611287A (en) * | 2012-03-12 | 2012-07-25 | 重庆环亚电子有限公司 | Method for realizing full-bridge ZVS (Zero Voltage Switch) and ZCS (Zero Current Switch) drive and circuit thereof |
| CN103326475A (en) * | 2012-03-19 | 2013-09-25 | Lg伊诺特有限公司 | Wireless power transmitting apparatus and method thereof |
| CN104308330A (en) * | 2014-08-13 | 2015-01-28 | 深圳市绿能芯科技有限公司 | Electric welding machine and constant-current control circuit |
| US9059632B2 (en) | 2008-03-24 | 2015-06-16 | O2Micro, Inc. | Controllers for DC to DC converters |
| USRE49955E1 (en) | 2012-03-19 | 2024-04-30 | Lg Innotek Co., Ltd. | Wireless power transmitting apparatus and method thereof |
-
2003
- 2003-09-22 CN CN 03253489 patent/CN2660781Y/en not_active Expired - Lifetime
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100341656C (en) * | 2004-12-06 | 2007-10-10 | 陈仁富 | Device for realizing soft switching while welder no-load and light load for inverse welder |
| CN101546957B (en) * | 2008-03-24 | 2012-07-25 | 凹凸电子（武汉）有限公司 | DC to DC converter having controller and control method thereof |
| US9059632B2 (en) | 2008-03-24 | 2015-06-16 | O2Micro, Inc. | Controllers for DC to DC converters |
| CN102136808A (en) * | 2011-03-21 | 2011-07-27 | 济宁奥太电气有限公司 | Compensation circuit for stabilizing output current of phase shift resonance soft switching inverter |
| CN102136808B (en) * | 2011-03-21 | 2013-03-13 | 济宁奥太电气有限公司 | Compensation circuit for stabilizing output current of phase shift resonance soft switching inverter |
| CN102205476B (en) * | 2011-05-26 | 2014-01-08 | 太原市星云焊接设备有限公司 | High-frequency soft switching contravariant digital multifunctional welding machine |
| CN102205476A (en) * | 2011-05-26 | 2011-10-05 | 太原市星云焊接设备有限公司 | High-frequency soft switching contravariant digital multifunctional welding machine |
| CN102611287B (en) * | 2012-03-12 | 2014-11-12 | 重庆环亚电子有限公司 | Method for realizing full-bridge ZVS (Zero Voltage Switch) and ZCS (Zero Current Switch) drive and circuit thereof |
| CN102611287A (en) * | 2012-03-12 | 2012-07-25 | 重庆环亚电子有限公司 | Method for realizing full-bridge ZVS (Zero Voltage Switch) and ZCS (Zero Current Switch) drive and circuit thereof |
| CN103326475A (en) * | 2012-03-19 | 2013-09-25 | Lg伊诺特有限公司 | Wireless power transmitting apparatus and method thereof |
| CN103326475B (en) * | 2012-03-19 | 2015-08-26 | Lg伊诺特有限公司 | Wireless power transmission apparatus and method thereof |
| US9225391B2 (en) | 2012-03-19 | 2015-12-29 | Lg Innotek Co., Ltd. | Wireless power transmitting apparatus and method thereof |
| US9711974B2 (en) | 2012-03-19 | 2017-07-18 | Lg Innotek Co., Ltd. | Wireless power transmitting apparatus and method thereof |
| USRE49017E1 (en) | 2012-03-19 | 2022-04-05 | Lg Innotek Co., Ltd. | Wireless power transmitting apparatus and method thereof |
| USRE49955E1 (en) | 2012-03-19 | 2024-04-30 | Lg Innotek Co., Ltd. | Wireless power transmitting apparatus and method thereof |
| CN104308330A (en) * | 2014-08-13 | 2015-01-28 | 深圳市绿能芯科技有限公司 | Electric welding machine and constant-current control circuit |
| CN104308330B (en) * | 2014-08-13 | 2016-08-17 | 深圳市绿能芯科技有限公司 | A kind of electric welding machine and constant-current control circuit thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102185466B (en) | Driving circuit and driving method applied to flyback-type converter and quasi-resonant soft-switching flyback-type converter applying same | |
| CN2660781Y (en) | Controlled driver for phase-shifting resonance soft switching inverter | |
| CN1561576B (en) | Gate driver apparatus having an energy recovering circuit | |
| CN107017780A (en) | The isolated form DC DC booster converters and its control method of a kind of band pull-up active clamp branch road | |
| CN101170295A (en) | A flying wheel electromotor control system with magnetic suspending reaction | |
| CN101388612A (en) | Soft switch circuit controlling method in switch power source | |
| CN107493025A (en) | A kind of loaded self-adaptive change of current control method of Resonant DC Link three-phase inverter | |
| CN101677240A (en) | Isolated gate bipolar transistor driving circuit | |
| CN102412773A (en) | Control circuit of switched reluctance motor with double chopped wave limits | |
| CN1228909C (en) | Synchronous rectifying driving circuit for DC converter | |
| CN101162874A (en) | Resonant vibration dead-soft switching inverter circuit applied to brushless DC motor and control method | |
| CN100342631C (en) | Soft switching circuit without absorption loss | |
| CN110189595A (en) | One kind being used for railway phase-sensitive track circuits inverter driving circuit | |
| CN109450263A (en) | One kind recommending mode of resonance driving circuit and its control method | |
| CN100499338C (en) | Zero voltage zero current switch DC-DC converter | |
| CN104506038A (en) | Optical coupling detection based Buck convertor soft-switching control method | |
| CN104820383A (en) | Satellite-borne double-refrigerator peak load shifting controller | |
| CN101264545A (en) | Controlling circuit of zero voltage zero current soft-switching arc welding inverter | |
| CN202261130U (en) | Rapid wave chopping device of driving system of switched reluctance motor | |
| CN204794751U (en) | DC Brushless motor's soft switch control system | |
| CN2917058Y (en) | Thyristor triggered controller for dynamic reactive compensation | |
| CN103684005A (en) | Soft switch control method and circuit with non-contact power supply | |
| CN205283380U (en) | MOSFET isolating driver circuit of wide duty cycle | |
| CN104485718B (en) | A kind of Buck soft switch circuit for accumulator charging and control method thereof | |
| CN206180919U (en) | Fan step -down speed adjusting device and fan equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANDONG SDU AOTAI ELECTRIC CO., LTD. Free format text: FORMER OWNER: CHEN RENFU Effective date: 20090410 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20090410 Address after: Mount hi tech Zone, hi tech Zone, Shandong, Ji'nan Province, China: 250101 Patentee after: Shandong Sdu Aotai Electric Co., Ltd. Address before: Alex Hua Tian building, No. 3 thousand Buddha Road, Shandong, Ji'nan Province, China: 250061 Patentee before: Chen Renfu |
|
| C56 | Change in the name or address of the patentee |
Owner name: SHANDONG AOTAI ELECTRIC APPLICANCE CO., LTD. Free format text: FORMER NAME: SHANDONG SDU AOTAI ELECTRIC CO., LTD. |
|
| CP03 | Change of name, title or address |
Address after: No. 282, Bole Road, hi tech Development Zone, Shandong, Ji'nan Province: 250101 Patentee after: Shandong Aotai Electric Co., Ltd. Address before: Mount hi tech Zone, hi tech Zone, Shandong, Ji'nan Province, China: 250101 Patentee before: Shandong Sdu Aotai Electric Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CX01 | Expiry of patent term |
Expiration termination date: 20130922 Granted publication date: 20041201 |