CN2607578Y - Impact speed reducing measurer - Google Patents
Impact speed reducing measurer Download PDFInfo
- Publication number
- CN2607578Y CN2607578Y CN 03221003 CN03221003U CN2607578Y CN 2607578 Y CN2607578 Y CN 2607578Y CN 03221003 CN03221003 CN 03221003 CN 03221003 U CN03221003 U CN 03221003U CN 2607578 Y CN2607578 Y CN 2607578Y
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- Prior art keywords
- tunnel
- meet
- short circuits
- terminations
- termination
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Abstract
The utility model relates to a special device for testing the retarded velocities of the hoisting conveyance under theoperating conditions of overwinding buffer, overfalling buffer, resisting to collision, supporting a cage, receiving a cage and testing a parachute gear,and comprises an acceleration transducer. The millivolt signals produced by the acceleration transducer are converted into a voltage signals receivable to a monolithic computer through a signal processing module, and sent to a CPU through an A/D conversion, thus quickly measuring the the acceleration valve of the movement object. The utility model can sample on spot, produce precise data, run fast and adapt to the requirements of the requirements of on-spot fast impact test.
Description
One, technical field
The utility model relates to a kind of impact retarded velocity tester of mine hoisting container, more specifically say so a kind of be used to test the mine hoisting container test its overreach buffer, cross slow down dash, the instrumentation of the retarded velocity of operating modes such as crashproof, holder jar, cage are accepted, safety catcher experiment.
Two, background technology
The impact retarded velocity testing tool of existing mine hoisting container can only be tested at the scene, after on the test stand hoisting conveyance being risen to certain altitude, after container is freely put down, measure the distance that container glides in buffering course, then with after the data acquisition, get back to the laboratory, by measuring after artificial or the COMPUTER CALCULATION, this instrument can not carry out real-time sampling, data have error in measuring process, speed is slow.
Three, technology contents
1. goal of the invention
The purpose of this utility model provide a kind of can real-time sampling, data are accurate, travelling speed is fast impact retarded velocity tester.
2. technical scheme
The purpose of this utility model can realize in the following manner: a kind of impact retarded velocity tester, include acceleration transducer, its detected signal changes into the acceptable voltage signal of single-chip microcomputer through signal processing module, this signal enters single-chip microcomputer from the A/D interface, single-chip microcomputer is arranged to eight bit data bus, sixteen bit address bus mode, slow respectively latch, memory under program and the non-volatile data memory delivered to of one road signal of single-chip microcomputer; The output signal of latch is delivered to memory under program and non-volatile data memory respectively.Another road signal of single-chip microcomputer is delivered to keyboard display, memory under program non-volatile data memory and parallel I/O interface respectively, and parallel I/O interface connects printer, and KYBD/display-interface connects display and keyboard respectively.
3. technique effect
The utility model compared with prior art has following advantage: this retarded velocity tester energy real-time sampling, and data are accurate, and travelling speed is fast, can adapt to on-the-spot impulse test requirement fast.Stable and reliable working performance, antijamming capability is strong, and convenient test is quick.
Four, description of drawings
Accompanying drawing 1 is a theory diagram of the present utility model.
Accompanying drawing 2 is circuit diagrams of the present utility model.
Five, embodiment
The utility model is described in further detail with reference to the accompanying drawings:
Shown in accompanying drawing 1: Fig. 1 has showed the theory diagram that impacts the retarded velocity tester.
A kind of impact retarded velocity tester, include acceleration transducer 1, its detected signal changes into the acceptable voltage signal of single-chip microcomputer 3 (80C196) through signal processing module 2, this signal enters single-chip microcomputer 3 from the A/D interface, single-chip microcomputer 3 is arranged to eight bit data bus, sixteen bit address bus mode, slow respectively latch 4 (74LS373), memory under program 5 (27256) and the non-volatile data memory 6 (28250) delivered to of one road signal of single-chip microcomputer 3; The output signal of latch 4 is delivered to memory under program 5 and non-volatile data memory 6 respectively.Another road signal of single-chip microcomputer 3 is delivered to keyboard display 8 (8279), memory under program 5 non-volatile data memories 6 and parallel I/O interface 7 (8255) respectively, and parallel I/O interface 7 connects printer 11, and KYBD/display-interface 8 connects display 9 and keyboard 10 respectively.
Shown in accompanying drawing 2: Fig. 2 has showed impact retarded velocity tester schematic diagram.
A kind of retarded velocity tester includes acceleration transducer 1, and its detected acceleration signal is through signal processing module 2 to 16 bit CPUs (MCS-96 series) IC
24 ends, IC
267,66 ends between the short circuit capacitor C
4Respectively through capacitor C
2, C
3Back ground connection, hex inverter IC
13 ends (74LS14) are through resistance R
1After meet+the 5V power supply IC
13 ends also respectively through reset switch K
1, resistance R
2And capacitor C
1Back short circuit, IC
12 termination IC
216 ends, IC
11,4 end short circuits after, the one road to programmable peripheral parallel interface (8255) IC
635 ends, another road is to IC
99 ends, IC
263 ends through resistance R
3Meet+the 5V power supply IC
22,64 end ground connection, IC
240,61 end short circuits after, the one tunnel meets programmable keyboard display interface (8279) IC
910,11 ends, another road meets EPROM program storage (27256) IC respectively
422 ends and non-volatile data memory (28256) IC
522,27 end and IC
65,36 ends, IC
253~60 end short circuits after divide five the tunnel, the one tunnel to be connected to eight D-latchs (74LS373) IC
33,4,7,8,13,14,17,18 ends, the two tunnel are connected to IC
411~19 ends, the three tunnel are connected to IC
511~19 ends, the four tunnel are connected to programmable peripheral parallel interface (8255) IC
627~34 ends, the five tunnel meet IC
912~19 ends, IC
245~52 end short circuits after divide four the tunnel, the one tunnel to meet IC
32,5,6,9,12,15,16,19 ends, the two tunnel are connected to IC
42~10,20,21,23~27 ends, the three tunnel meet IC
51~10,21,23~26 ends, the four tunnel are connected to IC
68,9 ends, IC
262 ends meet IC respectively
311 ends and IC
99 ends, IC
31 end ground connection, IC
245~52 end short circuits after one the tunnel meet two 2-4 line code translator (74LS139) IC
72,3 ends, another road meets two 2-4 line code translator (74LS139) IC
813,14 ends, IC
71 end ground connection, IC
76 termination IC
520 ends, IC
77 termination IC
815 ends, IC
812 termination IC
66 ends, IC
811 termination IC
922 ends, IC
613,14,18~25 terminations after to printer 11, IC
924~31 terminations after one road to six inverter buffer (74LS06) IC
101,3 ends, another Lu Zhiliu inverter buffer (74LS06) IC
111,3,5,9,11,13 ends, IC
923,32~34 terminations after meet code translator (74LS138) IC
121~3,6 ends, IC
92,5~7 end terminations after, the one tunnel respectively through resistance R
4, R
5, R
6After connect+the 5V power supply, another road is to keyboard 10, IC
102,4 terminations after one the tunnel meet IC
112,4,6,8,10,12 ends, another road is connected to display 9 and keyboard 10, IC respectively
124,5 end ground connection, IC
127,9~15 end short circuits after, be connected to two drivers (75451) IC respectively
13, IC
14, IC
15, IC
161,2,4,5 ends, IC
13, IC
14, IC
15, IC
163,6 end short circuits link to each other after respectively to display 9 and keyboard 10.
Claims (1)
1. one kind is impacted the retarded velocity tester and includes acceleration transducer (1), its detected acceleration signal through signal processing module (2) to 16 bit CPU IC
24 ends, it is characterized in that: IC
24 ends, IC
267,66 ends between the short circuit capacitor C
4Respectively through capacitor C
2, C
3Back ground connection, hex inverter IC
13 ends through resistance R
1After meet+the 5V power supply IC
13 ends also respectively through reset switch K
1, resistance R
2And capacitor C
1Back short circuit, IC
12 termination IC
216 ends, IC
11,4 end short circuits after, the one road to programmable peripheral parallel interface IC
635 ends, another road is to IC
99 ends, IC
263 ends through resistance R
3Meet+the 5V power supply IC
22,64 end ground connection, IC
240,61 end short circuits after, the one tunnel meets programmable keyboard/display interface IC
910,11 ends, another road meets EPROM program storage IC respectively
422 ends and non-volatile data memory IC
522,27 end and IC
65,36 ends, IC
253~60 end short circuits after divide five the tunnel, the one tunnel to be connected to eight D-latch IC
33,4,7,8,13,14,17,18 ends, the two tunnel are connected to IC
411~19 ends, the three tunnel are connected to IC
511~19 ends, the four tunnel are connected to programmable peripheral parallel interface IC
627~34 ends, the five tunnel meet IC
912~19 ends, IC
245~52 end short circuits after divide four the tunnel, the one tunnel to meet IC
32,5,6,9,12,15,16,19 ends, the two tunnel are connected to IC
42~10,20,21,23~27 ends, the three tunnel meet IC
51~10,21,23~26 ends, the four tunnel are connected to IC
68,9 ends, IC
262 ends meet IC respectively
311 ends and IC
99 ends, IC
31 end ground connection, IC
245~52 end short circuits after one the tunnel meet two 2-4 line code translator IC
72,3 ends, another road meets two 2-4 line code translator IC
813,14 ends, IC
71 end ground connection, IC
76 termination IC
520 ends, IC
77 termination IC
815 ends, IC
812 termination IC
66 ends, IC
811 termination IC
922 ends, IC
613,14,18~25 terminations after to printer (11), IC
924~31 terminations after one road to six inverter buffer IC
101,3 ends, another Lu Zhiliu inverter buffer IC
111,3,5,9,11,13 ends, IC
923,32~34 terminations after meet code translator IC
121~3,6 ends, IC
92,5~7 end terminations after, the one tunnel respectively through resistance R
4, R
5, R
6After connect+the 5V power supply, another road is to keyboard (10), IC
102,4 terminations after one the tunnel meet IC
112,4,6,8,10,12 ends, another road is connected to display (9) and keyboard (10), IC respectively
124,5 end ground connection, IC
127,9~15 end short circuits after, be connected to two driver ICs respectively
13, IC
14, IC
15, IC
161,2,4,5 ends, IC
13, IC
14, IC
15, IC
163,6 end short circuits link to each other after respectively to display (9) and keyboard (10).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 03221003 CN2607578Y (en) | 2003-04-05 | 2003-04-05 | Impact speed reducing measurer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 03221003 CN2607578Y (en) | 2003-04-05 | 2003-04-05 | Impact speed reducing measurer |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2607578Y true CN2607578Y (en) | 2004-03-24 |
Family
ID=34162203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 03221003 Expired - Fee Related CN2607578Y (en) | 2003-04-05 | 2003-04-05 | Impact speed reducing measurer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2607578Y (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100411965C (en) * | 2006-02-14 | 2008-08-20 | 中国矿业大学 | Device and method of detecting braking performance of safety catcher |
CN102353809A (en) * | 2011-06-27 | 2012-02-15 | 哈尔滨工业大学深圳研究生院 | Collision prevention device and method for object |
-
2003
- 2003-04-05 CN CN 03221003 patent/CN2607578Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100411965C (en) * | 2006-02-14 | 2008-08-20 | 中国矿业大学 | Device and method of detecting braking performance of safety catcher |
CN102353809A (en) * | 2011-06-27 | 2012-02-15 | 哈尔滨工业大学深圳研究生院 | Collision prevention device and method for object |
CN102353809B (en) * | 2011-06-27 | 2014-11-19 | 哈尔滨工业大学深圳研究生院 | Collision prevention device and method for object |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |