CN2600992Y - TDD/CDMA communication system - Google Patents

Abstract

The utility model comprises various implementation examples which are used for the treatment of a physical layer, wherein one implementation example determines to image bit addresses in a first interlThe utility model includes various embodiments which are used for processing of physical layer. An embodiment confirms mapping the bit address in the physical channel cushion from the bit address of teaver buffer to the bit addresses in a physical channel buffer; the address of the physical channel buffer is determined according to the bit addresses after speed rate matching, bit scrambling, seconhe first interleaving device cushion. The physical channel cushion address is confirmed according to the bit address after mapping the rate matching, the bit interference and the second interleaving ad interweaving and physical channel image; the determined address of the physical channel buffer is utilized to directly read bits from the first interleaver buffer and write the bits to the physical nd physical channel. Read the bit directly from the first interleaving device cushion through utilizing the confirmed physical channel cushion address and write the bit into the physical channel cushichannel buffer. The other implementation example determines to image the bit addresses in the physical channel buffer to the bit addresses in the first interleaver buffer; the address of the physical on. The other embodiment confirms mapping the bit address in the physical channel cushion from the bit address of the first interleaving device cushion. The first interleaving device cushion address ichannel buffer is determined according to the bit addresses after reverse speed rate matching, reverse bit scrambling, reverse second interweaving and reverse physical channel image; the determined ads confirmed according to the bit address after mapping the reverse rate matching, reverse bit interference, reverse second interleaving and reverse physical channel. Read the bit directly from the condress of the first interleaver buffer is utilized to directly read the bits and write the bits to the physical channel buffer. firmed first interleaving device cushion address and write the bit into the physical channel cushion address.

Description

A kind of time-division/CDMA (TDD/CDMA) communication system

Technical field

The application requires the priority of U.S.'s temporary patent application 60/284,062 of submission on April 16 calendar year 2001.

The utility model relates generally to wireless time division duplex (TDD) communication system of employing code division multiple access (CDMA). Particularly, the utility model relates to and the Physical layer of this system is carried out data processes.

Background technology

In cdma communication system, information exchange is crossed wireless air interface with same frequency spectrum transmission, and by its channel code difference. In order further to improve the utilization rate of frequency spectrum, the CDMA/TDD communication system is divided into the repeating frame with fixed qty time slot, for example every frame ten five (15) individual time slots during with frequency spectrum. In TDD, each time slot is used for up-link or downlink only proprietaryly.

Before the transmission, processed by Universal Mobile Telecommunications System (UMTS) grounding wireless access network (UTRAN) by the data of air interface transmission. Fig. 1 represents the wireless communication system of a simplification. Wireless user's (subscriber equipment) 38₁-38 _N(38) with base station 36₁-36 _N(36) communication. Typically, node B34₁-34 _N(34) one group of base station 36 of control. A radio network controller (RNC) 32₁-32 _N(32) control one group node B34. RNC32, node B34 and other relevant parts are parts of UTRAN 30. UTRAN 30 is by core network 40 and other telex networks.

Data among the UTRAN 30 are processed by for example third generation cooperative programme (3GPP), UTMS terrestrial wireless access (UTRA) TDD system standardization. UTRAN 30 processes transmission channel to pass through air interface transmission. Fig. 2 is the block diagram that this UTRAN processes.

Transmission block is used for passing through air interface transmission. Transmission block occurs with group (transmission block group). This group is received in specified time interval (Transmission Time Interval (TTI)). For 3GPP UTRA TDD, possible TTI length is 10 milliseconds, 20 milliseconds, 40 milliseconds and 80 milliseconds, and they correspond respectively to 1,2,4 and 8 radio frames.

Cyclic Redundancy Code (CRC) extra block 42 is attached to the CRC bit on each transmission block. The CRC bit is used for the error detection of receiver. The length of CRC bit is from high-rise signaling.

Transmission block (TrBKs) is linked continuously by TrBK cascade/code character fragmented blocks 44. If the heap(ed) capacity that the bit number of the piece of link is permitted greater than a code character, then the piece of link is segmented. The size of code character depends on employed error check code type, for example convolutional encoding (maximum is 504 bits), turbo coding (maximum is 5114 bits) or without coding (infinitely). The piece of link is segmented into equal-sized section (code character) of minimum number. If the original quantity of link bit is not the even-multiple of the minimum quantity of segmentation, adopt the filling bit to guarantee that segmentation has equal size.

Code character is encoded in 46 error correction of chnnel coding piece, for example by convolutional encoding, turbo coding or without coding. Behind the coding, code character links together. If the code character of link can not be divided into equal-sized section (frame) of minimum number, then carry out the equilibrium of radio frame by linking other any bit.

The first interleaver 48 all link datas that interweaves. Subsequently, the data communication device that is interleaved is crossed radio frame fragmented blocks 50 and is divided into the radio frame. Bit is removed or repeated to rate matching block 52. Remove and repeat to guarantee that the data in each physical channel (Resource Unit) transmission equal the dominant bit speed of this channel. The speed coupling characteristic of each transmission channel (TrCH) is by high-rise signaling.

TrCH multiplexing piece 54 receives the data of a frame for each transmission channel. The data that each TrCH receives are multiplexed on the compound transmission channel (CCTrCH) of having been compiled code continuously. Bit scrambling piece 56 scrambling CCTrCH bits.

Physical channel piece 58 with the data mapping of scrambling to physical channel. The second interleaver 60 is in whole radio frame or even the interweave data of scrambling of each time slot. The employed weave type of high-rise control. After interweaving for the second time, the data that are interleaved are separated into physical channel to utilize physical channel map piece 62 to pass through air interface transmission. Transmitting physical channel data subsequently are for example from the base station 36 or UE38. At the receiving system place, for example UE38 or base station 36 are reversed same processing to recover the data of transmission.

For deal with data, need bufferings at different levels ( buffer 64,66,68,70,72) as shown in Figure 2, for example at the first interleaver 48, rate matching block 52, transmission channel multichannel piece 68, bit scrambling piece 56 and the second interleaver 60. This large-scale buffering is undesirable afterwards. It needs large memory usage and special IC (ASIC) memory space to adapt to buffering.

Therefore, need to change the data processing scheme.

Summary of the invention

The utility model comprises the various embodiment that process for Physical layer. The address of the bit in the address mapping physical channel buffer of a definite bit in the first interleaver buffer of embodiment. The physical channel buffer address according to speed coupling, bit interweave, bit address after the second interleaver and the physical channel map determines. Utilize determined physical channel buffer address directly to read bit and bit is write the physical channel buffer from the first interleaver buffer. The address of the bit in the address mapping first interleaver buffer of the definite bit in the physical channel buffer of another embodiment. The first interleaver buffer address according to reverse rate coupling, oppositely bit interweaves, bit address after reverse the second interleaver and the reverse physical channels map determines. Directly read bit and bit is write the physical channel buffer address from determined the first interleaver buffer address.

Description of drawings

Fig. 1 is wireless TDD/CDMA communication system figure.

Fig. 2 is Physical layer processing figure.

Fig. 3 is the flow chart that " pushing on " processes.

Fig. 4 is the reduced graph of an embodiment of " pushing on " processing.

Fig. 5 is the flow chart of " pushing on " speed coupling.

Fig. 6 is the flow chart of " pushing on " bit scrambling.

Fig. 7 is the reduced graph of another embodiment of " pushing on " processing.

Fig. 8 is the flow chart of another embodiment of " pushing on " bit scrambling.

Fig. 9 is the flow chart that " pushing on " interweaves for the second time.

Figure 10 is the example figure that " pushing on " interweaves for the second time.

Figure 11 is the flow chart of " pushing on " physical channel map.

Figure 12 is " push on " the example figure of physical channel map of situation 2.

Figure 13 is " push on " the example figure of physical channel map of situation 3.

Figure 14 is " push on " the example figure of physical channel map of situation 4.

Figure 15 is the flow chart that " popping " processes.

Figure 16 is the reduced graph of an embodiment of " popping " processing.

Figure 17 is the flow chart of " popping " reverse physical channels map.

Figure 18 is " pop " the example figure of reverse physical channels map of situation 2.

Figure 19 is " pop " the example figure of reverse physical channels map of situation 3.

Figure 20 is " pop " the example figure of reverse physical channels map of situation 4.

Figure 21 is the flow chart that " popping " oppositely interweaves for the second time.

Figure 22 is the example figure that " popping " oppositely interweaves for the second time.

Figure 23 is the flow chart of " popping " reverse rate coupling.

Figure 24 and 25 is flow charts of the turbo coding order of removing in order to " popping " reverse rate coupling of two kinds of processing.

Figure 26 is " popping " oppositely embodiment flow chart of bit scrambling.

Figure 27 is the reduced graph of another embodiment of " popping " processing.

Figure 28 is the flow chart of another embodiment of " popping " bit scrambling.

Figure 29 is the figure of " the first interleaver buffering of reduction ".

Figure 30 A and 30B are the example figure for " the first interleaver buffering of reduction " of 10 milliseconds TTI.

Figure 31 A and 31B are the example figure for " the first interleaver buffering of reduction " of 80 milliseconds TTI.

The specific embodiment

Although preferred embodiment is to describe according to being preferred for 3GPP UTRA TDD communication system, but these embodiment can be used for other standards, CDMA 2000 (CDMA2000) for example, TD SDMA (TDSCDMA) and FDD CDMA (FDD/CDMA), and use. Preferred embodiment is illustrated by three kinds of common processing: " pushing on ", " popping " and " the first interleaver buffering of reduction " are processed. But the embodiment of the means of each processing can be used for other to be processed and other application.

Shown in the block diagram of the flow chart of Fig. 3 and Fig. 4, a kind of method that physical channel is processed is referred to as " pushing on " and processes. During " pushing on " on transmission ends processes, from each bit output of the first interleaver output buffer 82 by map (step 74) and write (step 76) in a bit of physical channel buffer 84. Data in the physical channel buffer 84 are delivered to chip rate and are processed to pass through air interface transmission. For example, a given bit of the first interleaver buffer 82 is by empty position, a position or a plurality of position of map in the physical channel buffer 84, as shown in Figure 4. Bit by map after, it is inserted in the physical channel buffer 84 of relevant position. At receiving terminal, bit is read and is write the first interleaver buffer 82 from physical channel buffer 84. Thereby " pushing on " of transmission ends processed according to being reversed of " pushing on " at receiving terminal and process. Hereinafter, " pushing on " of transmission ends mainly being described processes. Receiving terminal is similarly to be reversed.

Fig. 4 is the block diagram of an embodiment of " pushing on " processing. For the bit in the first interleaver buffer 82, the address generator 86 that pushes on is determined its destination address at the Resource Unit of physical channel buffer 84. The bit of single treatment one frame. If TTI is greater than 10 milliseconds, then the bit of other frames order behind the first frame is obtained, for example from frame 1 to frame 2 to frame 3, by that analogy. Bit can once obtain a bit or obtain with group, for example 8 bits, 16 bits or 32 bits. The address generator 86 of pushing on determines that one, a plurality of or address blank are to write physical channel buffer 84 with each bit. The address generator 86 that pushes on utilizes control parameter standardized or the signal notice to determine correct address.

Push on address generator 86 to read/write controller 78 transfer control signals. Read/write controller 78 reads a bit or multidigit unit and one bit/multidigit unit is write an address or a plurality of address by address generator 86 instructions that push on from the appropriate address in the first interleaver buffer 82. All these operations are all by 104 controls of physical map controller, and this physical map controller 104 also utilizes control parameter monitoring Physical layer to process operation.

The address generator 86 that pushes on has four main sub-devices: speed adaptation 88, bit scrambler 90, the second interleaver 92 and physical channel map device 94.

Other three sub-devices from information to these four main sub-devices that present are: radio frame segmentation calculator 96, TrCH multichannel (MUX) calculator 98 and physical channel segmentation calculator 100. These three sub-devices can not change an order functionally during Physical layer is processed. These install effectively mark bit.

Which bit address of radio frame segmentation calculator 96 definite the first interleaver buffers 82 will be transmitted with each frame. TrCH MUX calculator 98 determines which frame data by which CCTrCH is transmitted. Physical channel segmentation calculator 100 determines which bit of CCTrCH by which physical channel (Resource Unit) is transmitted. Although these three devices 96,98,100 were expressed as before the step of solicited message immediately functionating in Fig. 1, in fact they can earlier be worked, and may be before any main device 88,90,92,94 operations.

At these four main devices 88,90,92,94 of transmission ends according to sequential working shown in Figure 3. At first carry out the speed coupling. Subsequently, carrying out the bit scrambling, then is to interweave for the second time. At last, carry out the physical channel map.

In the speed coupling, quantity and assurance that bit is removed and repeats to minimize required channel take full advantage of each channel. For example, if a channel has 110 bits in the first interleaver buffer, but because the physical channel configuration needs channel to have 100 bits. Then 10 bits are removed. On the contrary, if this channel only has 90 bits in buffer, then need repetition 10 bits. Because remove and repeat, some first interleaver buffer bits can be written into address blank, individual address or a plurality of address.

As shown in Figure 5, speed adaptation 88 is determined the address that each bit of the first interleaver buffer will be in after the speed coupling. Main three variable: e-ini, e-plus and the e-minus of using of speed coupling. E-ini is the initial value of the e in the speed matching algorithm. E-plus is the increment of the e in the speed matching algorithm. E-minus is the decrement of the e in the speed matching algorithm.

Speed adaptation 88 is that convolutional encoding or turbo coding (step 106) are selected step 108 or step 110 according to concrete channel. This selection is by the control information signaling. If channel right and wrong turbo coding, bit is as a sequence processed (step 110). Turbo coding is with following three types: systematization (S), join class 1 (P1) and join each bit of a kind of mark in the class 2 (P2). On the systematization bit, do not remove. The speed adaptation is used as independently sequence processing (step 108) to each class of the bit of these classes. Process independently these bits and eliminated clear and definite demand such as and the bit set discrete to bit that illustrates in the standard.

Preferred speed matching algorithm following (step 112) about the address mapping that pushes on.

Parameter-definition:

e _iniInitial error between removal current and expection is compared

e _minusThe decrement of variable e

e _plusThe increment of variable e

Bit quantity (transmission ends) before the X speed coupling

The address of map bit after p removes or repeats

Bit address (transmission ends) before the u speed coupling

The e temporary variable keeps " error " such as mark in the standard

I sequence identifier (being S, P1 or P2)

F represents to push on and processes the function of difference, will remove the algorithm below then using if it is further resolved address p and bit u is write suitable physical channel.

ei＝eini，i
p＝0
u＝0
while u＜X

　　ei＝ei-eminus，i

　　if ei＞0 then               --normal no puncture bit

　　      perform function f(u，p)

　　      u＝u+1

　　      p＝p+1

　　else                        --else puncture

　　      u＝u+1

　　      ei＝ei+eplus，i

　　end if
end while

If will carry out repetition, the algorithm below then using.

ei＝eini，i
p＝0
u＝0
while u＜X

　　 ei＝ei-eminus，i

　　 if ei＞0 then                   --normal no repeat bit

　　        perform function f(u，p)

　　        u＝u+1

　　        p＝p+1

　　 else                            --else this is a repeat bit

　　        perform function f(u，p)

　　        p＝p+1
				<!-- SIPO <DP n="8"> -->
				<dp n="d8"/>
　　          ei＝ei+eplus，i

　　     end if

　　end while

Although described " pushing on " speed coupling in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for using UE, base station or the node B of TDD/CDMA, FDD/CDMA and TDSCDMA system.

Next step that process is the bit scrambling. Bit sequentially is rearranged to eliminate the DC deviation during bit scrambling. The bit scrambler is for determining bit scrambling address by the address of speed adaptation output.

In the bit scrambling, by coming the scrambling bit with the scramble code. The scrambling of bit is used for eliminating the DC deviation. Bit before the bit scrambling is by such as h₁、h ₂、h ₃、...、h _sExpression. S is the bit quantity among the CCTrCH, represents in addition the scrambling piece. Utilize formula 1 and 2 k the bits of determining in S the bit.

            s _k＝h _k_p _k, k=1 wherein, 2 ..., S formula 1 $p_k=(\underset{i=1}{\overset{16}{\mathrm{\&Sigma;}}}{g}_i\&CenterDot;p_{k-i})\mathrm{<figure-callout\; id="2"\; label="mod"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">mod</figure-callout>}2;p_k=0\mathrm{fork}<1;p_i=1;g=\{\mathrm{0,0,0,0,0,0,0,0},\mathrm{0,0,1,0,1,1,0,1}\}$

Formula 2

p _kK bit of scramble code. g_iI the bit of g.

Flowchart text bit scrambling process in conjunction with Fig. 6. Utilize the bit position k among the CCTrCH, determine scramble code p_kCorresponding bit, step 300. Bit h_kBy scrambling, for example by with p_kCarry out the XOR computing, step 302.

As shown in Figure 7 and among another embodiment with the flowchart text of Fig. 8, bit scrambler 90 is positioned at other devices 88,92,94 (speed coupling, second interweaves and the physical channel map) afterwards. This embodiment allows all address mappings to carry out before any operation of bit value. The bit scrambler is determined the address of given bit, step 304 after the speed coupling. The address of utilization given bit after the speed coupling, the p of scrambling bit_kBe determined step 306. Utilize determined p_k, for example by the XOR computing given bit is carried out scrambling, step 308.

Although described the scrambling of " pushing on " bit in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for UE, base station or the node B of TDD/CDMA system.

The second interleaver 92 is used for the bit that interweaves after the speed coupling. At first, the second interleaver 92 need to be known at whole CCTrCH or at the single time slot of CCTrCH and carries out interweaving the second time. This information is by high-rise signaling. In interweaving for the second time, bit reads in the mode of row, for example surpasses 30 row. After being read into array, these row are changed order. Bit reads from the row that have been changed order successively subsequently.

Illustrate that in conjunction with Fig. 9 and Figure 10 interweave with the second time. Address p after the bit address u of (after the bit scrambling) is used for determining to interweave for the second time before interweaving for the second time. Utilize known array columns, for example 30 be listed as, can determine the columns and rows (step 114) of bit in the array. As shown in figure 10, analysis is in the bit of the address 58 after the bit scrambling. By the division arithmetic address and round up, the row of bit is determined, (row 1:58/30=1 Yus 29). Can determine row by the remainder of division arithmetic. In this embodiment, determine row, row 28 (29-1) by from remainder, deducting one. Utilize known row to change order, can determine the new row (step 116) of bit. For this example, it is row 11 that row 28 change order. Bit address p (step 118) after bit number in the time slot of CCTrCH or CCTrCH and row biasing amount are determined to interweave for the second time. In this example, 7 row before the row 11 have 3 bits and 4 show 2 bits. Thereby the rear bit that interweaves for the second time is in the address 30.

Interweave for the second time although described " pushing on " in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for using UE, base station or the node B of TDD/CDMA, FDD/CDMA and TDSCDMA system.

After interweaving for the second time, the bit of each CCTrCH by map in physical channel/Resource Unit. In conjunction with Figure 11 the physical channel map is described. The physical channel map adopts different map methods for four kinds of different situations. In the first situation, a time slot only has a CCTrCH Resource Unit. In the second situation, in the time slot of downlink, use more than one Resource Unit. In the third situation, in up-link, use the spreading factor of the data in more than one Resource Unit and the first resource unit more than or equal to the spreading factor of Secondary resource unit. In the 4th kind of situation, in up-link, use the spreading factor of the data in more than one Resource Unit and the first resource unit less than the spreading factor of Secondary resource unit. In the up-link, can only there be two Resource Units to can be used for CCTrCH in the time slot. The address u that physical channel map device 100 will be inputted bit is divided into four classes (step 120).

For the first situation (time slot has a Resource Unit), bit is sequentially distributed to Resource Unit. Therefore, the bit address u after interweaving for the second time is directly corresponding to the address p (step 122) in the Resource Unit.

For the second situation (a plurality of Resource Units of downlink), bit is sequentially distributed to each Resource Unit. The first bit is distributed to Resource Unit 1, and second bit is distributed to Resource Unit 2, by that analogy until distribute to last Resource Unit. When distributing to last Resource Unit, next bit is distributed to Resource Unit 1.

Can see modular arithmetic as to each Resource Unit distribution. As shown in figure 12, three Resource Units are arranged. Filling Resource Unit is mould 3 computings. In general for N Resource Unit, utilize a modulo-N arithmetic to fill Resource Unit.

The odd number Resource Unit is from left to right filled and the even number Resource Unit is oppositely filled, from right to left. As shown in figure 12, Resource Unit 1 and 3 is from left to right filled and Resource Unit 2 is filled from right to left.

Bit is filled in this way until one of them Resource Unit is filled full. This point is referred to as transfer point. At this some place, modulus is filled full Resource Unit quantity and is reduced. Shown in Figure 12, Resource Unit 1 is filled at bit 681 places. After remaining Resource Unit was filled, Resource Unit 2 and 3 utilized Modulo-two operation to fill, from bit 684 (transfer point).

Physical channel map device is divided into following four kinds with bit: before the forward before the transfer point, the transfer point oppositely, the forward behind the transfer point and reverse (step 124) behind the transfer point. Forward represents that bit is from left to right filled and the reverse presentation bit is filled from right to left. (step 126) determined according to its classification in the address of bit.

Derive from transfer point the shortest Resource Unit length and this length multiply by the quantity of Resource Unit. As shown in figure 12, the first resource unit is 228 bit length. Transfer point is 228 * 3 Resource Units or 684. After determining transfer point, bit is forward or oppositely just can determines. For the bit before the transfer point, the address has been determined by the remainder that modulus removes in the bit address. 682 are example take the address, 682 by modulus 3 except equaling more than 227 1. Because Resource Unit is from 1 to 3 counting rather than from 0 to 2 counting, adds 1 and obtain bit in Resource Unit 2 in remainder. In order to classify, the bit in the odd number Resource Unit be the forward even number then for oppositely.

Behind the transfer point, use similarly and process. The bit address deducts its remainder of transfer point and is removed by new modulus, can determine the bit Resource Unit thus.

After bit is classified, utilize one of four formula to determine its address. For the forward before the transfer point, use formula 3.

P=Start+u/mod formula 3

Start is first address in this Resource Unit, and for example bit 0. U is the bit address after the physical channel map. P is determined Resource Unit address. Mod is the modulus before the transfer point, for example 3 in the example.

For before the transfer point oppositely, use formula 4.

P=End-u/mod formula 4

End is last address in this Resource Unit.

For the forward behind the transfer point, use formula 5.

             p＝Start+SP/mod+(u-SP)/mod _spFormula 5

SP is transfer point, mod_SPIt is the modulus behind the transfer point.

For behind the transfer point oppositely, use formula 6.

             p＝End-SP/mod-(u-SP)/mod _sp-1 formula 6

For the third situation (up-link, wherein the first resource unit has higher spreading factor than Secondary resource unit), utilization is filled into bit in the Resource Unit based on the modulus of the spreading factor of these two Resource Units. Formula 7 is used for determining this modulus.

Mod=1+max ((SF1, SF2)/min (SF1, SF2)) formula 7

SF1 is the spreading factor of Resource Unit 1 and SF2 is the spreading factor of Resource Unit 2.

As shown in figure 13, the spreading factor of Resource Unit 1 is 16 and the spreading factor of Resource Unit 2 is 4. Thereby, utilize mould 5 computings to fill Resource Unit. Therefore, Resource Unit 1 has bit 0 and 5 and Resource Unit 2 has bit 1 to 4. After Resource Unit 1 was filled, remaining bit sequentially was filled into Resource Unit 2. It is transfer point that Resource Unit 1 is filled full point. Resource Unit 1 always from left to right fill and Resource Unit 2 with reverse filling.

Physical channel map device is divided into following three kinds with bit: reverse (step 128) behind the reverse and transfer point before the forward before the transfer point, the transfer point. (step 130) determined according to its classification in the address of bit.

Transfer point utilizes formula 8 can be got by the length of first resource unit.

SP=mod* first resource element length formula 8

After determining transfer point, just can determine that bit is forward or reverse. For the bit before the transfer point, if the bit address is removed by modulus remainder is arranged, then this bit is in the Secondary resource unit. Take bit 4 as example, 4 by modulus 5 except obtaining remainder 4. As shown in figure 10, as desired bit 4 in Resource Unit 2. If there is not remainder, then this bit is in the first resource unit. Behind the transfer point, all bits are in the Secondary resource unit.

After bit is classified, utilize one of three formula to determine its address. For the forward before the transfer point, use formula 9.

P=Start+u/mod formula 9

For before the transfer point oppositely, use formula 10.

P=End-((mod-1) * (u/mod)-BN%mod) formula 10

BN%mod is the bit number take mod as mould. Mod=5 for example, then BN%mod is mod₅(bit number).

For behind the transfer point oppositely, use formula 11.

P=End-mod*SP/ (mod+1)-(u-SP) formula 11

For the 4th kind of situation (up-link, wherein the first resource unit has lower spreading factor than Secondary resource unit), same utilization is filled into bit in the Resource Unit based on the modulus of the spreading factor of these two Resource Units. Formula 7 also is used for determining this modulus.

As shown in figure 14, the spreading factor of Resource Unit 2 is 16 and the spreading factor of Resource Unit 1 is 4. Thereby, utilize mould 5 computings to fill Resource Unit. Therefore, Resource Unit 1 has bit 0 to 3 and Resource Unit 2 has bit 4. After Resource Unit 1 was filled, remaining bit sequentially was filled into Resource Unit 2. It is transfer point that Resource Unit 1 is filled full point. Resource Unit 1 always from left to right fill and Resource Unit 2 with reverse filling.

Physical channel map device is divided into following three kinds with bit: reverse (step 132) behind the reverse and transfer point before the forward before the transfer point, the transfer point. (step 134) determined according to its classification in the address of bit.

Transfer point utilizes formula 12 can be got by the length of first resource unit.

The formula 12 of SP=mod* first resource element length/(mod-1)

After determining transfer point, just can determine that bit is forward or reverse. For the bit before the transfer point, if the bit address adds 1 rear being removed by modulus remainder is arranged, then this bit is in the first resource unit. Otherwise then this bit is in the Secondary resource unit. Behind the transfer point, all bits are in the Secondary resource unit.

After bit is classified, utilize one of three formula to determine its address. For the forward before the transfer point, use formula 13.

P=Start+ ((mod-1) * (u/mod))+BN%mod formula 13

For before the transfer point oppositely, use formula 14.

P=End-u/mod formula 14

For behind the transfer point oppositely, use formula 15.

P=End-SP/ (mod+1)-(u-SP) formula 15

Utilization is for the formula of these four kinds of situations, and physical channel map device 94 is determined the Resource Unit address p of front certain the particular address u of physical channel map.

Although described " pushing on " channel map in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for UE, base station or the node B of TDD/CDMA system.

As shown in figure 15, the another kind of method of physical channel being processed is referred to as " popping " and processes. In transmission ends " popping " processes, will be imported into each bit of physical channel buffer 146 by the one or more bits (step 136) of map to the first interleaver buffer 144. For example, an address in the physical channel buffer 146 is by the address of map in the first interleaver buffer 144. Bit by map after, be inserted in the physical channel buffer 146 (step 138) by the relevant position bits that read in the first interleaver buffer 144. Data in the physical channel buffer 146 are delivered to chip rate and are processed to pass through air interface transmission. At receiving terminal, bit is read and is write the first interleaver buffer 144 from physical channel buffer 146. Thereby " pushing on " of receiving terminal processed with transmission ends " popping " and processed oppositely. Hereinafter, " popping " of transmission ends mainly being described processes. Receiving terminal is similarly to be reversed.

Figure 16 is the block diagram of an embodiment of " popping " processing. The address generator 148 of popping determines to be written to the bit of physical channel buffer 146. An advantage of " popping " thereby processing is that Resource Unit can be filled on demand and need to be cushioned physics number of channel certificates at a plurality of time slots. For example, if only transmit a Resource Unit at the first time slot of a frame, " popping " processed and can be optionally only to be this Resource Unit bit of " popping ". Thereby, pop and process and can a time slot only be arranged for the physical channel buffering is reduced to.

The bit processed of " popping " can once obtain a bit or obtain with group, for example 8 bits, 16 bits or 32 bits. These bits preferably obtain according to the order from the first bit to last bit of a Resource Unit, although bit can sequentially obtain with other. The address generator 148 of popping is determined the interior address with the bit that is read of the first interleaver buffer 144. The address generator 148 of popping utilizes control parameter standardized or the signal notice to determine correct address.

Pop address generator 148 to read/write controller 140 transfer control signals. Read/write controller 140 is from the first address that also this bit is write physical channel buffer 146 of the first interleaver buffer 144 interior determined address read fetch bits. All these operations are all by 166 controls of physical map controller, and this physical map controller 166 also utilizes control parameter monitoring Physical layer to process operation.

Be similar to " pushing on " and process, the address generator 148 of popping has four main sub-devices: speed adaptation 150, bit scrambler 152, the second interleaver 154 and physical channel map device 156.

Equally, other three sub-devices from information to these four main sub-devices that present are: radio frame segmentation calculator 158, TrCH multichannel (MUX) calculator 158 and physical channel segmentation calculator 162.

With " pushing on " process opposite, at these four main devices 150,152,154,156 of transmission ends according to sequential working shown in Figure 16. At first carry out the reverse physical channels map. Subsequently, carrying out oppositely interweaving for the second time, then is reverse bit scrambling. At last, carry out the reverse rate coupling.

Physical channel map device 156 carries out reverse physical channel map. For each the bit address in the Resource Unit, determine the appropriate address that the physical channel map is front.

The physical channel map adopts different map methods for four kinds of different situations. In conjunction with Figure 17 the physical channel map is described. In the first situation, a time slot only has a CCTrCH Resource Unit. In the second situation, in the time slot of downlink, use more than one Resource Unit. In the third situation, in up-link, use the spreading factor of the data in more than one Resource Unit and the first resource unit more than or equal to the spreading factor of Secondary resource unit. In the 4th kind of situation, in up-link, use the spreading factor of the data in more than one Resource Unit and the first resource unit less than the spreading factor of Secondary resource unit.

Physical channel map device 156 determines which kind of situation (step 168) each Resource Unit bit address is applicable to. For the first situation (time slot has a Resource Unit), bit is sequentially distributed to Resource Unit. Therefore, the bit address p in the Resource Unit is directly corresponding to the bit address u (step 170) before the physical channel map. For the second situation (a plurality of Resource Units of downlink), physical channel map device 156 is divided into following four kinds with bit: before the forward before the transfer point, the transfer point oppositely, the forward behind the transfer point and reverse (step 172) behind the transfer point. Forward represents that bit is from left to right filled and the reverse presentation bit is filled from right to left. (step 174) determined according to its classification in the address of bit.

The transfer point of odd number Resource Unit is the length of the Resource Unit of lacking most. As shown in figure 18, transfer point is 228 (length of the shortest Resource Unit). For the even number Resource Unit, transfer point is last address shorter than the length of the shortest Resource Unit in the Resource Unit. After determining transfer point, just can determine that according to its place Resource Unit bit is forward or reverse. In the odd number Resource Unit then is reverse for the forward even number.

After bit is classified, utilize one of four formula to determine its address. For the forward before the transfer point, use formula 16.

U=p*mod+ru%mod formula 16

Bit address when u is the reverse physical channels map. P is the Resource Unit address. Mod is the modulus before the transfer point. Ru%mod is the Resource Unit bit number take mod as mould.

For before the transfer point oppositely, use formula 17.

U=End-p*mod+1 formula 17

End is last address in this Resource Unit.

For the forward behind the transfer point, use formula 18.

                 u＝SP*mod+(p-SP)*(mod _sp) formula 18

SP is transfer point, mod_SPIt is the modulus behind the transfer point.

For behind the transfer point oppositely, use formula 19.

                 u＝SP*mod-(End-SP-p)*(mod _sp-1)+RU-2 formula 19

RU is the Resource Unit number of bit.

For the third situation (up-link, wherein the first resource unit has higher spreading factor than Secondary resource unit), as mentioned above, utilization is filled into bit in the Resource Unit based on the modulus of the spreading factor of these two Resource Units.

Physical channel map device 156 is divided into following three kinds with bit: reverse (step 176) behind the reverse and transfer point before the forward before the transfer point, the transfer point. (step 178) determined according to its classification in the address of bit.

Two transfer points have been used for the physical channel map of the third situation: forward transfer point (SPF) and reverse conversion point (SPR). The forward transfer point is the transfer point of first resource unit, and it equals its length, such as 228 among Figure 19. The reverse conversion point is the transfer point of Secondary resource unit, and it is determined by formula 20.

SPR=End-(mod-1) * SPF formula 20

End is last address in the Resource Unit 2.

After bit is classified, utilize one of three formula to determine its address. For the forward before the transfer point, use formula 21.

U=mod*p formula 21

For before the transfer point oppositely, use formula 22.

u＝mod*INT((LP2-ruPOS)/(mod-1)+MOD(LP2-ruPOS，(mod-1))+1

Formula 22

INT rounds operator. MOD is the delivery operator. LP2 is the rearmost point in the Resource Unit 2. RuPOS is the bit positional number of bit in the Resource Unit.

For behind the transfer point oppositely, use formula 23.

U=mod+SPF+SPR-p-1 formula 23

For the 4th kind of situation (up-link, wherein the first resource unit has lower spreading factor than Secondary resource unit), as mentioned above, same utilization is filled into bit in the Resource Unit based on the modulus of the spreading factor of these two Resource Units.

Physical channel map device 156 is divided into following three kinds with bit: reverse (step 180) behind the reverse and transfer point before the forward before the transfer point, the transfer point. (step 182) determined according to its classification in the address of bit.

The physical channel map of the 4th kind of situation is only used reverse conversion point (SPR). The reverse conversion point is the transfer point of Secondary resource unit, and it is determined by formula 24.

The formula 24 of SPR=End-first resource element length/(mod-1)

End is last address in the Resource Unit 2.

After bit is classified, utilize one of three formula to determine its address. For the forward before the transfer point, use formula 25.

U=mod*INT (p/ (mod-1))+ruPOS% (mod-1) formula 25

RuPOS% (mod-1) is the Resource Unit bit position take (mod-1) as mould.

For before the transfer point oppositely, use formula 26.

U=mod* (LP2-p)+(mod)-1 formula 26

For behind the transfer point oppositely, use formula 27.

U=mod* (LP2-SPR+1)+(LP2-p) %mod Minusl formula 27

Utilization is for the formula of these four kinds of situations, and physical channel map device 156 is determined the Resource Unit address p of certain specific bit address u of the second interleaver.

Although described " popping " physical channel map in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for UE, base station or the node B of TDD/CDMA system.

The second interleaver 154 is used for oppositely interweaving bit after the physical channel map. At first, the second interleaver 154 need to be known at whole CCTrCH or at the single time slot of CCTrCH and carries out interweaving the second time. This information is by high-rise signaling.

Illustrate that in conjunction with Figure 21 interweave with the second time. Address u after specific bit address p after the physical channel map is used for determining oppositely to interweave for the second time. Utilize bit sum in the time slot of CCTrCH or CCTrCH and row biasing amount to determine bit number in every row. Utilize address p, can determine to change the columns and rows (step 184) of bit in the order array.

As shown in figure 22, analyze the bit of the address p=61 in the physical channel buffer. Utilize bit sum and row biasing amount as can be known, row 0 have 5 bits and other show 4 bits. Utilize bit number in known every row can determine the columns and rows (row 12, row 1) of bit.

Utilize known row to change order, determine not offset row (step 186). For upper example, biasing row 12 are corresponding to not offset row 1. Utilize the bit columns and rows in the not offset array, determine bit address (step 188). For upper example, the bit address is 6.

Interweave for the second time although described " popping " in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for using UE, base station or the node B of TDD/CDMA, FDD/CDMA and TDSCDMA system.

As mentioned above, in the speed coupling, quantity and assurance that bit is removed and repeats to minimize required channel take full advantage of each channel. Speed adaptation 150 is determined the address that each bit of the first interleaver buffer will be in after the reverse rate coupling. Main three variable: e-ini, e-plus and the e-minus of using of speed coupling. E-ini is the initial value of the e in the speed matching algorithm. E-plus is the increment of the e in the speed matching algorithm. E-minus is the decrement of the e in the speed matching algorithm.

Flow chart in conjunction with Figure 23-25 illustrates the speed coupling. Speed adaptation 150 determines that the data of particular channel are the non-turbo codings such as convolutional encoding, or the turbo coding. If channel right and wrong turbo coding, bit is processed as a sequence.

Turbo coding uses following three types of bits: systematization (S), join class 1 (P1) and join class 2 (P2). On the systematization bit, do not remove. Speed adaptation 150 each class of the bit of these classes as independently the string (step 190). These bits are used as independently string manipulation not to be needed discrete such as the bit that illustrates in the standard and the bit set. This function is achieved by processing independently each sequence.

Except needs turbo coding was removed, the address computation of sequence was carried out (step 194) by the formula 28 that is used for removing and the formula 29 that is used for repeating.

Formula 28

Formula 29

U is the calculated address of the bit in the first interleaver buffer. P is the bit address before the reverse rate coupling.

The removal of the sequence of turbo coding is processed in a different manner. Shown in Figure 24 and 25, use two kinds of common methods to determine the address of these bits. In first method as shown in figure 24, S, P1 and P2 sequence are carried out independent process. Thereby, obtain one group of linear indeterminate equation. These equations can utilize the specific constraints of unknown variable to find the solution (step 198), mainly are that address u and p are constrained to the integer value. Utilize these constraints, the scope of solution narrows down, thereby for any given p, only has a u to separate. In order to implement the method, roughly estimate the removal quantity (step 200) of address u. Around estimated value, carry out the retrieval of enough scopes to determine efficient solution. Utilize the known constraints of intermediate variable to determine efficient solution (step 202).

It below is the preferred technology of using first method. Systematization bit (S) is never removed. Formula 30 has illustrated at the P1 bit and has removed in the operation for any given address u, the state of variable e. $e_1={\mathrm{<figure-callout\; id="1"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_1^{\mathrm{ini}}-u_1{e}_1^{-}+n_1{\mathrm{<figure-callout\; id="1"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_1^{+}$ Formula 30

e ₁The variable e for P1. Similarly, e₁ ⁱⁿⁱ、e ₁ ^-And e₁ ⁺The e that corresponds respectively to P1ⁱⁿⁱ、e ^-And e⁺。u ₁It is the bit number of determining address u P1 sequence before. n₁The current u of P1 sequence₁Removed bit number before the value.

Formula 31 has illustrated at the P2 bit and has removed in the operation for any given address u, the state of variable e. $e_2={\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2^{\mathrm{ini}}-u_2{e}_2^{-}+n_2{\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2^{+}$ Formula 31

e ₂The variable e for P2. Similarly, e₂ ⁱⁿⁱ、e ₂ ^-And e₂ ⁺The e that corresponds respectively to P2ⁱⁿⁱ、e ^-And e⁺。u ₂It is the bit number of determining address u P2 sequence before. n₂The current u of P2 sequence₂Removed bit number before the value.

For given p, use formula 32.

                  u-p=n ₁+n ₂Formula 32 formula 33 and 34 are verified correct through the speed matching algorithm of standard. $0<{\mathrm{<figure-callout\; id="1"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_1\&le;e_1^{+}$ Formula 33 $0<{\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2\&le;e_2^{+}$ Formula 34

Above-mentioned linear inequality comprises three equations and five unknown numbers (u, e₁、e ₂、n ₁、 n ₂). For determining the solution of these equations, estimate n₁And n₂Value. Around estimated value, carry out the retrieval of enough scopes. Determine to separate according to the constraint of equation 33 and 34.

n ₁And n₂Estimated value by the u in the formula 32 is determined by formula 35 replacement. $u=\frac{p}{\mathrm{\&gamma;}}$ Formula 35 obtains formula 36. ${\mathrm{<figure-callout\; id="1"\; label="n"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">n</figure-callout>}}_1+{\mathrm{<figure-callout\; id="2"\; label="n"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">n</figure-callout>}}_2=(\frac{p}{\mathrm{\&gamma;}}-p)$ Formula 36 γ remove ratio, and it is determined by formula 37. $\mathrm{\&gamma;}=1-\frac{e_1^{-}}{3{\mathrm{<figure-callout\; id="1"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_1^{+}}-\frac{e_2^{-}}{3{\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2^{+}}$ Formula 37

Speed coupling parameter determines that algorithm removes P1 and P2 bit equably according to standard, removes except needs have odd number. When the needs odd number was removed, P1 obtained more than one removal. The speed matching algorithm also allows to be no more than two P1 removals in delegation do not have P2 to remove simultaneously. In addition, can be no more than two P2 removals has a P1 to remove simultaneously. Therefore, obtain formula 38 and 39.

               n ₁-n ₂≤ 3 formula 38

               n ₂-n ₁≤ 2 formula 39 utilize formula 38,39 and 36, obtain formula 40 and 41. $\frac{p(\frac{1}{\mathrm{\&gamma;}}-1)-2}{2}\&le;{\mathrm{<figure-callout\; id="1"\; label="n"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">n</figure-callout>}}_1\&le;\frac{p(\frac{1}{\mathrm{\&gamma;}}-1)+3}{2}$ Formula 40 $\frac{p(\frac{1}{\mathrm{\&gamma;}}-1)-3}{2}\&le;{\mathrm{<figure-callout\; id="2"\; label="n"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">n</figure-callout>}}_2\&le;\frac{p(\frac{1}{\mathrm{\&gamma;}}-1)+2}{2}$ Formula 41 these formula are in order to determine to comprise the little subspace of solution.

For p arbitrarily, wherein will determine corresponding writing address u, the bit of this address can not removed (perhaps it can not finish) in the physical channel mapped buffer. Therefore, the value of e must be greater than e^-, obtain formula 42. $e_x^{-}<e_x<e_x^{+}$ Formula 42

Subscript x is general, because this inequality of x=1 or 2 (for P1 and P2) is all set up. Utilize formula 30 and 31, obtain formula 43. $0<e_x^{\mathrm{ini}}-(u_x+1)e_x^{-}+n_x{e}_x^{+}\&le;e_x^{+}-e_x^{-}$ Formula 43

Only having the u of working as is a P_xFormula 43 is just set up during bit. When u is not P_xUse formula 44 during bit. $0<e_x^{\mathrm{ini}}-(u_x+1)e_x^{-}+n_x{e}_x^{+}\&le;e_x^{+}$ Formula 44 uses formula 45 and 46 in order to determine efficient solution. ${\tilde{e}}_1=e_x^{\mathrm{ini}}-({\mathrm{<figure-callout\; id="2"\; label="u"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">u</figure-callout>}}_2+1)e_2^{-}+n_2{\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2^{+}$ Formula 45 ${\tilde{e}}_2=e_s^{\mathrm{ini}}-({\mathrm{<figure-callout\; id="2"\; label="u"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">u</figure-callout>}}_2+1)e_2^{-}+n_2{\mathrm{<figure-callout\; id="2"\; label="e"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">e</figure-callout>}}_2^{+}$ Formula 46 carries out range check subsequently. If u is the P1 bit then uses formula 47. $(0<{\tilde{e}}_1\&le;{e_1^{+}-e}_1^{-})$ And $(0<{\tilde{e}}_2\&le;e_2^{+})$ If formula 47 u are P2 bits then use formula 48. $(0<{\tilde{e}}_1\&le;e_1^{+})$ And $(0<{\tilde{e}}_2\&le;e_2^{+}-e_2^{-})$ If formula 48 u are S bits then use formula 49. $(0<{\tilde{e}}_1\&le;e_1^{+})$ And $(0<{\tilde{e}}_2\&le;e_2^{+})$ Formula 49

As shown in figure 25, below be second method. According to the position of u, can determine speed coupling input bit position p. Determine that system is than (step 204). System is than the removal ratio that depends on P1 and P2 sequence. The bit S of estimation system_bitsQuantity, for example by formula 50 (step 206). ${\tilde{S}}_{\mathrm{bits}}=u/(1+{\mathrm{<figure-callout\; id="1"\; label="P"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">P</figure-callout>}1}_{\mathrm{PR}}+{\mathrm{<figure-callout\; id="2"\; label="P"\; filenames="Y0223118300411.png,Y0223118300431.png"\; state="\{\{state\}\}">P</figure-callout>}2}_{\mathrm{PR}})$ Formula 50

The estimation quantity of system's bit. P1_PRThe removal ratio of P1 sequence, P2_PRIt is the removal ratio of P2 sequence.

Suppose that four kinds of situations depend on the order of bit (S, P1, P2 are forward, and S, P2, P1 are reverse). S is

Initial estimated value. The value representation of various situations is in table 1.

Table 1

The row top	Forward S P1 P2			Reverse S P1 P2
							S	S	S-1	S-1	S	S-1	S-1
S	S	S-1	S	S-1	S
						S		S	S	S	S	S
S+1	S	S	S+1	S	S
						P1		S	S	S	S	S	S
S	S+1	S	S	S+1	S
							S	S+1	S+1	S+1	S+1	S
S+1	S+1	S+1	S+1	S+1	S+1
							P2	S	S	S	S	S	S
S	S	S+1	S	S	S+1
						S+1		S	S+1	S	S+1	S+1
S+1	S+1	S+1	S+1	S+1	S+1

According to the type (row top) of analysis bit, the suitable four lines of option table 1. Take the P2 bit as example, select last four lines (for row top P2). If bit is forward, use leftmost row. If bit is oppositely, use rightmost row. Utilize suitable four lines and three suitable row of this row, the output index of every row can be determined. Take forward P2 bit as example, use four kinds of situations (situation 1-S, S, S; Situation 2-S, S, S+1; Situation 3-S+1, S, S+1; Situation 4-S+1, S+1, S+1).

These four kinds of situations are used for calculating four kinds of possible outcomes (step 208) of outgoing position. The bit number that is removed of determining every kind of possible outcome is illustrated in the table 2. Table 2 has also represented to export the computational methods of bit position.

Table 2

P1 _PbitsIt is removed P1 bit number. P2_PbitsIt is removed P2 bit number. P1_Pbit sinI is initial p 1 bit number. P2_Pbit sin i Initial p 2 bit numbers.

The bit number of bit positional representation S, P1 and P2 may be exported in first of the actual output of coupling bit position. Utilize this information, determined input bit position p (step 210).

Although described " popping " speed coupling in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for using UE, base station or the node B of TDD/CDMA, FDD/CDMA and TDSCDMA system.

Next step that process is reverse bit scrambling. The bit scrambler is for determining bit scrambling address by the address of the second interleaver output.

In conjunction with the reverse bit scrambling of the flowchart text of Figure 26 process. Utilize the bit position k among the CCTrCH, determine scramble code p_kCorresponding bit (step 400). Bit h_kBy scrambling, for example by with p_kCarry out XOR computing (step 402).

Although can be in the line position unit scrambling of advancing of reverse rate coupling, as shown in figure 27 and with the flowchart text of Figure 28 like that, the bit scrambling is carried out after being preferably in the reverse rate coupling. This embodiment allows all address mappings to carry out before any operation of bit value. The address (step 404) of (before the reverse rate coupling) after determining to interweave reverse for the second time of given bit after the reverse rate coupling. Utilize the address of given bit after oppositely interweaving for the second time, the p of scrambling bit_kBe determined (step 406). Given bit utilizes determined p_kBy scrambling, for example by with p_kCarry out XOR computing (step 408).

Although described the scrambling of " popping " bit in conjunction with a preferred TDD/CDMA communication system, it can be used for various application, for example is used for UE, base station or the node B of TDD/CDMA system.

The another kind of processing reduced the first interleaver buffering and has been referred to as " the first interleaver buffering of reduction ". Figure 29 is the block diagram of " the first interleaver buffering of reduction ".

As shown in figure 29, the output of the first interleaver 212 is not directly to deliver to the interleaver buffer. All Physical layer buffer tables are shown among Figure 29, by one independently public internal memory 220 finish. The transport channel data piece is provided in a frame or multiframe. This characteristic is by the TTI parameter characterization. TTI can have four kinds of possible values: 10,20,40 and 80 milliseconds. 10 milliseconds TTI represents data corresponding to 1 frame, and 20 milliseconds TTI represents 2 frames, and 40 milliseconds TTI represents 4 frames, and 80 milliseconds TTI represents 8 frames. The data of TTI the first frame can directly be sent to physical channel processor 218. Other frames of TTI are cushioned in order to the later stage and process. Thereby whole the first interleaver buffering is lowered a frame. For example, if TTI is 10 milliseconds, a frame directly is stored in the physical channel buffer, does not need the first interleaver buffering. For 80 milliseconds TTI, seven frames rather than eight frame data need storage.

" the first interleaver buffering of reduction " is preferably used in " pushing on " processing that Physical layer is processed. Thereby after data were exported from the first interleaver 212, it was written into the appropriate address of physical channel mapped buffer, although can use other Physical layer processing method. If in physical channel is processed for example the speed coupling and interweave for the second time after use intermediate buffering place, use the Physical layer processing method, still can use the interleaver buffering of reduction. The data of the first frame directly are sent to Physical layer and process and be stored in the intermediate buffer.

As shown in figure 23, the bit of all frames is input in the MUX 214. The one MUX 214 is sent to the 2nd MUX 216 to be carried out the physical channel processing by physical channel processing block 218 with the bit of the first frame. The bit of other frames is if TTI greater than 10 milliseconds, is sent to internal memory 220 (the first interleaver buffering) by a MUX 214. The bit of the first frame is sent to chip rate and processes to pass through air interface transmission subsequently. Thereafter the bit of frame obtains to carry out the physical channel processing through the 2nd MUX 216 from internal memory 230. All these operations are by 222 monitorings of physical channel controller.

Figure 30 A and 30B represent the data flow of the first interleaver of reduction " buffering " of transport channel data piece of 10 milliseconds TTI (frame). The transport channel data bit directly is transferred to physical channel processor 218 and then is transferred to the physical channel buffer and processes with the chip rate that carries out subsequently, and does not use the first interleaver buffering. Shown in Figure 30 A, frame N directly is transferred to physical channel processor 218. Shown in Figure 30 B, next frame (frame N+1) also directly is transferred to physical channel processor 218.

Figure 31 A and 31B represent the data flow of the first interleaver of reduction " buffering " of transport channel data piece of 80 milliseconds TTI. The transport channel data of the first frame (frame N) is sent to Physical layer and processes and be stored in the physical channel buffer (internal memory 220). Other frames (frame N+1 is to N+7) are processed by Physical layer and are stored in the physical channel buffer. In the frame below shown in Figure 31 B, (frame N+1) is sent to Physical layer and processes and be stored in the physical channel buffer. Other frames (frame N+2 is to N+7) are sequentially processed in the mode identical with lower six frames. The frame reading out data bit of chip rate processor after physical channel buffer present frame. For example, if physical layer processor processes (frame N+1) then the chip rate processor reads frame N. 20 is the same with 80 milliseconds above-mentioned processing with the data processing method of 40 milliseconds TTI. Unique difference is the frame number that is cushioned before the physical channel buffering.

Claims (4)

1. time division duplex/CDMA subscriber equipment is characterized in that, comprising:

The first buffer is at the first address buffer bit;

The second buffer is at the second address buffer bit;

The read/write controller is operably connected to the first and second buffers, and the read/write controller writes the second address of the second buffer from the first address read fetch bit of the first buffer of bit unit and with this bit, and the read/write controller can change bit value;

Address calculator is operably connected to the read/write controller, and address calculator utilizes the first address of bit to determine the second address of this bit; And

Address calculator comprises that a bit scrambler is in order to by determining the value of this bit with corresponding scramble code bit unit this bit of scrambling.

2. time division duplex as claimed in claim 1/CDMA subscriber equipment is characterized in that, the first buffer is the first interleaver buffer and the second buffer is the physical channel buffer.

3. time division duplex/CDMA base station is characterized in that, comprising:

The first buffer is at the first address buffer bit;

The second buffer is at the second address buffer bit;

The read/write controller is operably connected to the first and second buffers, and the read/write controller writes the second address of the second buffer from the first address read fetch bit of the first buffer of bit unit and with this bit, and the read/write controller can change bit value;

Address calculator is operably connected to the read/write controller, and address calculator utilizes the first address of bit to determine the second address of this bit; And

Address calculator comprises that a bit scrambler is in order to by determining the value of this bit with corresponding scramble code bit unit this bit of scrambling.

4. time division duplex as claimed in claim 3/CDMA base station is characterized in that, the first buffer is the first interleaver buffer and the second buffer is the physical channel buffer.

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