CN2482150Y - Learning reactive information real-time testing analyzer - Google Patents

Abstract

The utility model relates to a study response information real-time test analysis device, which consists of a host computer formed by connecting with a teacher machine, a printer, a display and a communication controller, as well as a terminal data collector, and a computer test question supervisor formed by connecting with a test question machine, a video frequency divider, a test question display. The connection is that the teacher machine is connected with the printer and the controller through a data line and a data bus, and is connected with a terminal machine, the video frequency divider and the test question machine through a serial communications line, a TVGA line, and a R232 signal line. The data collecting speed of the device is fast, the function is perfect, the anti-interference ability is strong, and the analysis processing level of the data information is high.

Description

The study reaction information real-time testing analytical equipment

The utility model is a kind of study reaction information real-time testing analytical equipment, belongs to the communication technical field that microcomputer (microcomputer) is used, particularly the microcomputer serial parallel Control on Communication and the information processing technology.

Because Modern Education Technology is the method for the whole teaching process under a kind of design, enforcement and the evaluation specific objective, it is on the basis of the mankind to study and propagation, and the human and inhuman resource of integrated application is to obtain more efficiently teaching.So phenomenon, relation and rule that the research people carry out being produced in the educational communication process of learning aid in the utilization modern information transmission means are the important contents of education skill science, and the modern research method and the equipment and the device of enforcement thereof are absolutely necessary.In addition, in pedagogical studies, research student's the study reaction information that comprises score information and reaction time information carries out real-time feedback and analyzing and processing efficiently, and is described in mode intuitively, and only in this way, the conclusion of research is just convincing.Therefore, need corresponding device for testing and analyzing.So development study reaction information real-time testing analytical equipment is in order to satisfy the needs of Education Technology development, its development also will play a part positive with scientific, the technicalization of using whole educational research.Yet, though similar device is arranged both at home and abroad at present, there is serious defective on its function, some can not use basically.It mainly comprises following defective and deficiency: the information acquisition of (1) existing similar device and the hardware technology of processing fall behind.Existing similar device hardware generally adopts DLC (digital logic circuit), though some has adopted low computer, as APPLE or Z80 microcomputer, but it is replied terminating machine and all still adopts simple mechanical key or simple logical circuit to handle, therefore, slow, poor anti jamming capability, failure rate height of the speed of data acquisition, reply terminal unmanned plane dialogue function etc.; (2) existing similar device test function is single, can only carry out the synchronism detection of traditional medium, carries out synchronism detection and can not carry out being set a question by computer control, more can not carry out asynchronous random test; (3) existing similar device function imperfection, the data message analyzing and processing level of being gathered is lower.As not showing and hard copy response analysis curve, can not carry out T-R two dimensional analysis processing etc., therefore, can't satisfy the needs of Modern Education Technology discipline development.

The purpose of this utility model is exactly to fall behind for the above-mentioned relevant hardware technology that overcomes existing study reaction device for testing and analyzing existence, acquisition speed is slow, poor anti jamming capability, the failure rate height, test function is single, the function imperfection, not only unmanned plane dialogue function but also data message analyzing and processing level are lower, can't satisfy the shortcoming and the problem of the needs etc. of modern educational science development, research, it is fast to design a kind of acquisition speed, perfect in shape and function, the synchronous Dan Xuan that can prescribe a time limit replys test, free order Dan Xuan replys test, reply Intelligent Terminal, antijamming capability is strong, data message analyzing and processing level height, can fully satisfy the study reaction information real-time testing analytical equipment of science of education development need.

The utility model is realized by following structure technology scheme: the block diagram of study reaction information real-time testing analytical equipment as shown in Figure 1, the computing machine test questions management machine that the main frame that it is connected and composed by teacher computer, printer, teacher's display, communication controller, terminal data harvester (by many student terminal machines and connect constitute) and examination question machine, examination question display, video distributor, examination question display (many) connect and compose connects and composes jointly, and its interconnected relationship is; Teacher computer is connected with printer by the multicore data signal line and is connected with teacher's display by the TVGA signal wire, teacher computer is connected with communication controller by the long numeric data bus, communication controller is connected with the terminal data harvester by the serial communication line, teacher computer is connected with video distributor by the TVGA-TV signal wire, and be connected with the examination question machine by the R232 signal wire, the examination question machine is connected with video distributor by the examination question signal wire and is connected with the examination question display by the TVGA line, video distributor is connected with other examination question display by the TVGA line of 75 Ω concentric cable, and this main frame can be finished system management, control, information receives in real time, handle, analyze and store function.The terminal data harvester is a distributed communication network machine that is composed in parallel by each student terminal machine, session window and push-button array function key and options button are one by one arranged on the terminating machine panel, function key comprises affirmation, reports for work, browse, withdraw from or cancellation etc., options button has ten options buttons of A～J or 1～0, can accept student's input topic number, response value and with the response result storage with show that the student can arbitrarily browse, revise reacting value.Computing machine test questions management machine divides I type and II type device, consider for low cost, I type device adopts unit work, be teacher computer itself be main frame be again the examination question machine, its working method is by video distributor test question information to be delivered to the examination question display, II type device adopts teacher computer and the work of examination question machine two-shipper, and it is made of a teacher computer, examination question machine, video distributor and many bench teats topic display.Examination question display of apolegamy on general each student seat is installed a cover test questions management software in the examination question machine, functions such as examination question typing, modification, demonstration in real time are provided for the teacher.During test, directly show examination question or show that by teacher computer control examination question machine examination question and test carry out synchronously by teacher computer.

The block diagram of communication controller as shown in Figure 2, it is by IBM PC microcomputer socket, decoding scheme, the two-way data communication control circuit, the programmable parallel communication interface chip, 51 singlechip CPU, address latch, the ROM memory, the RAM memory, code translator, IRQ interrupts the application circuit, the serial communication driving circuit connects and composes jointly, its interconnected relationship is: IBM PC microcomputer socket is connected with decoding scheme with the address strobe line by the control signal interconnection respectively, decoding scheme is connected with the two-way data communication control circuit by control line and decoding output line respectively, IBM PC microcomputer socket also is connected with the two-way data communication control circuit by data bus, the two-way data communication control circuit passes through control line respectively, Interface status line and data line are connected with the programmable parallel communication interface chip, programmable parallel communication interface chip passes through data line respectively, control line, be connected with 51 singlechip CPU, programmable parallel communication interface chip and 51 singlechip CPU by data bus respectively with address latch, the ROM memory, the RAM memory is connected, 51 singlechip CPU are connected with ROM memory and RAM memory respectively by the address strobe line, address latch is by address strobe line and ROM memory, the RAM memory is connected, and be connected with the programmable parallel communication interface chip by address wire, 51 singlechip CPU are connected with code translator by the decoded signal incoming line, code translator is connected with programmable parallel communication interface chip and RAM memory by the decoded signal output line, 51 singlechip CPU are interrupted the application circuit by the look-at-me line with IRQ and are connected, and respectively by the transmitting-receiving select lines, the transmitting-receiving drive signal line is connected with the serial communication driving circuit, and IRQ interrupts the application circuit and is connected with IBM PC socket by the interrupt request singal line; The circuit theory diagrams of communication controller as shown in Figures 3 and 4, wherein: decoding scheme by with gate inverter IC1, IC2, code translator integration member IC3, inverter ic 11C, IC11D, resistance R 3, the parallel-series of R4 phase connects and composes, the two-way data communication control circuit is connected in parallel by ternary data address latch parallel interface integration member IC4～IC6 and constitutes, the programmable parallel communication interface chip is programmable I/O sets of interfaces member IC7,51 singlechip CPU are by single chip microcomputer IC8, crystal oscillator CR1, capacitor C 1, the C2 formation that is connected in parallel, address latch is address latch integration member IC10, the ROM memory is memory under program integration member IC12, the RAM memory is data memory integration member IC9, code translator is code translator integration member IC13, IRQ interrupts the application circuit by inverter ic 11A, IC11B, the common connection in series-parallel of resistance R 1～R2 connects and composes, and the serial communication driving circuit is connected in parallel by communication driver integration member IC15～IC17 and constitutes.The principle of work of communication controller is: 51 single-chip microcomputers are the controller that exchanges with main frame, are again the servers of single chip communication.IC7 work in two-way input and output A mouth mode of operation 2,51 single-chip microcomputers by serial line interface and parallel interface respectively with each terminating machine and host exchanging data.The data communication of controller and main frame is that the mode with interrupt inquiry realizes, promptly main frame can be carried out tasks such as real-time demonstration, timing, data pre-service, data deposit, printing as a result at ordinary times, and can get in touch with terminating machine to controller transmission order at any time.When main frame and controller carry out two-way data communication, 51 single-chip microcomputers are sent out interrupt request singal by the P1.1 of its P1 mouth to main frame, look-at-me is received the idle interrupt source of main frame I/O expansion line IRQ10 by IC11, response of host enters interrupt service routine after interrupting, the data of interface is read in, and does pre-service.When main frame when controller sends data or order, earlier by the I/O data bus, read the C mouth state of IC7 by IC6,, illustrate that the data of last transmission are removed if PC5 is invalid, main frame can pass through data bus, gating IC5 delivers to parallel port with data, and the INT signal is effective simultaneously, makes PC4 (STBA) produce a gating signal, (IBFA is changed to effectively this signal, IBF with PC5 _A=1), the 51 single-chip microcomputers C mouth state that reads IC7 is learnt IBF _A=1, the A mouth of reading IC7 again can read in controller with data.When controller whenever collects the response data of certain terminal, can send to main frame and interrupt the application signal, 51 single-chip microcomputers enter the inquiry communication state with main frame then.Single-chip microcomputer is the PC71 (OBF of inquiry IC7 earlier _A) the pin state, if OBF _AInvalid (OBF _A=1, initial state is OBF _A=1), illustrating last 8031, to send to the data of main frame removed, and single-chip microcomputer can be sent out data again, and data are write the A mouth of IC4, and this makes the OBF of PC7 _A=0.Main frame is learnt the PC7 (OBF of IC7 by the data line state of reading IC6 _A=0), reading IC4 again can read in A mouth data, and meanwhile the INT signal of IC4 makes OBF _AReturn to original state.Parallel port adopts part address decoded mode, and IC4～IC6 corresponding address is respectively 2F0H～2F2H.And for IC7, the address space of 8031 external RAMs that in fact account for: 8000～9FFFFH, native system only use 8000H～80003H wherein.Each 8K of its expansion ROM and RAM, address realm are 0000～1FFFH.

The student terminal machine is formed frame principle figure as shown in Figure 5, it is connected and composed jointly by matrix keyboard, single-chip microcomputer, communication driving interface, memory, display driver, display, its interconnected relationship is: matrix keyboard is connected with single-chip microcomputer by the keyswitch signal wire, single-chip microcomputer is connected with the communication driving interface by the transmitting-receiving drive signal line, and be connected with memory and display driver respectively by data address bus, display driver is connected with display by display signal line.The circuit theory diagrams of student terminal machine as shown in Figure 6, wherein: matrix keyboard is 8 * 2 matrix keyboards, it is by button KRY, K1～K16, resistance R K1, RK2 is in parallel and connects and composes, single-chip microcomputer is by single chip microcomputer IC18, capacitor C 3, resistance R 5 connects and composes, the communication driving interface is by communication driver integration member IC25, socket 2U1, capacitor C 4 formation that is connected in parallel, memory is by memory integration member IC19, the IC20 formation that is connected in parallel, display driver is by driver integration member IC21, IC23, switch EE, the socket ZDS formation that is connected in parallel, display is 4 light-emitting diode displays.Its principle of work is: the data acquisition of terminating machine is undertaken by keyboard, forms one 8 * 2 matrix keyboard by P1 mouth and P3.2, the P3.3 of IC18.The external interrupt mode is adopted in the response of key, and low level triggers.The P3.2 of IC18, P3.3 are with drawing 5V, P1 mouth to put low level on the resistance when powering on, when having key to press, connect P3.2 or P3.3 mouth, level is dragged down, terminating machine produce to interrupt, and changes interrupt service routine over to, and the state of P1 mouth is read in, the key assignments that reads in be 0～9 o'clock be numerical key, be function key during A-F.For example during synchronism detection, the light-emitting diode display of terminating machine is by two demonstration numbers of setting a question of IC21 output on the left side, first on the right shows 0 value, this moment, the respondent keyed in a numerical key, promptly on the right first show, as confirm errorless, can press " affirmation " key, the primary numerical value in the right becomes " 0 " immediately, and terminating machine is sent to controller with response value, and the rest may be inferred in the data acquisition of other test mode.

Principle of work of the present utility model is: device is to declare controller that single chip microcomputer or 51 compatibles constitute as server by establishing in the PC microcomputer interface card with 51, serial line interface by single-chip microcomputer is realized and the communication of student terminal machine, it adopts differential driving full duplex technology of serial communication, utilize the high-low level control transmitting-receiving of controller output, each student terminal machine is by software setting serial port control register SM2 position, make each machine enter the multi computer communication state, and make student terminal machine multi computer communication mode for receiving by exporting a low level, when main frame is called out certain student terminal machine, after being exhaled student's machine to check address code to conform to, promptly under software control, make this student's machine withdraw from the multi computer communication mode, enter dual-machine communication simultaneously with controller, carry out required contact and reply; Student terminal machine data collection keyboard mode, strong value response realizes with outer interrupt mode, when the key of P1 mouth is pressed, produce an application interruption pulse, after the interrupt response, promptly change the keyboard interrupt service processing over to, the state of P1 mouth is read in, device is when the synchronism detection pattern, available computers is shown test question, earlier provide software for editing with the examination question editor before the test with this device, deposit in the test item bank, showing test question can adopt the examination question machine to deposit, show examination question or with main frame double as examination question display machines dual mode, depositing with the examination question machine, when showing the examination question mode, when showing examination question with host computer control examination question machine, after in the main frame menu, selecting " computing machine shows examination question; test simultaneously " item, under software control, serial port by main frame sends the order that shows examination question to the examination question machine, after the examination question machine receives orders, promptly by prior input sequence, from test item bank, read examination question, be shown on the screen, vision signal is assigned on the display of each student terminal machine through divider then, when with main frame double as examination question display machines, its test questions management mode is with to show the test questions management mode with host computer control examination question machine identical, just single host work, and need not the two-shipper serial communication; Wherein Zhuan Zhi principle of adjustment and control is: operation application software package executive program carries out test-types and selects, move test questions management simultaneously for II type device, test master menu according to test-types, select test questions management then to carry out the examination question typing, browse, revise, append, deletion etc., choice criteria answer management can provide model answer information--topic number, the standard reaction value, time limit is also detected the duty of terminating machine, select data acquisition to report for work, registration and with the communication of examination question machine with gather reacting value, recording reacting time, the choice reaction data processing adopts the response message analytic approach that the primitive reaction information of document form record is handled, and returns the master control menu at last and withdraws from this device; The program Solidification method of communication controller (parallel communication interface card) is: with 51 serial single chip microcomputers and Software tool thereof program is write in the single chip microcomputer integrated circuit (IC) 8, the socket that then the EPROM chip that is cured is inserted interface card IC8 correspondence just can, the EPROM of this card can wipe rewriting, parallel, serial and supervision and management program that it is solidified with this device comprise main frame main control module, interface enquiry module, the Registration Module of reporting for work, syn ack test module, asynchronously reply test module, data send and interrupt receiver module.

The artificial demonstration exercise question synchronism detection analysis that this device has, computing machine show the analysis of exercise question synchronism detection, manually show that function such as the asynchronous random test analysis of exercise question finished by the corresponding software of application software package respectively, and the device application software bag is made up of the corresponding software kit module of application software package, controller and the terminating machine of main frame respectively.The host application software bag is mainly by knowing that eight cover application software shown in Figure 7 form; The single-chip microcomputer server software is divided into main control module, teacher computer interface enquiry module, the Registration Module of reporting for work, Dan Xuan and multiselect are replied test module, asynchronous Dan Xuan and multiselect and replied test module, data communication module synchronously; The terminating machine management software is divided into keyboard management and display module, the Registration Module of reporting for work, Dan Xuan and multiselect are replied detecting information typing module, asynchronous Dan Xuan and multiselect and replied detecting information typing module, data communication module synchronously.The application software package of this device adopts hierarchical structure, i.e. tree." menu tree " by functional analysis and decomposition module, formation application software packet function and correlationship thereof.In this tree, each functional module is called node, adjacent two-layer node connects the relation that has shown them, the upper strata node is called the father node of lower floor's node, and the node of following one deck is called the child node of upper strata node, the node that has only child node and do not have father node is root node, the top-level functionality of its representative system.Therefore, to should just being converted into description with the structrual description of software package to the relation of its menu structure.Carry out program design according to the said procedure structrual description, tree root (top-level module) is a ground floor master control menu, be TEST.BAT module (batch program), as shown in Figure 7, branch (second layer module) is " submodule ", promptly respectively overlap the entity of application software, as shown in Figure 8, leaf (the 3rd layer of module) then is the submodule of application program, " submodule " arranged again under the submodule, the hierarchical structure degree of depth can reach four layers, the user enters the respective application software master menu of SRITS after moving the TEST.BAT program automatically, and indicates all module titles of second level, is selected to enter a certain second level so that modules such as tri-layers according to test-types by the user, also can whether withdraw from this level, withdraw from proving installation at last by user's decision.Fig. 9 is one of the 3rd layer of module of this device, i.e. data qualification processing module.Each application software in the application software package both can be moved by the TEST.BAT link also can isolated operation.During running software, call step by step from top to bottom, return then saturating level from bottom to top and return.Can splice by the difference requirement between each module, and stay the software interface that expands mould partial function module, under WM DOS6.0 environment, select the menu operation mode by window type Chinese drop-down menu and key, a close friend's user interface and environment for use is provided for the user.

The realization function of each functional module of application software of this device is as follows: the test questions management module is that computing machine shows that the examination question machine is peculiar, and it moves on main frame to I type device, and to II type device, it moves on the examination question machine.It can be finished necessary session information, examination question file input internal memory, serial port initialization, carries out the half-duplex serial communication with main frame, receive Host Command data, echo check sign indicating number etc., realize finishing with the coordinate synchronization work of main frame, jointly test assignment, read clock and contents of test question in real time; Can realize setting up that examination question file, contents of test question are browsed, modification, examination question exercise question deletes, append, demonstration in real time; The SOT state of termination detection module can provide the works fine status function of 64 end reactors of automatic detection to the user, and testing result can be shown until printing, and arranges the foundation of student seat and terminal maintenance as the teacher; The model answer administration module can comprehensively manage test question purpose model answer information (answer value, weight or score, time limit), to the user furnish an answer that typing, answer inquiry, answer are browsed, function such as answer modification, answer deletion, answer are appended, answer printing.Can the model answer information of 100 problems be managed, can be that computer data acquiring, data processing or teacher's ex-post analysis provide foundation with file or print form; Data acquisition module can be finished with the examination question machine communicate by letter (for II type device), report for work registration, data acquisition; Show man-machine conversation, student response matrix table in real time or show information such as examination question (for I type device), real-time clock in real time; Show, print reaction result (for synchronism detection), data deposit of each topic etc. in real time.Can gather the reaction result (reacting value and reaction time) of 64 students simultaneously to 100 problems; Data processing module can carry out classification analysis to reply data according to the response message analysis theories to be handled, can show, write down the printing following message: the registration form of reporting for work, seat number---the numbering table of comparisons, school's response situation, the correct response situation, the student response timetable, student performance table, student-problem list (comprising S line and P line), student's score percent, student's warning coefficient, problem score percent, problem warning coefficient, problem response situation table.Can be under VGA high resolving power mapping mode, show collective's response curve (response curve, just answer curve), the T-R plane.The user can select gray scale, black and white, counter-rotating printing type by 1/2/4 magnification ratio graphic printing to be come out; Data merging submodule is mainly used in the student response terminal and because of the cost problem less occasion is installed, and the synthetic large sample of small sample can be carried out analyzing and processing, thereby improve the confidence level of result of study; The reply data enquiry module is a supplementary module, and the response result of inquiry certain or certain type student and certain or certain class problem is provided to the teacher.

The main software program of this device is as follows: host data capture program process flow diagram as shown in figure 10; the host data capture program is as follows: before program enters real time data acquisition; at first carry out initialization, the answer that settles the standard is originated, is imported the preliminary examination date, protects former DOS interrupt vector, inserts new interrupt vector pointer and allow IRQ10 to interrupt promptly carrying out system break to interrupt vector table and just change.For II type device, also to carry out initialization to serial port, the communication speed of 1200 baud rates is set, after device interrupted initial work, promptly the start-up control device was reported for work and is registered and test.Reporting for work is registered as an infinite loop program, press stop key after, stopping to report for work enters test phase, the user selects " Y " or " y " to test; The program flow diagram of interrupt service routine as shown in figure 11, the information frame among the figure is the data that once send or receive, its form is:

Slave addresses

Topic number value

Reacting value

1

Reacting value 2

……

Reacting value N

Each is all with a byte representation, and the length of frame is decided on test-types, and synchronously the information frame of Dan Xuan is the shortest, has only 2 bytes (being address, seat, reacting value), and asynchronous multiselect the longest has a plurality of bytes (seat number, topic number value and several reacting values).After information frame receives, be i.e. with reaching the data type carried out pre-service during problem identificatioin reaction, and send acknowledgement field to deposit; The working routine process flow diagram of controller wherein wraps and has expanded controller and main frame parallel communication program as shown in figure 12, and initialization refers to the 1. baud rate of setting data harvester; 2. set interrupt priority level; 3. the value of setting the SP stack register is 60H; be in the shutdown armed state behind the device electrification reset; only receive the order that main frame sends here and just enter further work, whenever receive behind the command frame all to main frame loopback one check code, with the correctness of assurance device work.Shutdown is awaited orders promptly constantly the state of the C mouth of inquiry IC7 to determine next step work.If input buffer is invalid, then read in the data of A mouth.Data are then start-up control device work of startup command, and the acceptance test type command, continue to await orders otherwise return.Controller turns to corresponding program module according to test-types, from then on enter with the terminal cluster row communication and with the inquiry communication state of main frame; The data acquisition program process flow diagram of terminating machine as shown in figure 13.

The utility model compared with prior art has following advantage and beneficial effect: (1) does not add any modulation because communication of the present utility model transmits data, so data transfer rate equals baud rate.Computing formula by 8301 single-chip microcomputer baud rates: baud rate=2 ^SMOD/ 32 * master oscillator frequenc/[12 * (256-TH1)], TH1 is the timing constant of 8031 single-chip microcomputer Timer 1 in the formula, SMOD is the model selection value, optional 0 or 1, in this device, select 1, the time constant of TH1 is selected FCH, is about 7.8KBit so try to achieve baud rate; The scanning access mode of variable cycle is adopted in the communication of this device, promptly determines the scan period according to the number quantity of reporting for work.Few more scan period of people is short more, and when data collection station seat in the plane number was maximum 64, its run-down cycle was 0.516 second, and free sequential answering test period is 0.590 second, and therefore, the acquisition speed of this device is fast; (2) this device hardware technology advanced person, antijamming capability are strong; (3) this apparatus function is perfect: 1. can manually show exercise question, in limited time spacer step Dan Xuan replys test, existing equipment can be overcome and the shortcoming of student response situation can't be intuitively observed in real time, in test process, can be presented at student's real time reaction response value on the screen, when a topic test time limit later or control personnel when withdrawing from the test of this subject in advance, this device comes out time and the curve that reacts immediately with screen display and printing type visualize.Reaction information can also be carried out simultaneously " T-R plane ", " S-P " table and time series analysis curve processing; 2. can show exercise question by computing machine, the synchronous Dan Xuan that prescribes a time limit replys test, can overcome the existing apparatus problem of automatic problem building synchronously, make set a question and test process all under automated manner, carry out, guaranteed that data that test process gathers accurately and reliably, more favourable research student's study, cognitive information, and have 1. processing capacity equally; 3. manually show exercise question, free order Dan Xuan replys test.But this test mock standard examination form is carried out, and the respondent can number reply according to actual selection topic, does not need to be undertaken by the paper order.To the processing of learning information with 1. function is identical; 4. manually set a question, free order multiselect is replied test.But this test mock standard examination form is carried out, and the respondent can number reply according to actual selection topic, does not need to be undertaken by the paper order.The response value of every topic can select can reach at most 10; 5. reply Intelligent Terminal.This device is replied terminal and is all used high-grade single chip microcomputer to handle, and has good man-machine conversation ability, and when replying test in limited time, the respondent can revise the selective value of oneself at any time in this subject official hour.When free sequential answering was tested, the respondent can check, revise selection at any time in the test duration of regulation; (4) this device can fully satisfy the needs of science of education development to data message analyzing and processing level height.The communications protocol advanced person of this device, convenient succinct for making program design, highly versatile, the data frame format structure that the communication of this device sends adopts unified elongated pattern, promptly

Data packet length

Packet

Check code

Check code in the form adopts and adds up and complementary, because of having adopted unified data frame format, no matter so single-chip microcomputer server or the data collection station machine can adopt unified router, but because of principal and subordinate's machine difference and test form difference, its data length is difference to some extent.According to above-mentioned communications protocol, all types of data frame format of component devices is as follows: 1. the data frame format that sends of control has order and information frame, command type have device reset, report for work registration, syn ack, asynchronously reply, the terminating machine state-detection.Asynchronous calling of replying when test to the student terminal machine; 2. student data acquisition terminal machine transmission data frame format collects data information frame and does not collect two kinds of data message marker frames.The time that takies during for the minimizing communication, when the data collection station machine of single-chip microcomputer server scanning visit does not also collect data, when responding, the data collection station machine only sends out an identity code, need not send by the data frame format requirement.

Below Figure of description is further specified as follows: Fig. 1 forms block scheme for the study reaction information real-time testing analytical equipment, Fig. 2 is the controller principle block scheme, Fig. 3, Fig. 4 is the controller circuitry schematic diagram, AD/DB among Fig. 3, IRQ respectively with Fig. 4 in AD/DB, the corresponding connection of IRQ, Fig. 5 is that student's (data acquisition) terminating machine is formed block scheme, Fig. 6 is the circuit theory diagrams of student terminal machine, Fig. 7 is this device application software catalogue figure, Fig. 8 is this device application software second layer hierarchical structure chart, Fig. 9 is this device application software tri-layer structural drawing, Figure 10 is a host data capture program process flow diagram, Figure 11 is a main frame interrupt service routine process flow diagram, Figure 12 is a controller working routine process flow diagram, and Figure 13 is a student terminal machine working routine process flow diagram.

The embodiment of this device is as follows: (1) presses Fig. 3, Fig. 4, shown in Figure 6, draw PCB, and screen suitable components and parts and install and simple debugging, wherein: IC1, IC2, optional and the gate inverter 74LS00 type of IC11, IC3, the optional code translator 74LS138 of IC13 type, optional ternary data address latch 8212 types of IC4～IC6, the optional programmable I of IC7/O sets of interfaces member 82555 types, IC8, the optional monolithic data machine of IC18 80C31 type or 89C51 type, IC9, IC20 optional data memory 6264 types, IC10, optional address latch 74573 types of IC19 or 74373 types, IC12 optional procedure memory 27C64 type or 2764 types, IC15, optional communication driver 75176 types of IC25, the optional I/O sets of interfaces of IC21 member 8155 types or 81C55 type, the optional switching device SW-D1P8 of EE type, optional display driver integration member 74145 types of IC23; The optional socket 12P1N of ZDS type; (2) program, and store and curing module by Fig. 7～application software architecture figure and Figure 10～program flow diagram shown in Figure 13 shown in Figure 9 by the curing of the described application software functional module of top instructions; (3), by the described real-time testing analysis principle of top instructions, just can implement the utility model preferably then by this study reaction information real-time testing analytical equipment that connects and composes shown in Figure 1.The inventor is through in a few years development, design, can this device successfully be implemented in student's study of inventor place colleges and universities, teaching and use.

Claims (2)

1, a kind of study reaction information real-time testing analytical equipment, it is characterized in that: it is by teacher computer, printer, teacher's display, the main frame that communication controller connects and composes, terminal data harvester and examination question machine, the examination question display, video distributor, the computing machine test questions management machine that the examination question display connects and composes connects and composes jointly, its interconnected relationship is: teacher computer is connected with printer by the multicore data signal line, and be connected with teacher's display by the TVGA signal wire, teacher computer is connected with communication controller by the long numeric data bus, communication controller is connected with the terminal data harvester by the serial communication line, teacher computer is connected with video distributor by the TVGA-TV signal wire, and be connected with the examination question machine by the R232 signal wire, the examination question machine is connected with video distributor by the examination question signal wire and is connected with the examination question display by the TVGA line, and video distributor is connected with other examination question display by the TVGA line of 75 Ω concentric cable.

2, by the described study reaction information real-time testing analytical equipment of claim 1, it is characterized in that described communication controller is by IBM PC microcomputer socket, decoding scheme, the two-way data communication control circuit, the programmable parallel communication interface chip, 51 singlechip CPU, address latch, the ROM memory, the RAM memory, code translator, IRQ interrupts the application circuit, the serial communication driving circuit connects and composes jointly, its interconnected relationship is: IBM PC microcomputer socket is connected with decoding scheme with the address strobe line by the control signal interconnection respectively, decoding scheme is connected with the two-way data communication control circuit by control line and decoding output line respectively, IBM PC microcomputer socket also is connected with the two-way data communication control circuit by data bus, the two-way data communication control circuit passes through control line respectively, looking into Interface status line and data line is connected with the programmable parallel communication interface chip, the programmable parallel communication interface chip passes through data line respectively, control line is connected with 51 singlechip CPU, programmable parallel communication interface chip and 51 singlechip CPU by data bus respectively with address latch, the ROM memory, the RAM memory is connected, 51 singlechip CPU are connected with ROM memory and RAM memory respectively by the address strobe line, address latch is by address strobe line and ROM memory, the RAM memory is connected, and be connected with the programmable parallel communication interface chip by address wire, 51 singlechip CPU are connected with code translator by the decoded signal incoming line, code translator is connected with programmable parallel communication interface chip and RAM memory by the decoded signal output line, 51 singlechip CPU are interrupted the application circuit by the look-at-me line with IRQ and are connected, and respectively by the transmitting-receiving select lines, the transmitting-receiving drive signal line is connected with the serial communication driving circuit, and IRQ interrupts the application circuit and is connected with IBM PC socket by the interrupt request singal line.

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