CN2377760Y - Line fault sectional controller - Google Patents
Line fault sectional controller Download PDFInfo
- Publication number
- CN2377760Y CN2377760Y CN 99222889 CN99222889U CN2377760Y CN 2377760 Y CN2377760 Y CN 2377760Y CN 99222889 CN99222889 CN 99222889 CN 99222889 U CN99222889 U CN 99222889U CN 2377760 Y CN2377760 Y CN 2377760Y
- Authority
- CN
- China
- Prior art keywords
- circuit
- output
- xor gate
- door
- counting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Emergency Protection Circuit Devices (AREA)
Abstract
The utility model relates to a segmenting controller for line faults, which comprises a current signal sampling circuit and a setting circuit. The utility model is characterized in that the output end of the current signal sampling circuit and the setting circuit is respectively connected with the same-phase end and reverse-phase end of comparative integrated circuits U < 1b > and U < 1d >, the output ends of the comparative integrated circuits U < 1b > and U < 1d > are connected with the reverse-phase end of a comparative integrated circuit U < 2: d >, and the output end of the comparative integrated circuit U < 2: d > is connected with an exclusive-OR gate U < 3a >; the output end of the exclusive-OR gate U < 3a > is respectively connected with a power signal end of a counting circuit, an exclusive-OR gate U < 3b > and an exclusive-OR gate U < 3d >, the output end of the exclusive-OR gate U < 3b > is connected with the counting pulse signal input end of the counting circuit, and the output end of the exclusive-OR gate U < 3d > and the output end of the counting circuit are respectively connected with an AND gate U < 6b > of a controlling executive circuit. The utility model has the characteristics of circuit integration, simple structure, small size, high reliability, etc.
Description
The utility model relates to the distribution line failure technical field, particularly a kind of line fault segmentation controller that is suitable for the 6-10KV power distribution network.
At present, for the distribution line of power distribution network, because branch is many, it is wide to distribute, complex structure, and the failure rate height, when (as short circuit) broken down in the circuit somewhere, it was very difficult wanting accurately promptly to search the guilty culprit branch road.Therefore the circuit automatic segmentation technology that how to improve the distribution line power supply reliability just seems extremely important.Promptly when line failure trips, detect fault section or branch automatically, and, the non-faulty component of circuit is restored electricity rapidly rapidly with its excision.Recent Chinese patent CN87215041 and disclose title for CN91225443.2 number respectively and be respectively: the line short fault detects device for excising and line fault resectoscope automatically.The former adopts relay circuit, needs collection electric current, voltage, time three parameters to carry out logic determines, has complex structure, and reliability is low, the big deficiency that waits of volume; The latter adopts electromagnetism-hydraulic pressure combination self-con-tained unit, exists difficulty of processing big, the deficiency that reliability is lower.
The purpose of this utility model is: at the situation of prior art, design provides a kind of need to gather current parameter, and the number of times by the record short circuit current and whether disappearing is judged, and employing circuit integration, simple in structure, volume is little, the line fault segmentation controller that reliability is high.
The utility model is achieved by following manner: a kind of line fault segmentation controller, have the current signal Acquisition Circuit that is made of current transformer, current rectifying and wave filtering circuit etc. and the circuit of adjusting, it is characterized in that: the signal output part of the current signal Acquisition Circuit and the circuit of adjusting meets comparison integrated circuit U respectively
1b, U
1dIn-phase end and end of oppisite phase, integrated circuit U relatively
1b, U
1dOutput termination integrated circuit U relatively
2:dEnd of oppisite phase, integrated circuit U relatively
2:dOutput termination XOR gate U
3a, XOR gate U
3aOutput connect the power supply signal end of counting circuit, XOR gate U respectively
3bWith XOR gate U
3d, XOR gate U
3bThe counting pulse signal input of output termination counting circuit, XOR gate U
3dThe output of output, counting circuit connect the control executive circuit respectively with door U
6b
A kind of line fault segmentation controller is characterized in that: XOR gate U
3aThe output termination or the door U
5b, or door U
5bOutput connect respectively counting circuit and timing circuit the power supply signal input, with the door U
6a, with door U
6aThe output termination or the door U
5bInput, the output termination XOR gate U of timing circuit
3c, XOR gate U
3cThe output termination with the door U
6aInput.When present technique is used and on-pole switch constitute the line fault segmentation controller that circuit detects excision automatically, it is loaded on the head end of line sectionalizing point or circuit branch.When circuit was short-circuited fault, the line sectionalizing controller carried out logic determines by the current impulse that collects, and when judgement is this branch permanent fault, and the line switching of electric substation has been when having tripped, and the switch that is about to this device cuts.The line switching of electric substation closes a floodgate under the control of auto recloser again, has made the non-faulty component of circuit immediately restore electricity (referring to Fig. 1).Simplified program, saved power transformer, control circuit is integrated, has not only strengthened function, also is convenient to install, safeguard.
The utility model is compared with prior art, and only having needs to gather current parameter, and the number of times by the record short circuit current and whether disappearing judges, and has circuit integration, and simple in structure, volume is little, characteristics such as reliability height.
Fig. 1 is circuit theory diagrams of the present utility model.
Among the figure: 1 timing circuit, 2 counting circuits, 3 executive circuits, 4 adjust circuit, 5 self-powered current-to-voltage converting circuits.
Narrate most preferred embodiment of the present utility model in conjunction with the accompanying drawings.
Current transformer T
1, T
2, rectifier bridge Q
1, Q
2, filter capacitor C
2, C
7, amplifying circuit U
1a, U
1c, and resistance R
1-R
6, R
14-R
19, diode D
1, D
2, D
7, D
8, capacitor C
1, C
7Common formation current signal Acquisition Circuit, voltage stabilizing didoe U
10, resistance R
20-R
32, operational amplifier U
2a, U
2bConstitute the circuit of adjusting jointly.The current signal Acquisition Circuit and the circuit output end of adjusting meet comparison integrated circuit U respectively
1b, U
1dIn-phase end and end of oppisite phase, integrated circuit U relatively
1b, U
1dOutput termination integrated circuit U relatively
2:dEnd of oppisite phase, resistance R
7-R
9With U
2:dConstituent ratio is than integrated circuit together.Compare integrated circuit U
2:dOutput through diode D
4Meet XOR gate U
3a, XOR gate U
3aOutput termination XOR gate U
3dAlso through diode D
6Meet XOR gate U
3b, capacitor C
3-C
5, resistance R
10-R
13, light-emitting diode D
5With XOR gate U
3a, U
3bConstitute logic distinguishing circuit together, XOR gate U
3aThe output termination or the door U
5b, or door U
5bOutput connect respectively timing circuit 1 and counting circuit 2 the power supply signal input, with the door U
6a, with door U
6aThe output termination or the door U
5bInput, the output termination XOR gate U of timing circuit 1
3c, XOR gate U
3cThe output termination with the door U
6aInput, XOR gate U
3bThe counting pulse signal input of output termination counting circuit 2, XOR gate U
3dThe output of output, counting circuit 2 connect the control executive circuit respectively with door U
6b, with door U
6bOutput termination executive circuit 3.Crystal oscillator 4096K, counter U
4, U
7a, U
7b, U
8a, U
8b, U
9a, U
9bWith diode D
13-D
20Deng common formation timing circuit 1, counter U
10a, U
10b, diode D
21-D
24Common formation counting circuit 2, operational amplifier U
2c, resistance R
33, R
34, diode D
11, D
12, relay J
1Common formation executive circuit 3, voltage stabilizing didoe D
10, resistance R
20-R
32, operational amplifier U
2a, U
2bConstitute the circuit 4 of adjusting, transformer T jointly
3Be connected to the piezo-resistance R on the secondary coil
39, R
40, rectifier bridge Q
3And be connected to Q
3The integrated regulator U of output
11, capacitor C
11, C
12, diode D
25, D
26, resistance R
41-R
44Common formation self-powered current-to-voltage converting circuit 5, T
3Primary winding by I
a, I
cThe current reversal input, synthetic 1.73 times phase current, thereby as long as line current is not less than 10% of rated value, the just exportable 12V direct voltage of this current-to-voltage converting circuit 5.The course of work of the present utility model is: the I that the current transformer the on-pole switch on being loaded on circuit comes
a, I
cCurrent signal is respectively through transmitter T
1, T
2Conversion, rectifier bridge Q
1, Q
2Rectification, diode D
1, D
2, D
7, D
8Amplitude limit, operational amplifier U
1a, U
1cAmplify C
2, C
7After the filtering, the threshold voltage that provides with fixed value adjusting circuit 4 compares, when being equal to or greater than threshold voltage, and U
1b, U
1dThe output high level, U
2dOutput low level, XOR gate U
3aThe output high level, amber light D
5Light, the action of expression current relay, one of high level inputs to or door U
5b, via U
5b, U
6aSelf-holding circuit starting timing circuit 1 and the counting circuit 2 formed; Two of high level makes XOR gate U
3bExport a pulse to counter U
10aCounting once.In the given time, if rolling counters forward has reached the number of times of adjusting, and work as U
3aWhen being output as low level, U
3dThe output high level, starting ﹠amp; 2 U
6b, through U
2cAmplify and promote exit relay J
1Action makes the on-pole switch tripping operation, and the fault section circuit is excised; Though if rolling counters forward has reached the number of times adjusted but U
3aOutput is high level still, means that the fault current of high-tension line does not disappear, or mean that this current signal is not the fault current signal that electric substation does not trip to inductive switch, U
3dDo not have high level output, exit relay J
1Can not move, by the time the scheduled time, timing circuit 1 or door U
5aThe output high level is to XOR gate U
3c, U
3cOutput low level is to ﹠amp; 1 U
6aSelf-hold circuit is resetted; If counter does not reach the number of times of adjusting in the given time, mean that fault current disappears, high-tension line has recovered normally, the U of timing circuit 1
5aThe output high level is to XOR gate U
3c, U
3cOutput low level is to ﹠amp; 1 U
6aSelf-hold circuit is resetted, and and then timing circuit 1 and counting circuit 2 all return thereupon, and whole device resets.Above circuit has constituted following logical relation: when the line short circuit current number of times by on-pole switch reaches the number of times of adjusting, and only just send trip command to on-pole switch after short circuit current disappears.If counter does not reach the number of times of adjusting in the given time, perhaps current signal does not disappear yet in the given time, U
3dDo not have high level output, exit relay J
1Can not move, logical circuit automatically resets.Another characteristics of the present utility model are not need external power supply.By transformer T
3, be connected to the piezo-resistance R on its secondary coil
37, R
40, rectifier bridge Q
3And be connected to Q
3The integrated regulator U of output
11The self-powered electric current one voltage source change-over circuit that constitutes, T
3Primary winding by I
a, I
cThe anti-phase input of electric current, synthetic 1.73 times phase current, thereby as long as line current is not less than 10% of rated value, the just exportable 12V direct voltage of this current-to-voltage converting circuit.
Claims (2)
1, a kind of line fault segmentation controller, have by current transformer, the current signal Acquisition Circuit of formations such as current rectifying and wave filtering circuit and the circuit of adjusting is characterized in that: the signal output part of the current signal Acquisition Circuit and the circuit of adjusting meets comparison integrated circuit (U respectively
1b, U
1d) in-phase end and end of oppisite phase, integrated circuit (U relatively
1b, U
1d) output termination integrated circuit (U relatively
2:d) end of oppisite phase, integrated circuit (U relatively
2:d) output termination XOR gate (U
3a), XOR gate (U
3a) output meet power supply signal end, the XOR gate (U of counting circuit respectively
3b) and XOR gate (U
3d), XOR gate (U
3b) the counting pulse signal input of output termination counting circuit, XOR gate (U
3d) the output of output, counting circuit connect the control executive circuit respectively with door (U
6b).
2, a kind of line fault segmentation controller according to claim 1 is characterized in that: XOR gate (U
3a) the output termination or the door (U
5b), or door (U
5b) output connect respectively counting circuit and timing circuit the power supply signal input, with the door (a U
6a), with door (U
6a) the output termination or the door (U
5b) input, the output termination XOR gate (U of timing circuit
3c), XOR gate (U
3c) the output termination with the door (a U
6a) input.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 99222889 CN2377760Y (en) | 1999-02-12 | 1999-02-12 | Line fault sectional controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 99222889 CN2377760Y (en) | 1999-02-12 | 1999-02-12 | Line fault sectional controller |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2377760Y true CN2377760Y (en) | 2000-05-10 |
Family
ID=34013195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 99222889 Expired - Fee Related CN2377760Y (en) | 1999-02-12 | 1999-02-12 | Line fault sectional controller |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2377760Y (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109700309A (en) * | 2017-10-25 | 2019-05-03 | 佛山市顺德区美的电热电器制造有限公司 | Fault detection method, device, cooking apparatus and computer readable storage medium |
-
1999
- 1999-02-12 CN CN 99222889 patent/CN2377760Y/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109700309A (en) * | 2017-10-25 | 2019-05-03 | 佛山市顺德区美的电热电器制造有限公司 | Fault detection method, device, cooking apparatus and computer readable storage medium |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |