CN2335311Y - Sensor target imitation device for surge information radio transmission - Google Patents

Sensor target imitation device for surge information radio transmission Download PDF

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Publication number
CN2335311Y
CN2335311Y CN 97249194 CN97249194U CN2335311Y CN 2335311 Y CN2335311 Y CN 2335311Y CN 97249194 CN97249194 CN 97249194 CN 97249194 U CN97249194 U CN 97249194U CN 2335311 Y CN2335311 Y CN 2335311Y
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China
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pin
hold
goes
gone
computer
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CN 97249194
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Chinese (zh)
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赵玉民
王跃国
孙卫红
鲍克银
王国莉
冯强
霍治生
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INST NO 54 MINISTRY OF ELECTRONIC INDUSTRY
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INST NO 54 MINISTRY OF ELECTRONIC INDUSTRY
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Abstract

The utility model discloses a sensing target imitation device for information burst radio transmission. The utility model is composed of a radio frequency interface, an annular device, an amplifier, a modem, an acceptor, a digital attenuator, a filter attenuator, a microprocessor, a computer, a digital to analog converter, a three-terminal manostat, etc. The utility model can conduct multifunctional integrated tests to communication equipment in a communication burst mode, such as transceivers, repeaters, monitors, etc. and the performance indexes of shocking sensors, blasting sensors, infrared sensors, magnetic sensing sensors, pressure sensors, etc. The utility model also has the characteristics of convenient and flexible test method, reliable performance, simple structure, light weight, small volume, low cost, etc. The utility model has popularizing and applying value.

Description

Information burst wireless transmission sensing target simulator
The utility model relates in a kind of wireless communication field information burst wireless transmission sensing target simulator, is specially adapted to the performance index such as transmitting power, receiving sensitivity, success rate of test burst wireless transmission sensing mode transmitter, receiver, repeater, monitor; Also applicable to the indexs such as sensitivity level of transducers such as test vibrations, barisal guns, infrared, magnetosensitive, pressure.
Obtain the real time intelligence of special occasions in the communication, transmitter, receiver, repeater, monitor to transducer and burst communication mode are essential equipments, that part work is undesired, damaged even the mistake of information is caused in the capital, and it is very important requiring all kinds of bursting mode communication equipment are carried out Performance Detection for this reason.But at present to the detection means complexity of all kinds of bursting mode communication equipment, the checkout equipment of use is many, and inconvenient operation, especially to logical very difficulties of test such as the transmitting power of burst mode transmitter, message transmission success rates.Its use instrument complexity of tests such as sensitivity to the burst mode receiver often causes test error.Therefore test index has become a difficult problem of developing bursting mode communication equipment under the bursty state.
The purpose of this utility model be to avoid the weak point in the above-mentioned background technology and provide a kind of can integration test the information burst wireless transmission sensing target simulator of multifunctional testing of indexs such as sensitivity of transducers such as the performance index of burst communication mode transmitter, receiver, repeater, monitor and vibrations, barisal guns, infrared, magnetosensitive, pressure, and this reality have novelly have also that detection method is easy, flexible, test performance is reliable and stable, simple in structure, volume is little, in light weight, make easily, with low cost, have characteristics such as practical reference value.
The purpose of this utility model is achieved in that it is made up of radio frequency interface 1, circulator 2, digital pad 3,10, amplifirer 4, modulator 5, three terminal regulator 6,8,13, microprocessor 7,15, on- off controller 9,14, receiver 11, demodulator 12, tested interface 16, interface circuit 17, computer 18, D/A converter 19, algorithm device 20.Wherein external tested transducer is gone into end and is passed through to be connected by bidirectional bus and interface circuit 17 discrepancy ends 5 pin behind inbound port A serial connection algorithm device 20, D/A converter 19, the computer 18 again, computer 18 goes out to hold 3 pin and algorithm device 20 to go into to hold 3 pin to be connected, and tested burst communication equipment is come in and gone out to hold after going out inbound port B serial connection radio frequency interface 1, circulator 2, digital pad 10, receiver 11, demodulator 12 and gone out to hold 2 pin to be connected with three terminal regulator 13; Three terminal regulator 13 goes out end 3 pin and goes into to hold 3 pin to be connected with receiver 11, and microprocessor 15 goes out end 4 pin serial connection on-off controller 14 and goes into out end 1, going into end 4 pin with three terminal regulator 13 behind 2 pin is connected, end 3 pin of coming in and going out are come in and gone out by bidirectional bus and demodulator 12 and are held 2 pin to be connected, going out end 2 pin goes into to hold 4 pin to be connected by bus and digital pad 10, going into end 1 pin and three terminal regulator 8 goes out to hold 3 pin and microprocessor 7 to go into end 1 pin and downlink connection, end 5 pin of coming in and going out are come in and gone out by bidirectional bus and tested interface 16 and are held 1 pin to be connected, end 6 pin of coming in and going out are come in and gone out by bidirectional bus and microprocessor 7 and are held 6 pin to be connected; External tested transducer, the discrepancy of burst communication equipment are held by going out inbound port C and are gone into to hold 2 pin to be connected with tested interface 16, and three terminal regulator 8 goes into to hold 1 pin and interface circuit 17 to go out to hold 3 pin to be connected, to go out to hold 2 pin and digital pad 10 to go into to hold 3 pin to be connected, to go out to hold 4 pin and digital pad 3 to go into to hold 4 pin to be connected; Microprocessor 7 goes out end 2 pin and goes into end 3 pin by bus and digital pad 3 and is connected, goes out end 3 pin serial connection on-off controller 9 and go into out behind end 1,2 pin to go into end 4 pin with three terminal regulator 6 and is connected, goes out end 4 pin serial connection modulator 5, amplifirer 4, digital pad 3 and go into out behind end 1,2 pin to go into end 3 pin with circulator 2 and be connected, come in and go out and hold 5 pin to hold 1 pin to be connected by bidirectional bus and interface circuit 17 discrepancy; Interface circuit 17 goes out end 4 pin and goes into to hold 1 pin to be connected, to go out to hold 2 pin and three terminal regulator 6 to go into to hold 1 pin to be connected with three terminal regulator 13; Three terminal regulator 6 goes out end 2,3 pin and respectively goes into to hold 3 pin to be connected with modulator 5, amplifirer 4 respectively, goes into end with corresponding power supplys at different levels after computer 18 goes out to hold 4 pin power supply+V voltage end by interface circuit 17 and is connected.
The purpose of this utility model can also reach by following measure:
Digital pad 3 of the present utility model or 10 is by variable attenuator 21, driver 22 is formed, wherein microprocessor 7 or 15 respectively goes out to hold 2 pin to go into to hold 9 pin to be connected by bus and driver 22, circulator 2 or amplifirer 4 go out each 2 pin of end and go into to hold 1 pin to be connected with variable attenuator 21, end 3 pin gone into by circulator 2 or receiver 11 goes into to hold 1 pin and variable attenuator 21 to go out to hold 8 pin to be connected, driver 22 respectively go out end 2 to 7 pin respectively series resistor R6 respectively go into to hold 2 to 7 pin to be connected to resistance R 1 back and variable attenuator 21, go into end 8 pin earth terminals, go into end 1 pin and go out end 5 pin with three terminal regulator 8 and is connected, respectively go out to hold 2 to 7 pin also respectively also connecting resistance R12 to resistance R 7 one ends; Resistance R 7 to the R12 other ends are all gone into end 2 pin with three terminal regulator 8 and are connect, and variable attenuator 21 is gone into end 9 pin and gone out to hold 4 pin to be connected, to go into end 10 pin earth terminals with three terminal regulator 8.
Algorithm device 20 of the present utility model is by operational amplifier 23, analog switch 24,25,27, follower 26,30, fixed attenuator 28, latch 29,31 form, wherein D/A converter 19 scene 2 ends are distinguished series resistor R13, respectively go into end 1 with operational amplifier 23 behind the R14,2 pin connect, and operational amplifier 23 is gone into end 1 pin and crosstalk resistance R16, capacitor C 2 backs go out end 3 pin and connect with it, go into end 2 pin and series resistor R15, capacitor C 1 back is held with ground and is connect, go into end 4 pin earth terminals, going into end 5 pin is connected with computer 18 power supplys+V voltage end, going out end 3 pin goes into to hold 2 pin to be connected with analog switch 24; Analog switch 24 respectively go out end 3 to 10 pin respectively with analog switch 25 respectively go into end 3 to 10 pin is connected, goes out end 1 pin go into end 1 pin with analog switch 25 and connect after be connected in series capacitor C 4 backs again and go out to hold 3 pin, resistance R 17, R18 one end with follower 26 and connect, go into to hold 15 pin earth terminals, go into to hold 16 pin to be connected with computer 18 power supplys+V voltage end; Analog switch 25 go into end 11 to 13 pin respectively with latch 31 go out end 11 to 13 pin is connected, goes out end 2 pin and follower 26 go into end 2 pin is connected after again and be connected in series earth terminals after capacitor C 3, the resistance R 22, go into to hold 15 pin earth terminals, go into to hold 16 pin to be connected with computer 18 power supplys+V voltage end; Follower 26 is gone into end 1 pin and is connected with resistance R 17 other ends, resistance R 18 other ends go into to hold 1 pin with fixed attenuator 28 and connect after earth terminal behind the series resistor R19 again, follower 26 is gone into to hold 4 pin earth terminals, is gone into to hold 5 pin to be connected with computer 18 power supplys+V voltage end; Fixed attenuator 28 is gone into end 2 to 5 pin and is gone out end 1 to 4 pin with analog switch 27 respectively and is connected, goes into end 7 pin earth terminals, go out to go into to hold 2 pin with follower 30 behind the end 6 pin series resistor R20 and connect; Follower 30 goes into end 2 pin and series resistor R21 earth terminal, go into end 1 pin go out end 3 pin with it and connect after is connected, goes into to hold 4 pin earth terminals again with external tested transducer inbound port A, go into to hold 5 pin to be connected with computer 18 power supplys+V voltage end; Analog switch 27 is gone into end 5 to 8 pin and is gone out to hold 11 to 14 pin to be connected, to go into to hold 9 pin to be connected, to go into end 10 pin earth terminals with computer 18 power supplys+V voltage end with latch 29 respectively; Latch 29 discrepancy ends 1 to 7 pin is held 1 to 7 pin with latch 31 discrepancy end 1 to 7 pin and computer 18 discrepancy respectively and is connect, and latch 29,31 is respectively gone into end 10 pin and gone out to hold 8,9 pin to be connected, respectively to go into end 8 pin earth terminals, respectively go into to hold 9 pin to be connected with computer 18 power supplys+V voltage end with computer 18 respectively.
The utility model has been compared following advantage with background technology:
In the utility model owing to adopted digital pad 3,10, algorithm device 20 and computer 18 technology, can finish the indexs such as sensitivity of transducers such as the performance index such as transmitting power, receiving sensitivity, success rate of integration test burst communication mode transmitter, receiver, repeater, monitor and vibrations, barisal guns, infrared, magnetosensitive, pressure, and have multifunctional testing, solved the index test difficult problem under the bursty state.
2. the utility model is owing to adopt large scale integrated circuit such as microprocessor 7,15 to make, and makes that detection method is easy, flexible, test performance is reliable and stable, and have volume little, in light weight, make simple and easy characteristics.
3. the utility model is simple in structure, and is with low cost, has application value.
Below in conjunction with accompanying drawing the utility model is described in further detail.
Fig. 1 is an electric functional-block diagram of the present utility model:
Fig. 2 is the electrical schematic diagram of the utility model digital pad 3 or 10.
Fig. 3 is the electrical schematic diagram of the utility model algorithm device 20.
Referring to figs. 1 through Fig. 3, the utility model is made up of radio frequency interface 1, circulator 2, digital pad 3,10, amplifirer 4, modulator 5, three terminal regulator 6,8,13, microprocessor 7,15, on-off controller 9,14, receiver 11, demodulator 12, tested interface 16, interface circuit 17, computer 18, D/A converter 19, algorithm device 20.Wherein external tested transducer inbound port A serial connection algorithm device 20, D/A converter 19, computer 18 backs are gone into end 5 pin by bidirectional bus and interface circuit 17 and are connected, and computer 18 goes out end 3 pin and goes into to hold 3 pin to be connected with algorithm device 20; External tested transducer, burst communication equipment are come in and gone out and are gone into to hold 5 pin to be connected by bidirectional bus and microprocessor 15 again after end is connected in series out inbound port C, tested interface 16, computer 18 its effects produce tested transducer and the required analog signal of tested burst communication equipment, and the analog signal that produces various tested transducers is gone into to hold the control signal of 2 pin, generation to go into end 3 pin by its 3 pin by data/address bus input algorithm device 20 by bus input D/A converter 19 by its 1 pin.D/A converter 19 its effects are the analog signal conversion of various tested transducers that digital signal input algorithm device 20 is gone into end 2 pin, 20 its effects of algorithm device are carried out algorithm to the tested sensor die analog signal after the D/A conversion, produce the transducing signal of detecting sensor, the simulation transducing signal of the tested various transducers after algorithm is detected transducers such as vibrations, barisal guns, infrared, magnetosensitive, pressure by port A respectively by computer 18 control, and the testing result of various tested transducers is imported tested interface 16 by going out inbound port C.Embodiment computer 18 adopts commercially available T6600C type portable computer to make.D/A converter 19 adopts commercially available SC1152 type integrated package to make.
The utility model algorithm device 20 is made up of operational amplifier 23, analog switch 24,25,27, follower 26,30, fixed attenuator 28, latch 29,31.Fig. 3 is the electric principle connection line figure of the utility model algorithm device 20, and embodiment presses Fig. 3 connection line.Wherein end 1,2 pin are gone in the tested Sensor Analog Relay System digital signal input computing amplification 23 after D/A converter 19 conversions, the tested Sensor Analog Relay System digital signal of 23 pairs of inputs of operational amplifier is amplified, import analog switch 24 then and go into end 2 pin, analog switch 24 goes out end 3 to 10 pin and goes into to hold 3 to 10 pin to be connected with analog switch 25 respectively, analog switch 24,25 respectively go into end 1 pin and connect after be connected in series capacitor C 4 backs again and go out end 3 pin, resistance R 17 with follower 26 and connect analog switch 24,25 and resistance R 17, capacitor C 4 formation low pass filters.Latch 31 is latched in a stable state to the control signal that computer 18 goes out the input of end 1 to 8 pin simultaneously, control signal through latching goes out end 11 to 13 pin input analog switch 25 by it and goes into end 11 to 13 pin, reach analog switch 24,25 is carried out computer program control filtering purpose, improve the measured signal quality.Tested Sensor Analog Relay System digital signal after program control filtering plays buffer action by go out to hold 2 pin input follower 26, follower 26 its effects of analog switch 25 to signal, signal input fixed attenuator 28 after follower 26 is isolated.Computer 18 goes out the control signal input latch 29 of end 1 to 7 pin and the output of 9 pin, latch 29 its effects are locked in a stable state to the control signal of computer eighteen data bus input, control signal through latching is gone into end 5 to 8 pin by its 11 to 14 pin input analog switch 27 and is connected, the input attenuation control signal, make analog switch 27 and fixed attenuator 28 form programmable attenuator, carry out program control decay from 0 to 75db.Tested Sensor Analog Relay System digital signal input follower 30 after decay, after follower 30 is isolated, tested Sensor Analog Relay System digital signal is imported corresponding tested transducer by inbound port A, realization is to the detection of tested transducer, and embodiment operational amplifier 23 adopts commercially available LM324 type integrated package to make.Analog switch 24,25,27 adopts commercially available CD4052 type integrated package to make.Follower 26,30 adopts commercially available CD4052 type integrated package to make, and fixed attenuator 28 adopts the integrated attenuator of commercially available BSJ33 type to make.Latch 29,31 adopts commercially available 74LS373 type integrated package to make.
Tested burst communication equipment of the utility model such as transmitter, receivers etc. go out inbound port by going out inbound port B serial connection radio frequency interface 1, circulator 2, digital pad 10, receiver 11, demodulator 12 backs go out end 2 pin with three end depressors 13 and are connected, three terminal regulator 13 goes out end 3 pin and goes into to hold 3 pin to be connected with receiver 11, microprocessor 15 goes out end 4 pin serial connection on-off controller 14 and goes into end 1, going into end 4 pin with three terminal regulator behind 2 pin is connected, end 3 pin of coming in and going out are come in and gone out by bidirectional bus and demodulator 12 and are held 2 pin to be connected, going out end 2 pin goes into to hold 4 pin to be connected by bus and digital pad 10, going out end 1 pin and three terminal regulator 8 goes out to hold 3 pin and microprocessor 7 to go into end 1 pin and downlink connection, end 6 pin of coming in and going out are connected by bidirectional bus and microprocessor 7 discrepancy ends 6 pin, and microprocessor 7 discrepancy ends 5 pin are come in and gone out by bidirectional bus and interface circuit 17 and held 1 pin to be connected.
Computer 18 goes out to hold 4 pin power supply+its output voltage of V voltage end to go out to hold 2,3,4 pin to go into to hold each 1 pin to be connected with three terminal regulator 6,8,13 respectively through interface circuit 17 provides three terminal regulator 6,8,13 supply voltages at different levels, its effect of three terminal regulator 6,8,13 provides computer 18+and 12V voltage carries out conversion voltage stabilizing one-tenth+10V voltage and exports, provide corresponding operating voltage at different levels, so the utility model power supply is provided directly+V (supply voltage promptly+12V) by computer 18.Embodiment three terminal regulator 6,8,13 adopts commercially available 78L05 type three-terminal voltage-stabilizing integrated package to make.
The burst transmissions analog signal of the tested sudden transmitter that computer 18 produces is gone into to hold with tested sudden transmitter burst analog signal and is connected by going out inbound port C at last through interface circuit 17, microprocessor 7, microprocessor 15, tested interface 16 step by step by bidirectional bus; Tested sudden transmitter is gone out the tested burst transmissions analog signal that sends end and is gone out inbound port B and be connected by it again, the tested burst transmissions analog signal that sends is by going out inbound port B input radio frequency interface 1, it act as tested burst communication equipment the interface circuit that inputs or outputs signal is provided, and embodiment adopts the self-control radio-frequency interface circuit to make.Radio frequency interface 1 is imported tested burst transmissions analog signal circulator 2, digital pad 10, receiver 11, is received tested burst transmissions analog signal by receiver 11 step by step again, import demodulator 12 again and be demodulated to 15 detections of digital signal input microprocessor, realize testing goal tested burst transmissions equipment.2 its effects of embodiment circulator are isolated the transmitting-receiving input/output signal, realize the transmit-receive sharing passage, adopt commercially available TFA type annular element manufacturing.Digital pad 10 its effects realize digital control to the attenuation of the burst transmissions analog signal of reception.The tested burst transmissions analog radio-frequency signal that receiver 11 receives by radio frequency interface 1 input adopts commercially available MC3363 type to receive integrated package and makes.The CP-FSK modulation signal that demodulator 12 is imported receiver 11 conversions converts TTL digital signal input microprocessor 15 to and detects, and adopts commercially available XR 2211 type demodulation integrated packages to make.Microprocessor 15 its effects are deciphered, are controlled, the exchanges data of realization and tested transducer, tested burst communication equipment, reach testing goal.Adopt commercially available 87C51 type microprocessor integrated package to make.It act as the input or output interface circuit that tested transducer, tested burst communication equipment provide measured signal tested interface 16, adopts commercially available resistance and diode EN4148 type to design and produce.
The utility model microprocessor 7 goes out end 2 pin and digital pad 3 and goes into end 3 pin and is connected, goes out end 3 pin serial connection on-off controller 9 and go into out behind end 1,2 pin to go into end 4 pin with three terminal regulator 6 and is connected, goes out to hold 4 pin to be connected in series modulator 5, amplifirer 4, digital pad 3 to go into to hold 3 pin to be connected with circulator 2 after going into out end 1,2 pin.Three pressurizers 6 go out end 2,3 pin and respectively go into to hold 3 pin to be connected with modulator 5, amplifirer 4 respectively, and its effect provides modulator 5, amplifirer 4 operating supply voltages at different levels.Three terminal regulator 8 goes out end 2,4 pin and is connected with end 3,4 pin of respectively going into of digital pad 10,3 respectively, and its effect provides digital pad 10,3 operating supply voltages at different levels.
The utility model digital pad 3 or 10 is made up of variable attenuator 21, driver 22, and Fig. 2 is the electric principle connection line figure of the utility model digital pad 3 or 10, and embodiment presses Fig. 2 connection line.Microprocessor 7 or 15 respectively goes out the control signal enter drive 22 of end 2 pin and goes into the connection of end 9 pin, driver 22 its effects provide the controlling and driving signal of variable attenuator 21, control voltage provides input variable attenuator 21 after by resistance R 7 to R12 dividing potential drops by three terminal regulator 8, and control variable attenuator 21 obtains variable decay output.The tested burst radiofrequency signal that variable attenuator 21 its effects will receive or launch is by given pad value decay, and embodiment variable attenuator 21 adopts commercially available MB751 type thick film circuit to make.Driver 22 adopts commercially available 54HC365 type integrated package to make.
The burst that the utility model computer 18 produces tested burst receiver receive analog signal by bidirectional bus through interface circuit 17, microprocessor 7, modulator 5, amplifirer 4, digital pad 3, circulator 2, radio frequency interface 1, go into to hold with tested burst receiver burst analog signal and be connected by going out inbound port B at last; Tested burst receiver receives analog signal to the tested burst that receives again and is gone out end and gone out inbound port C and is connected by it, detects through tested interface 16 input microprocessors 5, and realization is to the purpose of tested burst receiving equipment detection.Interface circuit 17 its effects are converted to TTL digital signal input microprocessor 7 with the various tested analog signal level that computer 18 produces, and reach with the exchange of microprocessor 7 information bidirectionals and handle, and embodiment adopts MAX232E type interface integrated package to make.Tested burst receives analog signal input microprocessor 7 behind interface circuit 17, its effect of microprocessor 7 tested reception or transmit encode, control, realization exchanges processing intent with the information bidirectional of computer 18, embodiment adopts the little processing integrated package making of commercially available 87C51 type.The tested burst received signal input modulator 5 of TTL numeral behind microprocessor 7 codings, modulator 5 is modulated into the CP-FSK modulation signal to the TTL digital signal, and be modulated on the carrier frequency, input amplifirer 4, amplifirer 4 carry out the power amplifier rate to the modulated radiofrequency signal and amplify.And input digit attenuator 3.The attenuation of 3 pairs of radiofrequency signals of digital pad realizes numeral decay control, isolates back input radio frequency interface 1 by 2 pairs of receiving and transmitting signals of circulator, imports tested burst receiving equipment and detects by going out inbound port B at last.Embodiment modulator 5 adopts commercially available MC145156 type modulation integrated package to make, and amplifirer 4 adopts commercially available MGM-5 type power discharging integrated block to make.The break-make of three terminal regulator 6,13 operating supply voltages is controlled in 9,14 its effects of the utility model on-off controller respectively, the switch controlling signal of on-off controller 9,14 is provided by microprocessor 7,15 controls respectively, and embodiment adopts common transistor electronic switching circuit to make.All resistance of the present utility model, capacitor element all adopt commercially available general-purpose device to make.
The concise and to the point operation principle of the utility model is as follows:
1. detect tested transducer.At first produce the required analog signal of tested transducer, import D/A converter 19, algorithm device 20 generation transducer signals then, import in the tested transducer by computer 18; Tested transducer again testing result by carrying out information processing in tested interface 16 input microprocessors 15 and 7, information processing result then imports and analyzes, judges, shows the detecting sensor result in the computer 18.
2. detect tested burst mode receiver.At first produce tested burst mode receiver analog signal by computer 18, by encoding in interface circuit 17 input microprocessors 7, in the input modulator 5 the TTL digital signal of the tested reception analog signal in coding back is modulated into the CP-FSK modulation signal then, and be modulated to and produce radiofrequency signal on the carrier frequency, import amplifirer 4, digital pad 3 again, receive and detect through circulator 2, radio frequency interface 1 input tested receiver; Tested burst mode receiver is deciphered by input microprocessor 7 after carrying out information processing in tested interface 16 input microprocessors 15 receiving testing result, analyzes, judges, shows the tested receiver testing result again in interface circuit 17 input computers 18.
3. detect tested burst mode transmitter.At first produce tested burst mode transmitter analog signal, by encoding in interface circuit 17 input microprocessors 7 by computer 18.Carry out information processing in the input microprocessor 15 then after tested interface 16 is imported tested transmitter, and start tested transmitter generation burst transmissions signal; Tested burst mode transmitter is the burst transmissions signal input radio frequency interface 1 that produces, again by circulator 2 input digit attenuators 10, receiver 11, the burst transmissions signal is received device 11 and receives in the back input demodulator 12, the CP-FSK modulation signal that demodulator 12 changes receiver 11 over to is demodulated in the TTL digital signal input microprocessor 15 and carries out information processing, input microprocessor 7 is deciphered then, again by analyzing, judge, show tested transmitter testing result in the interface circuit 17 input computers 18.
The detection that the roughly the same corresponding burst mode of the detection method of tested bursting mode communication equipment such as the utility model burst mode repeater, monitor receives, sends.
The utility model mounting structure is as follows: at first all components and parts of the receiver 11 in the accompanying drawing 1,2,3, demodulator 12, three terminal regulator 13, on-off controller 14 and radio frequency interface 1, circulator 2, digital pad 10, being installed in a block length * wide by Fig. 1,2,3 connection lines is in 115 * 95 millimeters the reception printed board; It is in 115 * 60 millimeters the emission printed board that all components and parts of amplifirer 4 in the accompanying drawing 1,2,3, demodulator 5, digital pad 3, three terminal regulator 6, on-off controller 4 are installed in a block length * wide by Fig. 1,2,3 connection lines; Fig. 1,2, microprocessor 7 in 3,15, interface circuit 17, tested interface 16, all components and parts of three terminal regulator 8 are pressed Fig. 1,2, it is in 160 * 105 millimeters the CPU printed board that 3 connection lines are installed in a block length * wide, then receiving printed board, the emission printed board, it is in 170 * 110 * 40 millimeters the shielding box that the CPU printed board is installed to a long * wide * height, installation nine core sockets and all printed boards need external input on the panel of shielding box, output signal head and computer 18 provide+connection of V voltage end joint, with securing member shielding box are installed in computer 18 cabinets then.It is in 178 * 99 millimeters the printed board, to be inserted in the expansion slot in computer 18 cabinets that D/A converter 19 all components and parts are installed in a block length * wide.It is in 135 * 90 millimeters the printed board that algorithm device 20 all components and parts are installed in a block length * wide, be inserted in the expansion slot in computer 18 cabinets, last computer 18 by slimline press Fig. 1,2,3 connection lines are connected with D/A converter 19 printed boards, 20 printed boards of algorithm device.And be connected with shielding box by nine core plugs, three cable sockets of three input/output port A, B, C also are installed on the rear board of computer 18, three port cable sockets are connected the assembly cost utility model by cable with corresponding input/output terminal respectively.

Claims (3)

1. one kind by radio frequency interface (1), circulator (2), amplifirer (4), modulator (5), three terminal regulator (6), (8), (13), microprocessor (7), (15), on-off controller (9), (14), receiver (11), demodulator (12), tested interface (16), interface circuit (17), computer (18), the information burst wireless transmission sensing target simulator that D/A converter (19) is formed, it is characterized in that digital pad (3) in addition, (10), algorithm device (20) is formed, wherein external tested transducer is gone into end by inbound port A serial connection algorithm device (20), D/A converter (19), coming in and going out by bidirectional bus and interface circuit (17) behind the computer (18) holds 5 pin to be connected again, computer (18) goes out end 3 pin and goes into to hold 3 pin to be connected with algorithm device (20), and tested burst communication equipment is come in and gone out end by going out inbound port B serial connection radio frequency interface (1), circulator (2), digital pad (10), receiver (11), demodulator (12) back goes out end 2 pin with three terminal regulator (13) and is connected; Three terminal regulator (13) goes out end 3 pin and goes into to hold 3 pin to be connected with receiver (11), and microprocessor (15) goes out end 4 pin serial connection on-off controllers (14) and goes into out end 1, going into end 4 pin with three terminal regulator (13) behind 2 pin is connected, end 3 pin of coming in and going out are come in and gone out by bidirectional bus and demodulator (12) and are held 2 pin to be connected, going out end 2 pin goes into to hold 4 pin to be connected by bus and digital pad (10), going into end 1 pin and three terminal regulator (8) goes out to hold 3 pin and microprocessor (7) to go into end 1 pin and downlink connection, end 5 pin of coming in and going out are come in and gone out by bidirectional bus and tested interface (16) and are held 1 pin to be connected, end 6 pin of coming in and going out are come in and gone out by bidirectional bus and microprocessor (7) and are held 6 pin to be connected; External tested transducer, the discrepancy of burst communication equipment are held by going out inbound port C and are gone into to hold 2 pin to be connected with tested interface (16), and three terminal regulator (8) goes into to hold 1 pin and interface circuit (17) to go out to hold 3 pin to be connected, to go out to hold 2 pin and digital pad (10) to go into to hold 3 pin to be connected, to go out to hold 4 pin and digital pad (3) to go into to hold 4 pin to be connected; Microprocessor (7) goes out end 2 pin and goes into end 3 pin by bus and digital pad (3) and is connected, goes out end 3 pin serial connection on-off controllers (9) and go into out behind end 1,2 pin to go into end 4 pin with three terminal regulator (6) and is connected, goes out end 4 pin serial connection modulator (5), amplifirer (4), digital pad (3) and go into out behind end 1,2 pin to go into end 3 pin with circulator (2) and be connected, come in and go out and hold 5 pin to hold 1 pin to be connected by bidirectional bus and interface circuit (17) discrepancy; Interface circuit (17) goes out end 4 pin and goes into to hold 1 pin to be connected, to go out to hold 2 pin and three terminal regulator (6) to go into to hold 1 pin to be connected with three terminal regulator (13); Three terminal regulator (6) goes out end 2,3 pin and respectively goes into end 3 pin with modulator (5), amplifirer (4) respectively and is connected, computer (18) go out end 4 pin power supply+V voltage end by behind the interface circuit (17) and corresponding power supplys at different levels go into to hold and be connected.
2. information burst wireless transmission sensing target simulator according to claim 1, it is characterized in that digital pad (3) or (10) are by variable attenuator (21), driver (22) is formed, wherein microprocessor (7) or (15) respectively go out to hold 2 pin to go into to hold 9 pin to be connected by bus and driver (22), circulator (2) or amplifirer (4) go out each 2 pin of end and go into to hold 1 pin to be connected with variable attenuator (21), end 3 pin gone into by circulator (2) or receiver (11) goes into to hold 1 pin and variable attenuator (21) to go out to hold 8 pin to be connected, driver (22) respectively goes out end 2 to 7 pin difference series resistor R6 and respectively goes into to hold 2 to 7 pin to be connected to resistance R 1 back and variable attenuator (21), go into end 8 pin earth terminals, go into end 1 pin and go out end 5 pin with three terminal regulator (8) and is connected, respectively go out to hold 2 to 7 pin also respectively also connecting resistance R12 to resistance R 7 one ends; Resistance R 7 to the R12 other ends are all gone into end 2 pin with three terminal regulator (8) and are connect, and variable attenuator (21) is gone into end 9 pin and gone out to hold 4 pin to be connected, to go into end 10 pin earth terminals with three terminal regulator (8).
3. information burst wireless transmission sensing target simulator according to claim 1 and 2, it is characterized in that algorithm device (20) is by operational amplifier (23), analog switch (24), (25), (27), follower (26), (30), fixed attenuator (28), latch (29), (31) form, wherein D/A converter (19) scene 2 end is distinguished series resistor R13, respectively go into end 1 with operational amplifier (23) behind the R14,2 pin connect, and operational amplifier (23) is gone into end 1 pin and crosstalk resistance R16, capacitor C 2 backs go out end 3 pin and connect with it, go into end 2 pin and series resistor R15, capacitor C 1 back is held with ground and is connect, go into end 4 pin earth terminals, going into end 5 pin is connected with computer (18) power supply+V voltage end, going out end 3 pin goes into to hold 2 pin to be connected with analog switch (24); Analog switch (24) respectively go out end 3 to 10 pin respectively with analog switch (25) respectively go into end 3 to 10 pin is connected, goes out end 1 pin go into end 1 pin with analog switch (25) and connect after be connected in series capacitor C 4 backs again and go out to hold 3 pin, resistance R 17, R18 one end with follower (26) and connect, go into to hold 15 pin earth terminals, go into to hold 16 pin to be connected with computer (18) power supply+V voltage end; Analog switch (25) go into end 11 to 13 pin respectively with latch (31) go out end 11 to 13 pin is connected, goes out end 2 pin and follower (26) go into end 2 pin is connected after again and be connected in series earth terminals after capacitor C 3, the resistance R 22, go into to hold 15 pin earth terminals, go into to hold 16 pin to be connected with computer (18) power supply+V voltage end; Follower (26) is gone into end 1 pin and is connected with resistance R 17 other ends, resistance R 18 other ends and fixed attenuator (28) go into end 1 pin and connect after earth terminal behind the series resistor R19 again, follower (26) goes into end 4 pin earth terminals, go into end 5 pin is connected with computer (18) power supply+V voltage end; Fixed attenuator (28) is gone into end 2 to 5 pin and is gone out end 1 to 4 pin with analog switch (27) respectively and is connected, goes into end 7 pin earth terminals, go out to go into to hold 2 pin with follower (30) behind the end 6 pin series resistor R20 and connect; Follower (30) goes into end 2 pin and series resistor R21 earth terminal, go into end 1 pin go out end 3 pin with it and connect after is connected, goes into to hold 4 pin earth terminals again with external tested transducer inbound port A, go into to hold 5 pin to be connected with computer (18) power supply+V voltage end; Analog switch (27) is gone into end 5 to 8 pin and is gone out to hold 11 to 14 pin to be connected, to go into to hold 9 pin to be connected, to go into end 10 pin earth terminals with computer (18) power supply+V voltage end with latch (29) respectively; Latch (29) discrepancy end 1 to 7 pin is held 1 to 7 pin with latch (31) discrepancy end 1 to 7 pin and computer (18) discrepancy respectively and is connect, and latch (29), (31) are respectively gone into end 10 pin and gone out to hold 8,9 pin to be connected, respectively to go into end 8 pin earth terminals, respectively go into to hold 9 pin to be connected with computer (18) power supply+V voltage end with computer (18) respectively.
CN 97249194 1997-12-30 1997-12-30 Sensor target imitation device for surge information radio transmission Expired - Fee Related CN2335311Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 97249194 CN2335311Y (en) 1997-12-30 1997-12-30 Sensor target imitation device for surge information radio transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 97249194 CN2335311Y (en) 1997-12-30 1997-12-30 Sensor target imitation device for surge information radio transmission

Publications (1)

Publication Number Publication Date
CN2335311Y true CN2335311Y (en) 1999-08-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 97249194 Expired - Fee Related CN2335311Y (en) 1997-12-30 1997-12-30 Sensor target imitation device for surge information radio transmission

Country Status (1)

Country Link
CN (1) CN2335311Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100464602C (en) * 2003-09-18 2009-02-25 鼎桥通信技术有限公司 Testing device for mobile communication equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100464602C (en) * 2003-09-18 2009-02-25 鼎桥通信技术有限公司 Testing device for mobile communication equipment

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