CN2274348Y - Equiprecision fully-automatic frequency meter - Google Patents
Equiprecision fully-automatic frequency meter Download PDFInfo
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- CN2274348Y CN2274348Y CN 96224444 CN96224444U CN2274348Y CN 2274348 Y CN2274348 Y CN 2274348Y CN 96224444 CN96224444 CN 96224444 CN 96224444 U CN96224444 U CN 96224444U CN 2274348 Y CN2274348 Y CN 2274348Y
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Abstract
The utility model discloses a fully-automatic frequency meter with equal precision, which is composed of an amplifying and shaping circuit 1, a gate circuit 2, a counting circuit 3, a synchronous circuit 4, a timing circuit 5, a time-base circuit 6, a CPU circuit 7 and a display circuit 8, wherein, the synchronous circuit 4 is composed of a JK trigger 9 and a phase inverter 10; the amplifying and shaping circuit adopts the form, of the amplifying and shaping circuit which is an ultrawideband is prepositioned. The utility model can realize fully-automatic frequency measurement with high precision and equal precision, has the advantages of artful design, easy implementation, low cost, short measuring time, high measuring precision and strong measuring function, and is suitable for the frequency measurement of various electric signals.
Description
The utility model belongs to the electronic measuring instrument field, relates to a kind of frequency meter.
The performance of frequency meter depends primarily on measuring accuracy and measurement function.The measuring accuracy of existing frequency meter depends on two factors again, the mantissa's inherent quantization error (mantissa ± 1 quantization error) that produces during first counting, make frequency measurement accuracy be inversely proportional to the main error source when this is low frequency measurement by measured frequency; It two is time-base accuracies, can rationally solve by the time base that adopts suitable accuracy.In order to reduce the influence of first kind of error component, an improved way is to solve gate time by increasing, as being exactly to adopt this method to realize in the disclosed high-precision intelligent frequency meter of Chinese patent CN88218329.X, that but this way one is an efficient is low, lose time, the 2nd, its precision improves very limited, resolution as the 100S sampling also can only reach 0.01Hz, and the 3rd, the frequency values that records is the mean value of long period, some occasion can not satisfy request for utilization.
Simultaneously, can not be full-automatic when existing high precision frequency meter is measured, all automatic measurement of precision such as promptly can not realize, use inconvenient.
The purpose of this utility model provide a kind of low cost, etc. the full-automatic frequency meter of precision, can realize high precision, etc. precision, full-automatic frequency measurement (have be referred to as " fool's frequency meter "), have the advantage that design is ingenious, enforcement is easy, with low cost, Measuring Time is short, measuring accuracy is high, measurement function is strong, be suitable for the frequency measurement of various electric signal.
The realization the technical solution of the utility model is, it is by amplification and rectification circuit, gate circuit, counting circuit, synchronizing circuit, timing circuit, time base circuit, cpu circuit and display circuit are formed, it is characterized in that: (1) synchronizing circuit is made up of a JK flip-flop and a phase inverter, the J end of JK flip-flop links to each other with output terminal with the input end of phase inverter respectively with the K end, the J end of JK flip-flop links to each other with the I/O end of cpu circuit, the CK end of JK flip-flop links to each other the output terminal of JK flip-flop and gate circuit with the output terminal of amplification and rectification circuit, timing circuit links to each other with cpu circuit; (2) amplification and rectification circuit adopts ultrabroad band pre-amplification circuit form.
The utility model can realize etc. that the key of frequency measurement with constant-precision is that gate circuit is controlled by synchronizing circuit, and the negative edge of the front end pulse of the measured signal after the rising edge of the control signal of synchronizing circuit output and the amplification shaping is synchronous, and the negative edge of certain pulse of the measured signal after the negative edge of this control signal and the amplification shaping is synchronous, thereby make that the gate circuit opening time is the integral multiple in the cycle of measured signal, and then do not produce the intrinsic quantization error of mantissa (mantissa ± 1 quantization error) when guaranteeing counting, the frequency values f=N/T of measured signal, wherein N is the pulse number of gate circuit in the opening time, T is the gate circuit opening time, the frequency measurement accuracy of this method and the frequency of measured signal are just irrelevant, by the decision of gate circuit open-interval measuring accuracy, thereby realize that the low-and high-frequency signal is had same measuring accuracy---equal precision measurement.
Full-automatic function of the present utility model is under the prerequisite of equal precision measurement, automatically adapts to the measured signal of various amplitude sizes by the preposition amplification and rectification circuit of ultra broadband, and is realized from moving the range function by the software kit that deposits cpu circuit in.
Concise and to the point principle of work of the present utility model further specifies as follows: measured signal is imported from the amplification and rectification circuit input end, amplification and rectification circuit is output as the TTL digital signal of standard, the opening time of gate circuit is controlled by synchronizing circuit, synchronizing circuit is controlled timing circuit simultaneously, so that the beginning and ending time of timing and counting and gate circuit opening time are synchronous, counting circuit, timing circuit, display circuit links to each other with cpu circuit by the data bus form, when synchronizing circuit sends interrupt request, cpu circuit reads in and handles the data in counting circuit and the timing circuit, the measured signal frequency data of precision such as after handling, the high precision floating-point operation just can obtain, and select range automatically by software control by the frequency size of measuring, deliver to display circuit at last and show.
When beginning to measure, the I/O end of cpu circuit is to synchronizing circuit output high level, when negative edge appears in the measured signal after amplifying shaping, synchronizing circuit is output as high level, when cpu circuit is measured synchronizing circuit and is output as high level, continue to keep the I/O end to synchronizing circuit output high level a period of time, the length of this retention time is a fixed value that sets in advance (being typically 1S), afterwards, the I/O end is to the synchronizing circuit output low level, when negative edge occurring as if the measured signal after the amplification shaping at this moment, the synchronizing circuit output low level.
Below with reference to accompanying drawing the utility model is further described.
Fig. 1 is a functional-block diagram of the present utility model.
Fig. 2 is the electrical schematic diagram of the utility model synchronizing circuit.
Fig. 3 is that the utility model is synchronous, the counting sequence logical diagram.
Fig. 4 is the electrical schematic diagram of the utility model amplification and rectification circuit.
Fig. 5 is the utility model software flow pattern.
Referring to Fig. 1, Fig. 2, the utility model is by amplification and rectification circuit 1, gate circuit 2, counting circuit 3, synchronizing circuit 4, timing circuit 5, time base circuit 6, cpu circuit 7 and display circuit 8 are formed, synchronizing circuit is made up of a JK flip-flop 9 and a phase inverter 10, the J end of JK flip-flop 9 links to each other with output terminal with the input end of phase inverter 10 respectively with the K end, the J end of JK flip-flop 9 links to each other with the I/O end of cpu circuit, the CK end of JK flip-flop 9 links to each other with the output terminal of amplification and rectification circuit 1, the output terminal of JK flip-flop 9 and gate circuit 2, timing circuit 5 links to each other with cpu circuit 7, JK flip-flop 9 adopts 74S113, and phase inverter 10 adopts 74LS04.Counting circuit 3, timing circuit 5, display circuit 8 link to each other with cpu circuit 7 by the data bus form, when synchronizing circuit 4 is output as low level, promptly send interrupt request to cpu circuit, cpu circuit 7 reads in and handles the data in counting circuit 3 and the timing circuit 5, handle the measured signal frequency data of precision such as the back just can obtain through the high precision floating-point operation, and deliver to display circuit 8 demonstrations.It is main formation that cpu circuit adopts Intel 8031.
Referring to Fig. 3, behind the P1.0 output high level of the I/O end of CPU (Intel8031), when negative edge appears in the measured signal after amplifying shaping, synchronizing circuit is output as high level, the P1.0 of I/O end keeps the high level of 1S time again, and the P1.0 of I/O end is a low level afterwards, under this state, when the measured signal after the amplification shaping negative edge occurred again, synchronizing circuit was output as low level.The time length of synchronizing circuit output high level is T; The time inner gate circuit of synchronizing circuit output high level just has output, and it is output as N count pulse.
Referring to Fig. 4, amplification and rectification circuit 1 adopts ultrabroad band pre-amplification circuit form, by being mainly to constitute every straight protection and impedance matching circuit 11, three-stage amplifier 12, shaping and level shifting circuit 13.Be made up of Q1, D1, D2, C1, C2, C3, R1, R2, R3, W1 every straight protection and impedance matching circuit 11, three-stage amplifier 12 is that the master constitutes by Q2,2/3MC10116, and shaping and level shifting circuit 13 are that the master constitutes by 1/3 MC10116, Q3, Q4.Amplification and rectification circuit 1 is input as measured signal, is output as the TTL digital signal of standard.
Fig. 5 is the workflow diagram of cpu circuit software.
Claims (2)
1, the full-automatic frequency meter of precision such as a kind of, it is made up of amplification and rectification circuit 1, gate circuit 2, counting circuit 3, synchronizing circuit 4, timing circuit 5, time base circuit 6, cpu circuit 7 and display circuit 8, it is characterized in that:
(1) synchronizing circuit 4 is made up of a JK flip-flop 9 and a phase inverter 10, the J end of JK flip-flop 9 links to each other with output terminal with the input end of phase inverter 10 respectively with the K end, the J end of JK flip-flop 9 links to each other with the I/O end of cpu circuit, the CK end of JK flip-flop 9 links to each other the output terminal of JK flip-flop 9 and gate circuit with the output terminal of amplification and rectification circuit 1
2, timing circuit 3 links to each other with cpu circuit 7;
(2) amplification and rectification circuit 1 adopts the preposition amplification and rectification circuit form of ultrabroad band.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 96224444 CN2274348Y (en) | 1996-08-21 | 1996-08-21 | Equiprecision fully-automatic frequency meter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 96224444 CN2274348Y (en) | 1996-08-21 | 1996-08-21 | Equiprecision fully-automatic frequency meter |
Publications (1)
Publication Number | Publication Date |
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CN2274348Y true CN2274348Y (en) | 1998-02-11 |
Family
ID=33903429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 96224444 Expired - Fee Related CN2274348Y (en) | 1996-08-21 | 1996-08-21 | Equiprecision fully-automatic frequency meter |
Country Status (1)
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CN (1) | CN2274348Y (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102128979A (en) * | 2010-12-30 | 2011-07-20 | 上海自动化仪表股份有限公司 | Equal-precision frequency measuring circuit and frequency measuring method thereof |
CN103235178A (en) * | 2013-04-26 | 2013-08-07 | 河南科技大学 | Double-button equal-precision frequency meter and calculating method thereof |
CN105785122A (en) * | 2016-05-24 | 2016-07-20 | 南宁市茂百科技有限公司 | Digital cymometer |
-
1996
- 1996-08-21 CN CN 96224444 patent/CN2274348Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102128979A (en) * | 2010-12-30 | 2011-07-20 | 上海自动化仪表股份有限公司 | Equal-precision frequency measuring circuit and frequency measuring method thereof |
CN103235178A (en) * | 2013-04-26 | 2013-08-07 | 河南科技大学 | Double-button equal-precision frequency meter and calculating method thereof |
CN105785122A (en) * | 2016-05-24 | 2016-07-20 | 南宁市茂百科技有限公司 | Digital cymometer |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |