CN2261685Y

CN2261685Y - Carrier modulator controlled by keys

Info

Publication number: CN2261685Y
Application number: CN 96205965
Authority: CN
Inventors: 李永焜
Original assignee: Individual
Current assignee: Individual
Priority date: 1996-03-06
Filing date: 1996-03-06
Publication date: 1997-09-03
Anticipated expiration: 2006-03-06

Abstract

The utility model relates to a carrier modulator controlled by keys, and is provided with a primary coil, an input transformer of two secondary coils and a three-shifting electronic switch. The primary coil is connected with an output end of a preamplifier, the two secondary coils are symmetry to each other up and down, the two secondary coils have same polarity, and a middle connecting line of each of the two secondary coils is connected with the public ground. An upper passing circuit and a lower passing circuit of a back stage of the three-shifting electronic switch are independent to each other, and the three-shifting electronic switch is controlled by a control circuit. The utility model has the advantages of novel design and reliable communication, and is not influenced by the external interference, the information quantity of the transmission is large, the congested phenomenon of the communication channel can be remarkably relieved, and the frequency resource can be fully utilized. When the utility model is used, a modulated signal is transmitted by the utility model, the modulated signal is modulated by the amplitude and is utilized to represent each corresponding sinusoidal carrier having the information code, and thus, the distortion is small, and the security is high.

Description

The amplitude keying carrier modulator

The utility model relates to the digital information transmission method in the communication technology, relates in particular to a kind of amplitude keying carrier modulator.

Amplitude keying modulator approach in the existing digitally modulated carrier communication system is to represent a digital modulation pulse signal with some Zhou Zaibo through amplitude modulation(PAM), causes frequency resource not to be fully utilized.For remedying the deficiencies in the prior art applicant a kind of amplitude keying carrier modulating method is proposed, this method, useful information sampling that earlier will be to be transmitted quantizes to be transformed into a string digital pulse signal of representing with the form of numeral 0 and 1, in chronological sequence an order and an encoding law that the receipts communicating pair is set are in advance encoded then, and in cataloged procedure, insert and discern, the pulse code of odd even and frame signal, to form a lot of digital modulation pulse train, modulate with the amplitude of this sequence offset of sinusoidal carrier wave again, the width that it is characterized in that each pulse in this link digitals modulated pulse trains equated with the cycle of carrier wave and the last pulse back edge of adjacent two pulses overlaps with the forward position of back one pulse, and all add error correcting code in the back of every frame signal, the overall width of this link digitals pulse equates with the frequency numerical value of carrier wave, can the corresponding insignificant digit pulse of additions and deletions before the afterbody of this link digitals pulse or error correcting code in each frame signal, overall width is equated with the frequency numerical value of carrier wave; With each week of above-mentioned a lot of digit pulse amplitude keying carrier wave, promptly with each all sinusoidal carrier wave through corresponding each message code of amplitude modulation(PAM) representative, the frequency of transmitting terminal modulated signal is that the frequency of carrier wave is identical with being subjected to tonal signal.

Another purpose of the present utility model is to propose a kind of amplitude keying carrier modulator of implementing the amplitude keying carrier modulating method.

The purpose of this utility model is achieved by the following technical programs.

Transmit leg adopts the amplitude keying carrier modulator, aforesaid a lot of digital modulation pulse train is modulated the carrier wave with fixed frequency, export a frequency and still be carrier frequency, phase place or 0 or 180 °, amplitude or 0 or 1 modulated signal, the input/output relation of setting modulator is: input digit modulating pulse 11 continuously, corresponding output phase is 0, amplitude is two all sine-shaped, sinusoidal modulated waves of 1, input digit modulating pulse 10 continuously, corresponding output phase place the last week is 0, amplitude be 1 sinusoidal then the preceding half cycle phase place in a week be 180 °, amplitude is that 1 sinusoidal and second half phase place are 180 °, amplitude is 0 modulated wave, input digit modulating pulse 00 continuously, and when the last pulse when 00 is 1, the half cycle phase place is 180 ° before the corresponding output, amplitude also is 1 a sinusoidal and the second half phase place is 180 °, amplitude be 0 and the back one all phase places be 0, amplitude also is 0 modulated wave, input digit modulating pulse 00 continuously, and when the last pulse when 00 also is 0, corresponding output phase is 0, amplitude also is two all modulated waves of 0, input digit modulating pulse 01 continuously, and when the last pulse when 01 is 1, the half cycle phase place is 180 ° before the corresponding output, amplitude is 180 ° in 1 sinusoidal and a second half phase place, amplitude be 0 and the back one all phase places be 0, amplitude is 1 sine-shaped, sinusoidal modulated wave, input digit modulating pulse 01 continuously, and when the last pulse when 01 was 0, corresponding output phase place the last week was 0, amplitude also is 0, back one all phase places are 0, amplitude is 1 sine-shaped, sinusoidal modulated wave.Above-mentioned amplitude is that 0 or 1 modulated wave is comparatively speaking, and in fact amplitude is still certain amplitude can be arranged at 0 o'clock, but very little with respect to 1.In addition, in the modulator late-class circuit, can not be provided with the resonant circuit that resonance frequency equals carrier frequency, and in transmission course, electricity can not be provided with this resonant circuit.

This amplitude keying carrier modulator, comprise that one is connected to the preamplifier and the power amplifier that is connected to the transmitting system prime of carrier generator output, it is characterized in that being provided with on primary coil being connected to the preamplifier output and two, following symmetry and the identical intermediate connection of polarity be connected to the input transformer of the secondary coil on public ground, and thereafter the level on, the three gear electronic switches that are controlled by control circuit that underpass is separate, this control circuit has the two-way input control signal, one the tunnel is the width digital modulation pulse identical with carrier cycle, another road is to be half false impulse of carrier cycle in the cycle, on the three gear electronic switches, following gear with the carrier modulation of preamplifier output after respectively through last, underpass is transported to power amplifier, middle gear with the carrier wave of preamplifier output through public ground short circuit.

The utility model is novel, reliable communications, what its transmitted is that each has the sinusoidal carrier modulated signal of message code to the representative of process amplitude modulation(PAM) accordingly, distortion is little, strong security is not subject to external interference, but the information transmitted amount is big, can alleviate the crowded phenomenon of channel significantly, make full use of frequency resource.

The utility model has the following drawings:

Fig. 1 is that circuit at different levels are formed block diagram before adopting the utility model;

Fig. 2 is the oscillogram of embodiment circuit of the present utility model;

Wherein (a) is to be the carrier signal waveform figure of T0 in the cycle

(b) be digital modulation pulse code signal 110010 oscillograms

(c) being is the auxiliary pulse signal oscillogram of T0/2 in the cycle

(d) be corresponding sinusoidal digital code ripple oscillogram after recipient's demodulation

(e) be modulated signal oscillogram after the transmit leg modulation

Fig. 3 is the composition block diagram of amplitude keying carrier modulator of the present utility model;

Fig. 4 is the embodiment circuit diagram of amplitude keying carrier modulator of the present utility model.

Below in conjunction with embodiment and contrast accompanying drawing the utility model is made an explanation.

Transmit leg signal source 1～n to be sent is at first through separately filter amplifier, select a frequency band to be transmitted, 0～3400 of the audio frequency voice signal hertz of frequency band for example, deliver to sample circuit separately then, sample circuit is single taking turns to operate, sample circuit is controlled by clock-pulse generator, and its operating frequency is several times as much as the highest frequency of signal to be transmitted.Clock-pulse generator is before making first sample circuit work, at first allow frame synchronousing signal generator send a synchronizing signal, directly give shaping circuit, in like manner after hours at n sample circuit, allow n+1 error correction circuit send a string error correction pulse to shaping circuit, the signal pulse that sample circuit takes out is delivered to coding circuit and is carried out A/D conversion and also string conversion, produce a lot of digital modulation pulse, at first be frame synchronization, be the 1st or n pulse then, be at last n+1 error correction pulse through shaping, be sent to modulators modulate again, produce modulated signal, directly send through outside line.Whole system operation speed is to determine one by one respectively by the carrier wave that carrier generator produces, carrier wave is also given clock circuit except that sending to modulator, produce the various clock signals of circuit working, give clock-pulse generator again, produce various work lock-out pulses.The utility model is based on the energy offset principle, after import all amplitudes to resonant circuit be 1 signal, requiring next all sine wave is 0, be 1 and phase place is 180 ° a carrier wave to resonant circuit input half cycle amplitude just in next week, thereby the dump energy of output the last week makes resonant circuit be output as 0 the actual of this week in the bucking circuit.After the carrier wave of exporting from carrier generator 1 in the modulator of embodiment is exaggerated device 2 amplifications, deliver to resonance transformer T1, two groups of amplitudes of its secondary output size is consistent, but the output signal A and the B of 180 ° of phase phasic differences, signal A passes through electronic switch 3 with B and delivers to power amplifier 4.When nil modulating pulse 7 inputs, electronic switch 3 is in the G position, the output of nil carrier signal.When digital modulation pulse 1 of input, control circuit 5 make electronic switch 3 from the G position to the A position, have this moment all sine wave signals to be exaggerated device 4 and amplify back output by electronic switch 3.Back to back after digital modulation pulse 1 of input is 0, promptly imports 10, on the back edge of last pulse 1, control circuit 5 make electronic switch 3 from the A position to the B position.The time that stops in the B position is the half cycle sinusoidal period, then under the control of false impulse 6, make electronic switch 3 from the B position to the G position.This moment, amplifier 4 amplified the half cycle sine wave, and this half cycle sine wave is from B position input, phase place with aforesaid one week sine wave 180 ° of phasic differences mutually, but amplitude both are identical.Control circuit 5 makes electronic switch 3 open and close according to the rule of the input/output relation of setting under the dual input control of digital modulation pulse 7 and false impulse 6, exports corresponding modulated signal.

In the amplitude keying carrier modulator embodiment circuit shown in Fig. 4, IN1 is the carrier wave from carrier generator 1, transistor VT1 and output transformer T1 form amplifier 2, IN2 is the digital modulation pulse from prime, IN3 is the false impulse of input, transistor VT2, VT3 and form electronic switch 3 and control circuit 5 by flip and flop generator and transistor VT9 that transistor VT6, VT7 form, transistor VT4, VT5 and output transformer T2 form power amplifier 4, and transistor VT8 is that inverter OUT is the modulated signal of this modulator output.

During no modulating pulse, the carrier wave that transistor VT1 sends IN1 here amplifies and is divided into two road signal A and the B that phase place is identical, amplitude equates.If IN2 does not have modulating pulse, the base stage of transistor VT2, VT3 all is a high level, transistor VT2, VT3 conducting, short circuit the carrier wave of A and B, back level transistor VT4, VT5 no-output, always be output as 0, suppose that the digital modulation pulse is 110010, when the modulating pulse of IN2 is 1, make the base stage of transistor VT2 become low level through inverter VT8, transistor VT2 ends, and transistor VT3 is still conducting.Carrier wave is transported to transistor VT4 from A, and the collector electrode of transistor VT4 is connected to the 0 phase place input C of output transformer T2, exports all phase places and be 0, amplitude is 1 sine wave.If next the IN2 modulating pulse is still 1, as above-mentioned, still export all phase places and be 0, amplitude is 1 sine wave.Suppose that the modulating pulse of following after 11 is 00, when second 1 lower edge of modulating pulse is come then, a positive spike has triggered the flip and flop generator of being made up of transistor VT6, VT7, make its upset, the transistor VT9 that is located at the flip and flop generator input can sponge the false impulse of IN3 during this, guarantees that flip and flop generator overturns reliably.The result of upset is that transistor VT3 ends, and transistor VT2 is owing to modulating pulse is 0 to become conducting, short circuit the A carrier wave, and the B carrier wave is sent to 180 ° of phase place input D that transistor VT5 amplifies and transport to output transformer T2, always is output as the half cycle phase place and is 180 °, amplitude and be 1 sine wave.Because the time of flip and flop generator upset is the cycle of half modulating pulse only, turned back original state by short its of false impulse IN3 again, so the second half output phase is 180 °, amplitude also is 0 sine wave, ensuing second modulating pulse 0, owing to still keep transistor VT2, VT3 conducting, output phase is 0, amplitude is still 0 sine wave.Then the modulating pulse after 00 is 10 o'clock, and transistor VT2 is by a modulating pulse cycle, and it is exported, and 1 all phase places are 0, amplitude is 1 sine wave.When modulating pulse became 0 by 1, as described above, overturn half modulating pulse week after date of flip and flop generator turned back, export half same-phase and be 180 °, amplitude and be 1 and phase place be that 180 °, amplitude are that week of 0 is sinusoidal wave.

Claims

1, a kind of amplitude keying carrier modulator, comprise that one is connected to the preamplifier and the power amplifier that is connected to the transmitting system prime of carrier generator output, it is characterized in that being provided with on primary coil being connected to the preamplifier output and two, following symmetry and the identical intermediate connection of polarity be connected to the input transformer of the secondary coil on public ground, and thereafter the level on, the three gear electronic switches that are controlled by control circuit that underpass is separate, this control circuit has the two-way input control signal, one the tunnel is the width digital modulation pulse identical with carrier cycle, another road is to be half false impulse of carrier cycle in the cycle, on the three gear electronic switches, following gear with the carrier modulation of preamplifier output after respectively through last, underpass is transported to power amplifier, middle gear with the carrier wave of preamplifier output through public ground short circuit.