CN2257937Y - Multi-user system data dual real time duplicating instrument - Google Patents

Abstract

The utility model relates to a multi-user system data dual real time duplicating instrument, which comprises a single-chip microcomputer control circuit composed of a single-chip microprocessor, an external data memory, a latch, a trigger, a clock circuit, a reset circuit and a switch, a communication control circuit composed of two asynchronous communication controllers, a dual decimal counter and a clock circuit and an interface circuit composed of two senders, two receivers and three sockets. The utility model can realize the data real time duplication after being connected according to the short range or the long range. The use of the instrument does not need to change the original software environment and application software of the computer system of the user, and the utility model is suitable for all the microcomputer users using the multi-user operating system, such as UNIX, XENIX, etc.

Description

The multi-user system data two-shipper instrument of backing up in realtime

The utility model relates to record carrier from a conveyer to another place.

Computing machine is widely used in increasing technical field.The real-time control and the management system of many middle and small scales are used multi-user system in large quantities, and anxious problem to be solved is how to guarantee data safe and reliable in the multi-user system operational process, and the method that adopts is for example at present:

1. two disk mirroring systems of single host are that the independently disk of same capability of the interface card that can support pair disk mirroring work and two is installed in main frame.This card is intelligent, has corresponding software.Main frame with the fast data buffer district of data transmission to the card, is handled read-write to two disks by the CPU on the card by bus, and two disks are set as master and back-up disk when mounted respectively.When master breaks down, from back-up disk, read and write data, error message is pointed out by the pilot lamp on the interface card.This method can be used for multi-user system, also can be used for DOS, network system, but owing to be the single host operation, the reliability of system is not high, and when main frame itself broke down, total system just can not be worked.

2. network mirror image server connector is to be equipped with two identical main frames in system, and the hardware configuration of main frame must be in full accord.Except being connected to two main frames on the network, respectively adorning a network disk mirror image card on two main frames, and interconnect by concentric cable by network interface card.By the corresponding software on the network, realize data backup, owing to realized the work of two-shipper full duplex mode, the reliability of system improves greatly, but this mode only is applicable to network system, can not be used for multi-user system.

The purpose of this utility model is that it provides a kind of and be applicable to the microcomputer multi-user system, uses the work of two-shipper full duplex mode, realizes the instrument of data real time backup, so that overcome the problem that background technology exists.

For achieving the above object, the technical scheme that the utility model adopted is: it comprises single chip machine controlling circuit, communication control circuit and interface circuit.Single chip machine controlling circuit: comprise chip microprocessor U1, external data memory U2, latch U3, trigger U4, by crystal oscillator X1, the clock circuit that capacitor C 1, C2 form, by resistance R 1, R2, capacitor C 3, the reset circuit that switch J4 forms.(P0.0～P0.7) is the data bus (DATA BUS) of single-chip microcomputer to the I/O port P0 of U1, and forming low eight bit address lines (L-ADDRESS BUS) A0～A7 of the outside expansion of single-chip microcomputer by U3, (P2.0～P2.7) be high eight-bit address wire (H-ADDRESS BUS) A8～A15 of single-chip microcomputer outside expanded circuit to the I/O port P2 of U1.(P1.0～P1.7) connect 8 way switch SW1 is used for the state setting of this instrument to the I/O port P1 of U1, comprises working method setting, communication baud rate setting, verification mode setting and the long-range setting of short range.Trigger U4 links to each other with U1 by data bus (DATA BUS), is used to control pilot lamp D1, D2, D3, through not gate U12:A gating, is passed through its CLK port triggering by the A13 in the high address bus (H-ADDRESS BUS) by the write signal WR of U1.Middle fracture INTO, the INTI of chip microprocessor U1, communication port TXD, RXD, (WR RD) is used for Communication Control in read-write control.Communication control circuit: comprise two asynchronous communication controller U5, U6 and two decade counter U7, the data port D0 of U5, U6～D7 order sheet machine data bus (DATA BUS), the address wire A0 of U5, U6～A2 and gating mouth CS0, CS2 connect the address bus of single-chip microcomputer, the address wire A14 of single-chip microcomputer directly links the CS1 of U6, and link U5 by not gate U12:B CS1 is arranged, realize gating in turn.The MR of U5, U6 all links the reset circuit (RESET) of U1, crystal oscillator X2 and capacitor C 4, C5, C6, and resistance R 7, R8, not gate U12:C, U12:D form the clock circuit of asynchronous communication controller, and it is exported through the U7 frequency division, sends into the XTAL1 of U5 and U6.U5 and U6 be from separately INTPRT mouth, and through not gate U12:E and U12:F, INT0 and INT1 mouth by U1 interrupt to the chip microprocessor application.The I/O port of U5 and U6 can be divided into two groups, and one group is serial input SIN, and serial output SOUT is used for the short range Communication Control.Another group sends RTS for request, sends to finish CT8, and data set ready DSR, data terminal ready DTR is used for the control of modulator-demodular unit (MODEM).These two groups of I/O ports all are connected to interface circuit, link to each other with socket J1, J2, J3 by interface circuit.Interface circuit comprises two transmitter U8, U9 and two receiver U10, U11 and socket J1, J2, J3.The effect of U8, U9, U10, U11 is a level conversion, with the standard RS-232 communication interface coupling of outside.Wherein U8 and U9 are that signal sends, and U10 and U11 are that signal receives.J1, J2, J3 are three D type sockets of this instrument, and wherein J1 is 25 cores, is used for being connected with terminal; J2, J3 are 9 cores, are used to connect two main frames.

The utility model is compared with background technology, and the useful effect that has is:

1. the data of being sent by terminal are divided into two after this instrument is handled and send into two main frame storages respectively, and realization data two-shipper is backed up in realtime, and two data that main frame returns unite two into one after the verification of this instrument, send terminal back to, guarantee that data are correctly reliable;

2. if two main frame return datas are inconsistent, this instrument is reported to the police automatically, and provides prompting on terminal, so that handle;

3. when having one to break down as if two main frames, this instrument is reported to the police automatically and also provide prompting on terminal.Switch to separate unit host work state this moment, makes system's operation as usual.After fixing a breakdown, switch to the two-shipper duty again;

4. two microcomputers as main frame not being had specific (special) requirements, can be similar type, also can be different type of machines, different configurations, different travelling speed;

5. use this instrument to need not to change user original computer system software environment and application software, be applicable to the microcomputer user that all use multi-user operating systems such as UNIX, XENIX, guarantee safe and reliable and system's continuous working of user data.

Below in conjunction with accompanying drawing, the utility model is further described.

Fig. 1, structured flowchart of the present utility model;

Fig. 2, single chip machine controlling circuit figure of the present utility model;

Fig. 3, communication control circuit figure of the present utility model;

Fig. 4, interface circuit figure of the present utility model;

Fig. 5, with The whole control system short range connected mode block diagram;

Fig. 6, with the long-range connected mode block diagram of The whole control system.

As shown in Figure 1, the utility model is by single chip machine controlling circuit, and communication control circuit and interface circuit are formed.

As shown in Figure 2, single sheet machine control circuit of locating: comprise that chip microprocessor U1 (8751), external data memory U2 (6264), latch U3 (74LS373), trigger U4 (74LS377), clock circuit, reset circuit and 8 way switch SW1 (SW-D1P8) form.As shown in Figure 3, communication control circuit: comprise two asynchronous communication controller U5 and U6 (being 8250), two decade counter U7 (74LS390), clock circuit composition.As shown in Figure 4, interface circuit comprises that two transmitter U8, U9 (MC1488), two receiver U10, U11 (MC1489), three D type socket J1, J2, J3 form, and wherein J1 is 25 cores, is used for being connected with terminal; J2, J3 are 9 cores, are used to connect two main frames.

As shown in Figure 5, as the short range connected mode, 1 and 2 is two master servers as multi-user's dual systems, can be super microcomputer or common computer, and 4 is ordinary terminal, 3 is this instrument, J1, J2, three D types of J3 socket are arranged on it, and the standard RS-232 serial communication interface of terminal 4 is 25 core D type plugs, and the J1 with this instrument 3 links to each other by cable, master server 1 and 2 standard RS-232 serial communication interface also are 25 core D type plugs, link to each other with J2, the J3 of this instrument respectively by cable.

As shown in Figure 6, as long-range connected mode, promptly between the terminal in the short range connected mode 4 and this instrument 3, insert a pair of modulator-demodular unit (MODEM) 5 and 6.Be that ordinary telephone line connects between the modulator- demodular unit 5 and 6, between terminal 4 and the modulator-demodular unit 6, be the RS-232 interface line of standard between the J1 of modulator-demodular unit 5 and this instrument 3. Master server 1 and 2 with J2, the J3 of this instrument 3 between connect identical with the short range connected mode, in fact, in the short range connected mode, only use RXD, TXD, three lines the most basic of GND, in long-range connected mode, then increased RTS, CTS, DTR, DSR, five lines of DCD.

After short range or remote mode connected system, just the two-shipper that can realize data is backed up in realtime, by the data of terminal by RS-232 interface output, be input to this instrument 3 by socket J1, after treatment, data are divided into two, respectively by socket J2, J3, output to the RS-232 interface of two main frames, deposit in the storage device of two main frames; The data of being returned by two main frames are input to this instrument from separately RS-232 interface by J2 and J3, after the verification unanimity, data are united two into one, and output to terminal by J1.

Claims (1)

1. A kind of multi-user system data two-shipper instrument of backing up in realtime is characterized in that:

   1) single chip machine controlling circuit: comprise chip microprocessor U1, external data memory U2, latch U3, trigger U4, the clock circuit of forming by crystal oscillator X1, capacitor C 1, C2, by resistance R 1, R2, capacitor C 3, the reset circuit that switch J4 forms; I/O port P0.0～P0.7 of U1 is the data bus of single-chip microcomputer, and form the low eight bit address bus A0～A7 of the outside expanded circuit of single-chip microcomputer by U3, I/O port P2.0～P2.7 of U1 is the high eight-bit address bus A8～A15 of the outside expanded circuit of single-chip microcomputer, I/O port P1.0～P1.7 of U1 connects 8 way switch SW1 trigger U4 and links to each other with chip microprocessor U1 by data bus, be used to control pilot lamp D1, D2, D3, by the A13 in the bus of high address through not gate U12:A gating, the middle fracture INTO of chip microprocessor U1, INTI, communication port TXD, RXD, read-write control WR, RD is used for Communication Control;

   2) communication control circuit: comprise two asynchronous communication controller U5, U6 and two decade counter U7; U5, the data port D0 of U6～D7 connects the data bus of single-chip microcomputer, U5, the address wire A0 of U6～A2 and gating mouth CS0, CS2 connects the address bus of single-chip microcomputer, the address wire A14 of single-chip microcomputer directly links the CS1 of U6, and link the CS1 of U5 by not gate U12:B, U5, the MR of U6 all links the reset circuit of U1, crystal oscillator X2, capacitor C 4, C5, C6, resistance R 7, R8, not gate U12:C, U12:D forms the clock circuit of asynchronous communication controller, its output is sent into U5 through the U7 frequency division, the XTAL1 of U6, U5, U6 from separately INTPRT through not gate U12:E and U12:F, INTO and INTI mouth by U1 interrupt to the chip microprocessor application, the I/O port of U5 and U6 can be divided into two groups, and one group is serial input SIN, serial output SOUT is used for the short range Communication Control; Another group is used for the control of modulator-demodular unit for request sends RTS, sends and finish CTS, data set ready DSR, data terminal ready DTR; These two groups of I/O ports all are connected to interface circuit, link to each other with socket J1, J2, J3 by interface circuit;

   3) interface circuit: comprise two transmitter U8, U9 and two receiver U10, U11 and socket J1, J2, J3, U8, U9, U10, U11 are level conversion, standard RS-232 communication interface coupling with the outside, U8 and U9 are that signal sends, U10, U11 are that signal receives, socket J1 is connected with terminal, and socket J2, J3 connect two main frames.

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