CN2256702Y

CN2256702Y - Analyzer for ultraslow rising and falling of brain wave

Info

Publication number: CN2256702Y
Application number: CN 96244175
Authority: CN
Inventors: 邹敏伟; 蒋文艳; 周易水
Original assignee: CHINA HUAYANG INTERNATIONAL TECHNOLOGY Co
Current assignee: Chongqing Wanfeng Industry Co., Ltd.
Priority date: 1996-11-21
Filing date: 1996-11-21
Publication date: 1997-06-25
Anticipated expiration: 2006-11-21

Abstract

The utility model relates to an analyzer for ultraslow rising and falling of brain waves, which is used for detecting the brain function and the neurochemistry medium level and belongs to the medical detecting instrument. Amplified brain wave signals are output by a brain wave amplifier 1 to a time sampling and data preprocessing apparatus 2. The timing sampling and data preprocessing apparatus is composed of a microprocessor, a data memory, a program memory, a demultiplexer, an analog-to-digital converter, a latch unit, and auxiliary elements, can independently complete timing analog-to-digital conversion and data preprocessing for the brain wave signals, and then transfers the processed data to a personal computer 3.

Description

The super slow fluctuation analyser of brain electricity

This utility model relates to a kind of brain electro-detection analytical tool, belongs to medical apparatus and instruments, especially can detect the analytical tool of the super slow the fluctuation phenomenon that exists in the identification brain electricity by tens brain wave patterns to dozens of minutes.

At present, conventional brain electro-detection only writes down several seconds to tens seconds long brain wave patterns, and is that several hertz to tens hertz signal composition carries out check and analysis to the waveform medium frequency only.Though the portable brain electric monitor can write down 24 hours brain wave patterns, analyzing and processing and conventional brain electro-detection are roughly the same, and therefore, above-mentioned brain electro-detection can only be made diagnosis to limited several state of an illness such as epilepsies, has limited the range of application of brain electro-detection greatly.

According to the super slow theory of fluctuation of brain electricity, having frequency in the brain electricity is that the number millihertz is now to the super slow cycle variation now of hundreds of millihertzs, this changes on reflection brain function and neuro chemistry dielectric distribution, and has deeper significance on to brain physiology, pathological analysis.

The purpose of this utility model provides the super slow fluctuation analyser of a kind of brain electricity, serves as to count millihertz now to hundreds of millihertzs periodic signal composition now to extract above-mentioned brain electricity medium frequency, carries out the analysis of brain function and neuro chemistry medium situation.

The purpose of this utility model is achieved in that

The super slow fluctuation analyser of a kind of brain electricity, give blood processor by eeg amplifier, timing sampling and data, personal computer is formed by connecting, it is characterized in that: the EEG signals of eeg amplifier 1 output connects the input that timing sampling and data are given blood processor, and timing sampling links to each other with the expansion bus of personal computer with the output that data are given blood processor.

Timing sampling and data are given the P of the microprocessor U13 in the blood processor ₀₀～P ₀₇The D of port and latch U10, data storage U6, program storage U7, analog-digital converter U4, U5 ₀～D ₇Port joins, and with the θ of latch U8 ₀～θ ₇Port joins, the θ of latch U10 ₀～θ ₇The A of port and U6, U7 ₀～A ₇Port joins, and with the D of U9 ₀～D ₇Port joins, the P of U13 ₂₀～P ₂₄The A8 of port and U6, U7～A12 port joins, the P of U13 ₂₅～P ₂₇Join the PSEN port of U13 and the E of U11 with A, B, the C port of decoder U11 ₁, E ₂Join the Y of U11 ₀Join the Y of U11 with CE and the OE of U7 ₁Join the Y of U11 with the OE of U8 and the CD end of trigger U14:A ₃Join the Y of U11 with the WR end of U4, U5 ₄Link to each other the Y of U11 with the RD end of U4 ₅Link to each other the Y of U11 with the RD end of U5 ₇Link to each other with the CLK end of latch U9 and the SD end of trigger U14:B.

Timing sampling and data are given the D of the latch U8 in the blood processor ₀～D ₇The θ of end and U9 ₀～θ ₇End is connected to the socket P that connects computer ₂A ₂～A ₉End, the A of decoder U12, B, C end and P ₂A ₃₁, A ₃₀, A ₂₄Join the E of U12 ₁With P ₂A ₂₂Join, the 6th and 11 feet of bus driver U15:B and U15:D meet P ₂A ₉, A ₈End.The EEG signals of eeg amplifier output is through D ₁Socket is introduced timing sampling and data are given blood processor, D ₁The signal introduced of the 1st～8 foot behind the ripple of RC Lu, be connected to the X of demultplexer U1 ₀～X ₇, D ₁The signal introduced of the 14th～21 foot behind the ripple of RC Lu, meet the X of demultplexer U3 ₀～X ₇, U ₁X end connect the input of U2:A through resistance, Vin (+) end of the output termination U4 of U2:A, the X end of U3 connects the input of U2:B through resistance, Vin (+) end of the output termination U of U2:B, the A of U1 and U3, B, C end are connected to the P of U13 ₁₀～P ₁₂End.

The utility model is described in further detail below in conjunction with drawings and Examples.

Fig. 1 is a structure chart of the present utility model, for each electrical connection partly of expression, is the back side of the present utility model shown in the figure.

Fig. 2 is the circuit theory diagrams that timing sampling of the present utility model and data are given blood processor.

Timing sampling and data are given blood processor by microprocessor, program storage, data storage, demultplexer, latch, analog-digital converter, linear amplifier, decoder and bus driver are formed, microprocessor produces by quartz oscillator fixed frequency work, can realize accurate timing, by microprocessor empty system demultplexer and analog-digital converter, can be with D ₁The 1st～8 foot and two groups of EEG signals introducing of the 14th～21 foot carry out analog to digital conversion in pairs simultaneously, and after the data after the conversion are given processing, send the personal computer storage in batch to, show, handle.

When carrying out the EEG signals sampling, the P of microprocessor U13 ₁₀～P ₁₃Output brain electric conductance connection gating signal, these three lines are connected to control end A, B, the C of demultplexer U1 and U3 simultaneously, U1 and U3 will deliver to U4, U5 respectively with paired two signals that lead in above-mentioned two groups of EEG signals simultaneously like this, and microprocessor U13 is through the Y of decoder U11 ₃The WR end that U4 and U5 are delivered in the analog digital conversion order that end sends simultaneously starts this two-way analog digital conversion.The data output of U4, U5 then is by the Y of microprocessor U13 through decoder U11 ₄And Y ₅Control respectively.

Giving blood processor will send data to personal computer the time when timing sampling and data, is the θ through U10 ₀～θ ₇End writes latch U9's, and through the outfan θ set of the SD of U14:B end with trigger U14:B, this signal is through gate S simultaneously ₂Be connected to P ₂B ₂₂～B ₂₅In arbitrary end on, send data transmission requests to computer, when computer reads data, be Y by decoder U12 ₁End exports the OE end of latch U9 to, makes the U9 latched data through θ ₀～θ ₇End is delivered to P ₂A ₂～A ₉End, simultaneously, the Y of U12 ₁End also is connected to the CD end of U14:B, and with trigger U14:B zero clearing, the expression data are taken away.

In the present embodiment, the data transmission that timing sampling and data are given between blood processor and the computer is to adopt the computer bus mode, do not take the serial or parallel communication port of computer, because timing sampling and data are given processing and all be need not the computer participation, this just greatly reduces the requirement of the super slow fluctuation analyser of brain electricity to computing power, help reducing the production cost of the super slow fluctuation analyser of brain electricity, each function partly of analyser is distributed rationally, has also improved the analyser whole reliability.

Claims

1, the super slow fluctuation analyser of a kind of brain electricity, by eeg amplifier, timing sampling and data give blood processor, personal computer is formed by connecting, it is characterized in that: the EEG signals of eeg amplifier 1 output connects the input that timing sampling and data are given blood processor, and timing sampling links to each other with the expansion bus of personal computer with the output that data are given blood processor.

2, the super slow fluctuation analyser of brain electricity according to claim 1, it is characterized in that: timing sampling and data are given the P of the microprocessor U13 in the blood processor ₀₀～P ₀₇The D of port and latch U10, data storage U6, program storage U7, analog-digital converter U4, U5 ₀～D ₇Port joins, and with the θ of latch U8 ₀～θ ₇Port joins, the θ of latch U10 ₀～θ ₇The A of port and U6, U7 ₀～A ₇Port joins, and with the D of U9 ₀～D ₇Port joins, the P of U13 ₂₀～P ₂₄The A8 of port and U6, U7～A12 port joins, the P of U13 ₂₅～P ₂₇Join the PSEN port of U13 and the E of U11 with A, B, the C port of decoder U11 ₁, E ₂Join the Y of U11 ₀Join the Y of U11 with CE and the OE of U7 ₁Join the Y of U11 with the OE of U8 and the CD end of trigger U14:A ₃Join the Y of U11 with the WR end of U4, U5 ₄Link to each other the Y of U11 with the RD end of U4 ₅Link to each other the Y of U11 with the RD end of U5 ₇Link to each other with the CLK end of latch U9 and the SD end of trigger U14:B.

3, the super slow fluctuation analyser of brain electricity according to claim 1, it is characterized in that: timing sampling and data are given the D of the latch U8 in the blood processor ₀～D ₇The θ of end and U9 ₀～θ ₇End is connected to the socket P that connects computer ₂A ₂～A ₉End, the A of decoder U12, B, C end and P ₂A ₃₁, A ₃₀, A ₂₄Join the E of U12 ₁With P ₂A ₂₂Join, the 6th and 11 feet of bus driver U15:B and U15:D meet P ₂And A ₉, A ₈End.

4, the super slow fluctuation analyser of brain electricity according to claim 1, it is characterized in that: the EEG signals of eeg amplifier output is through D ₁Socket is introduced timing sampling and data are given blood processor, D ₁The signal introduced of the 1st～8 foot behind the ripple of RC Lu, be connected to the X of demultplexer U1 ₀～X ₇, D ₁The signal introduced of the 14th～21 foot behind the ripple of RC Lu, meet the X of demultplexer U3 ₀～X ₇, the X of U1 holds the input that meets U2:A through resistance, Vin (+) end of the output termination U4 of U2:A, and the X of U3 holds the input that meets U2:B through resistance, Vin (+) end of the output termination U5 of U2:B, the A of U1 and U3, B, C end are connected to the P of U13 ₁₀～P ₁₂End.