CN2253554Y

CN2253554Y - All channel pager

Info

Publication number: CN2253554Y
Application number: CN 96201972
Authority: CN
Inventors: 王家隆
Original assignee: Individual
Current assignee: Individual
Priority date: 1996-02-05
Filing date: 1996-02-05
Publication date: 1997-04-30
Anticipated expiration: 2006-02-05

Abstract

The utility model relates to an all channel pager, which is composed of a radio frequency receiving circuit and a microprocessor control circuit. The radio frequency receiving circuit and a frequency synthesizer comprise a voltage controller, a phase comparator, and a frequency dividing circuit on which different division frequencies can be set, and the frequency dividing circuit can obtain different output frequencies correspondingly and can serve as the local oscillation of the receiving circuit; radio frequency carrier signals with binary codes can be detected by a mixer; the output of the receiving circuit can pass through a rectangular wave shaper and can be received and processed by the microprocessor control circuit afterwards; eight groups of frequencies and inner codes are written into a read only memory of the microprocessor control circuit in advance; thus, the pager which can be used in all channels can be obtained through selecting frequency codes by press buttons and matching local radio channels.

Description

The full range beep-pager

The utility model relates to a kind of full range beep-pager, belongs to the Wireless Telecom Equipment technical field.

The present single channel beep-pager that uses mainly is at the frequency of the employed specific channel of this area paging and custom-designed; In other words, as be set at the employed frequency in Taiwan, just can't use on Hong Kong and Singapore and other places.As desire to make local channel frequency can receive utilization for beep-pager, set at beeper in the past, except the length that needs the ground upper and lower slip of pushbutton switch of professional technique skill and take the time, also to key in frequency six bit digital and ISN seven bit digital, even eight class frequencys of full range machine will be keyed in 104 block count certificates at least, so for above-mentioned traditional pagers, use and set all very inconvenience, even repel it.

The purpose of this utility model provides and a kind ofly can change above-mentioned beep-pager and writing the defective that is suitable for frequency inconvenience, trouble, and the setting that changes its frequency into is not initial solid state, but selection mode, the full range beep-pager with easy-to-use characteristic.

The utility model is achieved in that and includes a radio-frequency (RF) receiving circuit and a microprocessor control circuit, radio-frequency (RF) receiving circuit includes: radio frequency amplifying circuit, first order radio frequency band filter, frequency synthesizer, first order coagulator, second level radio frequency band filter, first order intermediate-frequency circuit, second level frequency mixer, buffer, second level local oscillator, second level if bandpas filter, second level intermediate-frequency circuit, frequency discriminator, low pass filter and a waveform shaper; Microprocessor control circuit includes: read-only memory, decoder, driver and a DC-DC converter are gone in microprocessor, output; It is characterized in that: include voltage controller, phase comparator and the frequency dividing circuit that can be set at different divider ratios in the frequency synthesizer in radio-frequency (RF) receiving circuit, make this frequency synthesizer have different output frequencies, and with this local oscillated signal as radio-frequency (RF) receiving circuit; The square wave reshaper of the output setting of this radio-frequency (RF) receiving circuit is connected with the input decoder of microprocessor control circuit, be provided with the output that writes eight class frequencys and ISN in advance in this microprocessor control circuit and go into read-only memory, but the input of its keyboard circuit of nationality and make writing and selecting of its microprocessor working frequency numeral.Through the processing and the conversion of microprocessor, the divider ratio by frequency dividing circuit in direct current and the direct current transducer decision said frequencies synthesizer detects the radiofrequency signal that will receive to utilize its local oscillations ability that is possessed again.

Characteristics of the present utility model are that the output of the microprocessor control circuit in its receiving circuit goes into to have write eight class frequencys and ISN in the read-only memory in advance, the user of this beep-pager can select frequency codes by button, and the receiving circuit of this beep-pager can be connected and realization page communication and effective utilization with the employed frequency of this area wireless telecommunications.

Introduce the utility model below in conjunction with accompanying drawing.

Fig. 1 is the best circuit block diagram of implementing of the utility model.

Fig. 2 is setting process figure of the present utility model.

Fig. 3 is a microprocessor components circuit diagram among the utility model embodiment.

Fig. 4 is a decoder component circuit diagram among the utility model embodiment.

Fig. 5 is the utility model embodiment medium frequency synthesizer component circuitry figure.

Fig. 6 is the utility model embodiment DC-DC converter component circuitry figure.

Fig. 7 is that the utility model embodiment exports into read-only memory component circuitry figure.

Referring to Fig. 1, the utility model mainly includes a radio-frequency (RF) receiving circuit A and a microprocessor control circuit B, signal workflow of the present utility model is: radiofrequency signal receives the laggard radio frequency receiving circuit A of going into from antenna, at first enter radio frequency amplifying circuit 1, the signal after amplifying enters first order radio frequency band filter 2, enter the local frequency mixing mutually that first order frequency mixer 4 and frequency synthesizer 3 are sent here then, leach intermediate-freuqncy signal through second level radio frequency band filter 5 again, send first order intermediate frequency amplifier circuit 6 to amplify.Afterwards, this signal send the second level frequency mixer 9 and the local frequency of second level local oscillator 8 to carry out the mixing second time, after being connected to 10 filtering of second level if bandpas filter again, entering second level intermediate frequency amplifier circuit 11 amplifies, behind frequency discriminator 12, low pass filter 13 and waveform shaper 14, become cardinar number font signal then, send microprocessor control circuit B to carry out information processing again.Said frequencies synthesizer 3 comprises VCO system device, phase comparator and frequency dividing circuit, its effect is by frequency dividing circuit is set the frequency of oscillation that different divide ratios locks voltage controlled oscillator, thereby can obtain corresponding different output frequencies, this output frequency is exactly local oscillations.Buffer 7 is sent the divide ratio that different data can change frequency dividing circuit, also promptly change first local frequency of frequency synthesizer 3 outputs, under the constant situation of first order intermediate frequency, just changed the frequency of receivable radiofrequency signal, realized receiving the switching of frequency.By frequency dividing circuit being set the selection of different divider ratios, make its output frequency, just can detect the radio-frequency carrier signal of binary code at first order frequency mixer 4, the operation via detection frequency reducing such as band pass filter, intermediate frequency amplifier circuit and second level frequency mixer and square wave reshaper 14 produces the signal that microprocessor control circuit B can receive processing again.

In this microprocessor control circuit B, include a microprocessor 15, export read-only memory 16,

decoder

17,19, driver 24 and a DC-DC converter 26, decoder 17 wherein is a readable and writable memory (EEPROM), main receive the digital signal sent here by radio-frequency (RF) receiving circuit A and the signal that low-voltage alarm device 27 and power-saving control device 28 are reacted is decoded, and go into data that read-only memory 16 reads with output and supply with microprocessor 15 and handle accordingly and judge and control; Moreover this is exported into read-only memory 16 and has write eight class frequencys and code in advance by key circuit 18, can make writing and selecting of microprocessor 15 working frequency numerals; In other words, the numeral of selected input is through microprocessor 15 treatment conversion, or send output to go into read-only memory 16 storages, or after reading, this read-only memory 16 send data buffer 7, and then the divide ratio of frequency dividing circuit in the control frequency synthesizer 3, so that utilize its local oscillations ability that has to detect the radiofrequency signal that is received.

In above-mentioned each element circuit, wherein electricity-saving controller 28, moves by the batch (-type) Push And Release and realizes the effect of economizing on electricity to control the switch motion that high frequency receives via decoder 17 output signals.Low-voltage alarm device 27 is used to monitor the supply voltage of receiving circuit, if when the voltage of its monitoring is lower than 1.1 volts, promptly sends an alarm signal to decoder 17.Power supply 25 is provided by 1.5 volts of dry cells, transfers to 3.0V through voltage, uses for radio-frequency (RF) receiving circuit B, microprocessor 15, motor 22, display screen 2O, buzzer 23 and bulb 21.

Consult Fig. 2, at first this machine is at when start setting-up time initial value 30, and after start 31, just is in standby 32 states, and control system enters selection mode, as with sound equipment 33, and motor oscillating 41 or make a noise and kind set 48; Import password 35 as only carrying at power supply earlier under the state, do follow-up control 36 again; As function setting 37, frequency setting 38, digital setting 39 and password setting 40 etc.; Otherwise, under the state of supply power, can do manually above-mentioned or shut down 42 automatically, switching on and shutting down time adjustment 43, alarm time set 44, and the incoming call source of sound selects 45, and channel selection 46 and setting quarter-bell begin and the concluding time 47, adjustment control 49 through suitable is in holding state again.Plant in the structure at above-mentioned electricity, before dispatching from the factory, just be recorded in the memory default eight class frequencys and ISN, therefore the user is adjusting above-mentioned channel selection, and does suitably to adjust, and just can become the beep-pager that all-channel uses to cooperate the channel when regional wireless telecommunications.

Fig. 3～Fig. 7 is each component circuitry figure among the utility model embodiment.Wherein the CPU model among Fig. 3 can be HD4818, and the decoder model is MA93C08 among Fig. 4, and the frequency synthesizer model of Fig. 5 is SM5360, and the model of exporting read-only memory among Fig. 7 is S2913.

Claims

1, a kind of full range beep-pager, include a radio-frequency (RF) receiving circuit and a microprocessor control circuit, radio-frequency (RF) receiving circuit includes: radio frequency amplifying circuit, first order radio frequency band filter, frequency synthesizer, first order coagulator, second level radio frequency band filter, first order intermediate-frequency circuit, second level frequency mixer, buffer, second level local oscillator, second level if bandpas filter, second level intermediate-frequency circuit, frequency discriminator, low pass filter and a waveform shaper; Microprocessor control circuit includes: read-only memory, decoder, driver and a DC-DC converter are gone in little electric treatment device, output; It is characterized in that: include voltage controller, phase comparator and the frequency dividing circuit that can be set at different divider ratios in the frequency synthesizer in radio-frequency (RF) receiving circuit, make this frequency synthesizer have different output frequencies, and with this local oscillated signal as radio-frequency (RF) receiving circuit; The square wave reshaper of the output setting of this radio-frequency (RF) receiving circuit is connected with the input decoder of microprocessor control circuit, be provided with the output that writes eight class frequencys and ISN in advance in this microprocessor control circuit and go into read-only memory, but the input of its keyboard circuit of nationality and make writing and selecting of its microprocessor working frequency numeral.