CN2222936Y - Automatic setting device for quartz clock - Google Patents

Automatic setting device for quartz clock Download PDF

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Publication number
CN2222936Y
CN2222936Y CN 94243675 CN94243675U CN2222936Y CN 2222936 Y CN2222936 Y CN 2222936Y CN 94243675 CN94243675 CN 94243675 CN 94243675 U CN94243675 U CN 94243675U CN 2222936 Y CN2222936 Y CN 2222936Y
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circuit
electronic switch
group
calibration
sound
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CN 94243675
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Chinese (zh)
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黄旭晶
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Individual
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Abstract

The utility model provides an automatic setting device for quartz clocks, whose core is a setting circuit composed of an electronic switch and a setting capacitor. The setting circuit is controlled by a trigger of two path time signals, one path is that the timing signals of a broadcasting station are recognized strictly and used as a standard time signal trigger electronic switch to be switched on to make the clock slow down, and the other path is that the clock taking signal trigger electronic switch provided by a time counting circuit is switched off to make the clock quick and make the automatic setting realized. The utility model has the advantages of high reliability and less power consumption, and can be suitable for various quartz clocks, timers and other timing devices.

Description

The crystal clock self-checking device
The utility model relates to the self-checking device of a kind of self-checking device of electric time-keeping clock and watch, particularly quartz clock, belongs to electronic technology field.
At present the clock and watch that use are because the accumulation of deviation when walking, and the standard time that all will contrast the radio station broadcast carries out manually the school being alloted.Though the disclosed CN2143791Y of patent documentation can realize automatic correcting time to its clock, only only limits to the part digital clock.
The purpose of this utility model is to provide a kind of applicable to the various crystal clocks clock and watch self-checking device of [comprising digital, pointer-type].
The purpose of this utility model realizes by following technical scheme, receive the time signals in broadcasting station by radio receiver circuit after, amplify through frequency-selecting earlier, by after the frequency identification again by diode D 2, D 3Carry out envelope detection, capacitor C 3, C 4Filtering is after Schmidt trigger is shaped to the 0.5Hz square wave, and promptly width, interval respectively are 1 second time signals, again the time signals of this 0.5Hz are sent into by IC 1, IC 2The identification circuit that counter and AND circuit are formed to the first five width that rings of time signals, at interval, several three aspects of sound further discern, also will send the sequential identification circuit of being made up of AND circuit and electronic switch that the sequential of the first five sound and the 6th sound is discerned after this three aspect meets, sequential meets back the 6th sound could enter calibration circuit as the standard time signal.
Calibration circuit is by calibration capacitance C 8, C 9, two-way simulation electronic switch [hereinafter to be referred as electronic switch] and oscillatory circuit are formed.Calibration capacitance C wherein 8With the electronic switch series connection, when electronic switch is opened, equal calibration capacitance C 8Connect circuit, make the oscillation frequency step-down, clock is slack-off, when electronic switch turn-offs, equals calibration capacitance C 8Disconnect with circuit, oscillation frequency is uprised, clock accelerates.Calibration circuit triggers control by the two-way time signal, the one tunnel be time signals the 6th sound as the standard time signal, can make clock slack-off, another road is this clock signal sample time that is provided by time counting circuit, and clock is accelerated.Oscillatory circuit can utilize the oscillatory circuit in the former clock circuit, also can adopt the oscillatory circuit of band frequency division.As CD4060B.
Time counting circuit is by counter IC 3, IC 4, IC 5And gate circuit forms, and time counting circuit has three tasks: one, to calibration circuit provide this blunt sample time signal, two, provide the 64Hz square wave as reference frequency, three, start feed circuit on time and give the broadcast receiving circuit power supply source to identification circuit.
The utility model is because the oscillation frequency of clock and watch is adjusted in employing, applicable to the various clock and watch, timer and other timing tools that with the electronic oscillation are fundamental frequency; Because to the frequency of time signals, width, at interval, sound number and five aspects of sequential discern, so non-time signals can not enter the calibration circuit.
Further describe below in conjunction with the embodiment of accompanying drawing the technical program:
Fig. 1 is the block diagram of the technical program.
Fig. 2 is the embodiment circuit theory diagrams.
With reference to Fig. 2, broadcast receiving circuit is received time signals, and the first five rings through the frequency-selecting amplification, by diode D 3Carry out envelope detection, capacitor C 4Filtering is output 0.5Hz square wave after Schmidt trigger (4) shaping again, and its positive half cycle is the sound width, and negative half period is the interval between sound and the sound, and the sound width respectively is 1 second with the interval.This 0.5Hz time signals is sent into the time signals identification circuit to be discerned its width, interval and several three aspects of sound.The time signals identification circuit is by the two tetrad counter IC of two CD4520B 1, IC 2Reach gate circuit (5), (6), (7), (8) composition, IC 1The A group is as the identification of sound width, and the B group is as sound identification at interval, IC 2The A group is discerned IC with the counting of uttering a word several 2B group is as frequency dividing circuit, to from time counting circuit IC 5Q 9The 64Hz square wave of sending here carries out 7 frequency divisions, three with the door (8) 3 input ends respectively with IC 2The Q of B group 1B, Q 2B, Q 3B joins, output terminal and IC 2R.B join and form 7 frequency divisions, IC 1Counting input end CL.A and EN.B be connected to frequency division output terminal IC jointly 2Q 3B is whenever IC 2The B batch total counts at 7 o'clock, its output terminal Q 1B, Q 2B, Q 3B just is, and three give IC with door (8) 2The R.B end of B group is imported the signal that resets, from IC 2The Q of B group 3B gives IC 1Counting input end CL.A, the EN.B of A group and B group provide Hz[is following press the 9Hz argumentation] square wave is as reference time.IC 1The CL.B of the EN.A of A group and B group is connected to time signals jointly, and the first five rings the output terminal of shaping circuit (4), makes IC 1The counting that A, B are two groups given the correct time sound and control at interval.Two with the door (6) two input ends respectively with IC 1Q 4A and Q 4B joins, and output terminal is with IC 2The CL.A of A group joins, whenever IC 1Q 4A, Q 4B is timing, and two just become with the output terminal of door (6), make IC 2A group adds 1 counting, two with two input ends of door (5) respectively with IC 1The Q of B group 3B, Q 4B joins, and output terminal is with IC 2The reset terminal R.A of A group joins, whenever IC 1B count down at 12 o'clock, its Q 3B, Q 4B just is, and triggers IC through two with door (5) 2A resets, so IC 2The Q of A group 3A, Q 1A is always negative, two with two input ends of door (9) respectively with IC 2The Q of A group 3A, Q 1A joins,, the control end of output terminal and electronic switch (10) joins, two I/O end of electronic switch (10) respectively with the output terminal of the 6th sound shaping circuit (3) and the input end D of calibration circuit 4Join and form the sequential identification circuit.At ordinary times because IC 2The Q of A group 3A is always negative, thereby two is also always negative with the output terminal of door (9), so electronic switch (10) always cuts out, the interference signal can not enter calibration circuit from electronic switch (10).When time signals first sound comes then, the output terminal of shaping circuit (4) is just becoming, capacitor C 5To IC 1R.A, R.B output positive pulse, A, B all reset for two groups, simultaneously EN.A and CL.B just are, A batch total number is discerned width, Q when counting down to 8 4A is just becoming, and count down to 8 or 9: first sound width and finishes, and it is negative that shaping circuit (4) output terminal becomes, and it is negative that EN.A and CL.B all become, and the A group stops counting, Q 4A is just keeping, and the B group begins counting, when counting down to B, and Q 4B is just becoming, and AND circuit this moment (6) is to IC 2CL.A output just, IC 2The A group adds 1 counting, promptly counts first sound, works as IC 1B count down to 8 or at 9 o'clock, and second sound is come, and the output terminal of shaping circuit (4) is just becoming, and A, B all reset for two groups, and the A group begins counting again, carries out the identification to second sound.A batch total number during sound is discerned width in a word; At interim B batch total number, to discerning at interval, so circulating down has reported up to the first five sound.If width less than 8/9 second, A batch total number just stops Q less than 8 4A is still negative, and AND circuit (6) just can not exported IC 2A can not count, and this is a lower limit; If width surpasses 12/9 second, the A group will count down to 12, at this moment Q 4A, Q 3A just is, and AND circuit (7) is just being exported, and A, B all reset IC for two groups 2A can not count yet, and this is the upper limit, and Here it is to the identification of width.If less than is 8/9 second at interval, IC 1B batch total number is less than 8, its Q 4B is just constant, and the output terminal of AND circuit (6) can not just become IC 2The A group is not counted, and this is a lower limit; If surpass 12/9 second, IC at interval 2Though A counts, work as IC 1The B batch total counts at 12 o'clock, its Q 4B, Q 3B just is, and AND circuit (5) is given IC 2The R.A of A group is just exporting, IC 2The A group resets, and original error count is eliminated, and this is the upper limit.The equal permissible error of bound 3/9 second and 1/9 second is discerned at width, interval.After 5 time signalses are by width and identification at interval.IC 2The A group will count down to 5, its Q 1A, Q 3A all just to sequential identification circuit output, this is the identification of number of giving the correct time.The sequential identification circuit is formed with door (9), electronic switch (10) by two, to the identification of the first five sound with the 6th sound sequential.After the 5th sound is come, as interval identification circuit IC 1The B batch total counts at 8 o'clock, two with the door (6) output just, IC 2Several the 5th sound of A batch total, its Q 1A, Q 3A just all exporting, two and door (9) output just, electronic switch (10) is open-minded, is that the 6th sound standard time signal enters calibration circuit and opens passage, works as IC 1The B batch total counts to 8 or at 9 o'clock, and the 6th sound is come, and to positive pulse of calibration circuit output, this positive pulse is exactly the 6th sound standard time signal to shaping circuit (3) by electronic switch (10).Work as IC 1The B batch total counts at 12 o'clock, its Q 3B, Q 4B just is, and makes IC 2The A group resets its Q 1A, Q 3It is negative that A all becomes, and two is negative with door (9) output, and electronic switch (10) turn-offs.Electronic switch (10) is from IC 1The B batch total is counted at 8 o'clock and is opened to counting down to 12 and just closed, and only opens 4/9 second, in this period less than half second, just the 6th sound border punctual between signal in this arrives, come morning person, arrive all non-the 6th sound standard time signal of slow person, can not pass through electronic switch (10), this is sequential identification.
Calibration circuit is by calibration capacitance C 8, C 9, electronic switch (11), (12) resistance R 7, R 8And IC 5Oscillatory circuit form.Calibration capacitance C wherein 8Follow calibration capacitance C again with electronic switch (12) series connection 9Parallel connection is connected in parallel with quartz vibrator then, and this is the higher connection of quartz vibrator frequency.If the quartz vibrator frequency is on the low side, then can adopt tandem-type connection.Because calibration capacitance C 8With electronic switch (12) series connection, when electronic switch (12) when opening, calibration capacitance C 9Join with circuit by electronic switch (12), make the oscillation frequency step-down, clock is slack-off; When electronic switch turn-offs, calibration capacitance C 8Disconnect with circuit, make frequency gets higher, clock accelerates.Calibration capacitance C 9Be with within fast 0.1 second to 0.5 second of the clock adjustment Summer Solstice or the Winter Solstice, just by calibration capacitance C 8In this scope, calibrate automatically.Two I/O ends of electronic switch (11) join just respectively with the control end and the power supply of electronic switch (12) respectively, calibration circuit has positive and negative two input ends, and positive input terminal is by the diode D between I/O end that is serially connected with electronic switch (10) and electronic switch (11) control end 4And capacitor C 6Form, negative input end is by control end that is serially connected with electronic switch (11) and time counting circuit IC 3Q 5Or IC 4Q 13Between diode D 5And capacitor C 7Form, calibration circuit triggers control by the two-way time signal, the one tunnel be time signals the 6th sound as the standard time signal through diode D 4Capacitor C 6Input, another route time counting circuit IC 3This clock signal sample time that provides is through diode D 5Capacitor C 7Input.
The calibration circuit course of work is as follows: if clock is fast 0.5 second, and time counting circuit IC 3Before coming, the 6th sound standard time signal resetted in 0.5 second.Its Q 5Become negative, through diode D 5, capacitor C 7To negative pulse of control end input of electronic switch (11), this negative pulse is this clock signal sample time, and electronic switch (11) turn-offs, because resistance R 7, R 8Effect, it is negative that the control end of electronic switch (11) keeps, but this state only can keep 0.5 second, after 0.5 second, the 6th sound standard time signal positive pulse is through diode D 4Capacitor C 6The control end of input electronic switch (11), electronic switch (11) is open-minded, because resistance R 7Feedback, make its maintenance open-minded, simultaneously electronic switch (12) is also open-minded, calibration capacitance C 8Join with circuit by electronic switch (12), make the oscillation frequency step-down, clock is slack-off, realizes calibration automatically.If slow 0.5 second of clock, the 6th sound standard time signal arrives first 0.5 second than this clock signal sample time, and its positive pulse is through diode D 4, capacitor C 6It is open-minded to trigger electronic switch (11), and electronic switch (12) is also open-minded.But only can keep 0.5 second, after 0.5 second, time counting circuit IC 3Reset its Q 5Become negative, this clock signal sample time negative pulse is through diode D 5Capacitor C 7Trigger electronic switch (11) and turn-off, and can keep, electronic switch (12) also turn-offs, calibration capacitance C 8Disconnect with circuit, oscillation frequency is uprised, clock accelerates, and realizes calibration automatically.
It is slack-off that the standard time signal can make clock in a word, and this clock signal sample time can make clock accelerate.Always the late comer is effective for this two-way trigger signals, because the late comer will change the state of electronic switch (11), (12).And can keep the possibility that just changed in 24 hours.
Time counting circuit is by IC 3CD4024B, IC 4CD4020B and IC 5CD4060B counting circuit and AND circuit (13), (14), (15), (16), (17), (18) are formed.At the window of opportunity that receives local station, treat that six sound timing clicks reset key K 1, K 2Make IC 3, IC 4All reset.IC 5Q 14Output 2Hz square wave is given IC 4Counting is worked as IC 4Count down to 7200 promptly 1 hour the time, its Q 6, Q 11, Q 12, Q 13Just be, it is resetted, whenever reset once Q 13The lower edge trigger IC 3Count once, when counting down to 23, IC 3Q 5, Q 3, Q 2, Q 1Just be, after 59 minutes and 44 seconds, IC 4Q 11, Q 12, Q 13Just be, is all just exporting AND circuit (15), (14), (17) at this moment, and AND circuit (13) is just being exported to Schmidt trigger (2), and Schmidt trigger (1) provides positive supply to broadcast receiving circuit, and receiving circuit gets electric work.After 16 seconds, counting circuit count down to 24 hours and puts in order IC 4, IC 3All reset, at this moment IC 3Q 5Carry a negative pulse as this clock signal sample time to calibration circuit.Owing to postpone capacitor C 1With diode D 1Effect, make feed circuit prolong power supply and just stop power supply after 5 to 10 seconds.If K switch 3, K 4Dial end, per hour can realize calibration automatically once, because IC to B 4When whenever counting down to 59 minutes and 44 seconds, three with the door (17) output terminal through K switch 3Just start feed circuit to Schmidt trigger (2) output and powering to receiving circuit, when whenever counting down to integral point, IC 4Reset its Q 13Through K switch 4Carry a negative pulse as this clock signal sample time to calibration circuit.
The cancellation of the quartz vibrator of clock circuit, by this device through capacitor C 10Send the sine wave of 32768Hz to make counting synchronously.

Claims (2)

1, crystal clock self-checking device, this device is provided with a radio receiver circuit, the first five sound of radio station time signals and the 6th sound that are received by radio receiver circuit amplify through frequency-selecting respectively, get the time signals of 0.5HZ square wave after diode envelope detection, the Schmidt trigger shaping, it is characterized in that: time signals identification circuit IC 1The CL.B of the EN.A of A group and B group is connected to the output terminal of the first five shaping circuit (4) that rings, IC jointly 1The EN.B of the CL.A of A group and B group is connected to frequency dividing circuit IC jointly 2The Q of B group 3B makes IC 1Two groups of AB count each respectively in the positive-negative half-cycle of time signals 0.5HZ, to the width of time signals with discern respectively at interval, two with two input ends of door (6) respectively with IC 1Q 4A, Q 4B joins, and its output terminal is with giving the correct time counting number IC circuit 2The counting input end CL.A of A group joins IC 2The Q of A group 3A, Q 1A joins with two input ends of sequential identification circuit two with door (9) respectively, two join with two output terminals of door (9) control end with electronic switch (10), and two I/O ends of electronic switch (10) are followed the output terminal of the 6th sound shaping circuit (3) and the positive input terminal D of calibration circuit respectively 4Join the negative input end D of calibration circuit 5With time counting circuit IC 3Q 5Or IC 4Q 13Join; Calibration capacitance C in the calibration circuit 8After being connected in series with the I/O of two-way simulation electronic switch (12) end again with calibration capacitance C 9Be connected in parallel, in parallel or be connected in series with the quartz vibrator in the oscillatory circuit then.
2, device according to claim 1 is characterized in that electronic switch in the calibration circuit (12) and calibration capacitance C 8, C 9Connected mode with quartz vibrator is: the employing parallel connection method that the quartz vibrator frequency is higher, employing tandem-type connection on the low side.
CN 94243675 1994-10-14 1994-10-14 Automatic setting device for quartz clock Expired - Fee Related CN2222936Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 94243675 CN2222936Y (en) 1994-10-14 1994-10-14 Automatic setting device for quartz clock

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Application Number Priority Date Filing Date Title
CN 94243675 CN2222936Y (en) 1994-10-14 1994-10-14 Automatic setting device for quartz clock

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CN2222936Y true CN2222936Y (en) 1996-03-20

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Application Number Title Priority Date Filing Date
CN 94243675 Expired - Fee Related CN2222936Y (en) 1994-10-14 1994-10-14 Automatic setting device for quartz clock

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CN (1) CN2222936Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104656432A (en) * 2014-03-06 2015-05-27 叶健利 Time display device for broadcast data system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104656432A (en) * 2014-03-06 2015-05-27 叶健利 Time display device for broadcast data system
CN104656432B (en) * 2014-03-06 2017-06-16 叶健利 Time display device for broadcast data system

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C19 Lapse of patent right due to non-payment of the annual fee
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