CN221378252U - Ultrasonic signal processing circuit, ultrasonic transducer chip and automobile radar device - Google Patents

Abstract

The embodiment of the application provides an ultrasonic signal processing circuit, an ultrasonic transducer chip and an automobile radar device, wherein the circuit is used for being electrically connected with an ultrasonic transducer and comprises a signal input end, a sampling module, a signal processing module, a switch module, a triggering module, a signal output end and a driving module; the driving module is electrically connected with the signal output end and used for outputting driving signals outwards, the signal input end is electrically connected with the signal output end and the ultrasonic transducer so as to receive input signals, and the input signals comprise the driving signals and signals input by the ultrasonic transducer; the switch module is respectively and electrically connected with the signal input end, the sampling module and the triggering module, and the triggering module is used for conducting the switch module between the oscillation stage and the receiving stage; the sampling module is also electrically connected with the signal processing module, the switch module is conducted, the sampling module samples an input signal and inputs the sampled signal to the signal processing module, so that the power consumption can be obviously reduced, and the processing speed is improved.

Description

Ultrasonic signal processing circuit, ultrasonic transducer chip and automobile radar device

The present application claims priority from the chinese patent office, application number 202310672879.3, application name "a low power ultrasonic transducer signal processing chip" filed on day 2023, month 06, 07, the entire contents of which are incorporated herein by reference.

[ Field of technology ]

The application relates to the technical field of electronics, in particular to an ultrasonic signal processing circuit, an ultrasonic transducer chip and an automobile radar device.

[ Background Art ]

Ultrasonic ranging, as a typical non-contact measurement method, is widely used in many fields such as vehicle obstacle detection, industrial automation control, construction engineering measurement, and the like. Taking vehicle obstacle detection as an example, after transmitting an ultrasonic signal having a frequency of 20KHz or more (which is a non-audible range), an ultrasonic echo signal reflected from an external obstacle may be sensed by an ultrasonic transducer and analyzed, and thus a distance between the ultrasonic transducer and the obstacle, that is, a detection distance, may be determined. Based on the detected distance, a corresponding prompt message (for example, warning sound is output through a buzzer or obstacle distance is displayed through a display screen) can be provided for the user to assist the user in driving safely.

In order to save cost, the existing reversing radar chip takes an integrated structure of an emission ultrasonic transducer and a receiving ultrasonic transducer. However, in this way, the ultrasonic transducer receives not only the driving signal but also the aftershock signal after the driving signal, and then the reflected echo signal is only possible to receive. In the conventional signal processing method, an ADC samples a signal of an ultrasonic transducer at a high frequency, and then inputs the sampled signal to a subsequent signal processing circuit. However, the amplitude of the driving signal and the aftershock signal are large, the driving signal does not receive the echo after the ultrasonic wave is not emitted, and the aftershock signal is strong in the oscillation stage, so that the data effect in the two time periods is not large. The existing mode does unified sampling processing for signals at any stage, so that the processed data are more, and the power consumption is not reduced.

[ utility model ]

In view of the above, the embodiments of the present application provide an ultrasonic signal processing circuit, an ultrasonic transducer chip and an automotive radar device, which can effectively reduce data processing amount and power consumption.

In a first aspect, an embodiment of the present application provides an ultrasonic signal processing circuit, where the circuit is configured to be electrically connected to an ultrasonic transducer, and the circuit includes a signal input end, a sampling module, a signal processing module, a switch module, a trigger module, a signal output end, and a driving module; the driving module is electrically connected with the signal output end and used for outputting a driving signal outwards, the signal input end is electrically connected with the signal output end and the ultrasonic transducer so as to receive an input signal, and the input signal comprises the driving signal and the signal input by the ultrasonic transducer; the switch module is respectively and electrically connected with the signal input end and the sampling module, and is also electrically connected with the trigger module, and the trigger module is used for conducting the switch module between an oscillation stage and a receiving stage; the sampling module is also electrically connected with the signal processing module, the switch module is conducted, and the sampling module samples the input signal and inputs the sampled signal to the signal processing module.

In a second aspect, an embodiment of the present application provides an ultrasonic transducer chip for electrically connecting to an ultrasonic transducer, where the chip includes the ultrasonic signal processing circuit of the first aspect.

In a third aspect, an embodiment of the present application provides an automotive radar apparatus, where the apparatus includes the chip of the second aspect, and an ultrasonic transducer.

In the technical scheme of the ultrasonic signal processing circuit, the ultrasonic transducer chip and the automobile radar device provided by the embodiment of the application, the circuit is used for being electrically connected with the ultrasonic transducer, and comprises a signal input end, a sampling module, a signal processing module, a switch module, a triggering module, a signal output end and a driving module; the driving module is electrically connected with the signal output end and used for outputting a driving signal outwards, the signal input end is electrically connected with the signal output end and the ultrasonic transducer so as to receive an input signal, and the input signal comprises the driving signal and the signal input by the ultrasonic transducer; the switch module is respectively and electrically connected with the signal input end and the sampling module, and is also electrically connected with the trigger module, and the trigger module is used for conducting the switch module between an oscillation stage and a receiving stage; the sampling module is further electrically connected with the signal processing module, the switch module is conducted, the sampling module samples the input signal and inputs the sampled signal to the signal processing module, so that the ultrasonic signal processing circuit does not sample the signal processing module in the initial stage of signal processing, and the switch module is disconnected, so that the power consumption of the circuit is reduced; in the middle and later stages of the signal, the switch module is conducted so that the sampling module samples, and the sampled signal is input into the signal processing module for judging the echo. The ultrasonic signal processing circuit can obviously reduce circuit power consumption, improve processing speed to a certain extent, reduce the use of a buffer and save circuit area. The circuit structure and the control logic are simple, and the circuit structure and the control logic can be realized through simple circuit connection and logic control.

[ Description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic view of an application scenario provided in an embodiment of the present application;

FIG. 2 is a schematic diagram of a signal processing without an obstacle in a blind zone according to the prior art;

FIG. 3 is a schematic diagram of signal processing for a blind zone with an obstacle in the prior art;

Fig. 4 is a schematic block diagram of an automotive radar apparatus according to an embodiment of the present application;

fig. 5 is a schematic block diagram of another automotive radar apparatus according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a structural block diagram of another automotive radar apparatus according to an embodiment of the present application;

fig. 7 is a schematic block diagram of an ultrasonic transducer chip according to an embodiment of the present application;

fig. 8 is a schematic block diagram of another ultrasonic transducer chip according to an embodiment of the present application;

Fig. 9 is a schematic block diagram of another ultrasonic transducer chip according to an embodiment of the present application;

fig. 10 is a schematic block diagram of another ultrasonic transducer chip according to an embodiment of the present application;

FIG. 11 is a schematic block diagram of another ultrasonic transducer chip according to an embodiment of the present application;

Fig. 12 is a schematic block diagram of another ultrasonic transducer chip according to an embodiment of the present application.

[ Detailed description ] of the invention

For a better understanding of the technical solution of the present application, the following detailed description of the embodiments of the present application refers to the accompanying drawings.

It should be understood that the described embodiments are merely some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

It should be understood that although the terms first, second, third, etc. may be used to describe numbers and the like in embodiments of the present application, these numbers should not be limited to these terms. These terms are only used to distinguish one number from another. For example, a first number may also be referred to as a second number, and similarly, a second number may also be referred to as a first number, without departing from the scope of embodiments of the present application.

Depending on the context, the word "if" as used herein may be interpreted as "at … …" or "at … …" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if determined" or "if detected (stated condition or event)" may be interpreted as "when determined" or "in response to determination" or "when detected (stated condition or event)" or "in response to detection (stated condition or event), depending on the context.

Referring to fig. 1, a schematic view of an application scenario is provided in an embodiment of the present application. In fig. 1, a vehicle 100 and an obstacle 200 are shown, wherein a plurality of ultrasonic transducers 101 are provided at the tail of the vehicle 100, and when a user (possibly in the case of automatic driving) controls the vehicle 100 to reverse (possibly in any scene of lateral parking and front obstacle recognition), the ultrasonic transducers 101 can transmit ultrasonic signals and receive ultrasonic echo signals (the ultrasonic transducers can be different from a sensor which transmits ultrasonic waves and can also transmit ultrasonic waves and simultaneously receive ultrasonic waves), and further the distance between the ultrasonic transducers 101 (i.e. the vehicle 100) and the obstacle 200 can be calculated, and corresponding prompt information (for example, warning sound is output through a buzzer or the obstacle distance is displayed through a display screen) can be provided for the user to assist the safe driving of the user.

It should be noted that fig. 1 is only one possible application scenario listed in the embodiment of the present application, and should not be taken as a limitation on the protection scope of the present application. For example, the ultrasonic ranging may be applied to an application scene such as industrial automation control and construction engineering measurement in addition to the detection of an obstacle by a vehicle, and in other application scenes, the obstacle may be referred to as a "detected object"; the ultrasonic transducer may be provided at a side portion or a front portion of the vehicle in addition to the rear portion of the vehicle to detect an obstacle at the side portion or the front portion of the vehicle; in addition to 4 ultrasonic transducers, a greater or lesser number of ultrasonic transducers or the like may be provided, and the embodiment of the present application is not particularly limited.

In actual operation, after driving signals, the ultrasonic transducer has aftershock, and for the scheme that the transmission and the reception are the same transducer, the ultrasonic transducer also transmits aftershock signals. When the aftershock signal is strong, the echo reflected by the obstacle is submerged in the aftershock signal, and the distance from which the echo cannot be detected is also called a blind area.

As shown in fig. 2. The horizontal axis is time or a representation after conversion to distance, and the vertical axis is the envelope signal strength value for the threshold comparison circuit. For the scheme that the transmission and the reception are the same transducer, the ultrasonic transducer receives a driving signal (i.e. corresponding to a driving stage), and also receives a residual shock signal (i.e. corresponding to an oscillating stage) after the driving is finished, and after the residual shock signal gradually decreases to a threshold value SW1 (i.e. corresponding to a receiving stage in a later stage), if an echo occurs, the echo is detected. In this scheme, for example, sout is the signal output of the ultrasonic transducer chip, and this output is transmitted to the upper processing circuit (e.g. ECU), and the upper processing circuit determines whether there is an obstacle and the obstacle distance according to Sout. In an example, sout is a first logic (e.g., logic 0) when the envelope signal strength of the envelope curve is greater than a threshold value, and is a second logic (e.g., logic 1) when the envelope signal strength is lower than the threshold value. In fig. 2, in the driving stage and the oscillating stage, since the envelope signal intensity is relatively large, sout is logic 0, when the envelope signal intensity gradually decreases to the first threshold value SW1, the output of Sout is logic 1, and when the envelope signal intensity is larger than the threshold value again, sout outputs logic 0, which indicates that the echo reflected by the obstacle appears.

As shown in fig. 3. When the envelope signal strength has not been reduced to SW1, it appears that echo 1 causes the envelope signal strength that should have been reduced to be not reduced and the strength is still above the threshold value, at which time Sout is still outputting a logic 0, indicating that it is still in the oscillation phase; when the envelope signal strength continues to drop to the second threshold SW2, sout outputs a logic 1; when the envelope signal strength is again above the threshold, sout2 outputs a logic 0, indicating that echo 2 is present. It can thus be seen that only echo 2 is detected, while echo 1, which occurs during the aftershock or oscillation phase, cannot be detected, resulting in a large blind zone.

As can be seen from fig. 2 and 3, no matter whether there is an obstacle in the oscillation phase, the whole signal in the driving phase and most of the signal in the oscillation phase have little significance, because no echo signal can be detected in this phase. In order to reduce power consumption, the application provides an ultrasonic signal processing circuit which is used for being electrically connected with an ultrasonic transducer, wherein the circuit comprises a signal input end, a sampling module, a signal processing module, a switch module, a trigger module, a signal output end and a driving module; the driving module is electrically connected with the signal output end and used for outputting driving signals outwards, the signal input end is electrically connected with the signal output end and the ultrasonic transducer so as to receive input signals, and the input signals comprise the driving signals and signals input by the ultrasonic transducer; the switch module is respectively and electrically connected with the signal input end and the sampling module, and is also electrically connected with the trigger module, and the trigger module is used for conducting the switch module between the oscillation stage and the receiving stage; the sampling module is also electrically connected with the signal processing module, the switch module is conducted, and the sampling module samples an input signal and inputs the sampled signal to the signal processing module.

When the triggering module does not reach the triggering time, the switch module is in an off state, so that the signal received by the signal input end cannot be sampled by the sampling module; when the triggering module reaches the triggering condition, the switch module is conducted, so that the signal received by the signal input end is sampled by the sampling module. When the trigger condition is not reached, the sampling module does not sample, so that the power consumption can be reduced, and if the sampling module does not sample, no sampling signal is input into the subsequent signal processing module, so that the circuit power consumption is further reduced. Meanwhile, the input signal is divided into two sections, one part is not sampled by the sampling module, the other part is sampled by the sampling module, and the part of data sampled by the sampling module is input into the signal processing module, so that the data processing capacity of the signal processing module is reduced, and the processing speed is higher. Under normal conditions, the sampling rate of the sampling module is larger than that of the signal processing module, when the signal processing module does not finish the earlier stage signal processing, the sampling signal is usually stored in a buffer, the first part of data is not required to be collected, so that the buffered data is also reduced, the signal processing module does not need to process the data in the earlier stage, and when the second part of data is input, the signal can be rapidly processed, so that the scheme can also reduce the use of storage units such as the buffer to a certain extent, reduce the circuit area and the cost, and improve the processing speed. The circuit structure of this scheme is simple, easy to realize. In addition, as shown in fig. 3, there may be an echo in the oscillation phase, where the echo cannot be detected to generate a larger blind area, and the switch module is turned on between the oscillation phase and the receiving phase, so that the data between the oscillation phase and the receiving phase can be acquired as completely as possible by adjusting the turn-on time of the turn-on module, which is beneficial to the judgment of the subsequent circuit on the obstacle in the section, thereby helping to reduce the blind area and improve the detection precision.

The embodiment of the application provides an ultrasonic transducer chip, which is electrically connected with an ultrasonic transducer and comprises an ultrasonic signal processing circuit. The automobile radar device structure schematic diagram shown in fig. 4-6 comprises an ultrasonic transducer chip 1, an ultrasonic transducer 2 and a microcontroller 3 (such as an ECU). The ultrasonic transducer chip 1 comprises an ultrasonic signal processing circuit 4, wherein the ultrasonic signal processing circuit 4 comprises a sampling module 11, a signal processing module 12, a switch module 13, a trigger module 14, a signal input end 101 and a signal output end 102; in a possible manner, as shown in fig. 5, the ultrasonic signal processing circuit 4 further includes a pre-module 15, where the pre-module 15 is configured to pre-process the input signal input by the signal input terminal 101, and includes an amplifier and/or a filter, for example, to perform filtering and amplifying operations on the input signal, and in fig. 4-6, the switch module 13 may be disposed between the sampling module 11 and the pre-module 15, or may be disposed between the pre-module 15 and the signal input terminal 101; without the front module 15, the switch module 13 is placed between the switch module 13 and the signal input 101. The switch module 13 is located between the sampling module 11 and the signal input 101, regardless of whether the front-end module 15 is present, and any other way is within the scope of the present application.

The ultrasonic signal processing circuit 4 further comprises a driving module 16, the driving module 16 is used for generating a driving signal, the driving module 16 is electrically connected with the signal output end 102, the signal output end 102 is electrically connected with the ultrasonic transducer and used for outputting the driving signal outwards, and the driving signal is transmitted to the ultrasonic transducer 2 through the signal output end 102 so that the ultrasonic transducer 2 generates ultrasonic waves. Here, the signal output terminal 102 is also electrically connected to the signal input terminal 101, and both transmission and reception are the same transducer, so that the signal input terminal 101 can receive signals such as a driving signal and a residual shock signal input by the ultrasonic transducer 2, and an echo signal received and converted by the ultrasonic transducer 2.

The trigger timing of the trigger module is between the oscillation phase and the reception phase, and the trigger module may determine whether the current timing is the trigger timing by setting a threshold value related to the amplitude of the input signal and/or a threshold value related to the time when the input signal is no longer oscillating. As shown in fig. 7 and 8, the trigger module is an amplitude detection module 14, where the amplitude detection module 14 is electrically connected to the signal input terminal 101 to detect amplitude information of an input signal, and the amplitude detection module 14 may compare, by setting a threshold, the amplitude of the input signal with the set threshold to determine whether the current opportunity is a trigger opportunity. When it is detected that the input signal amplitude drops to the threshold value, the amplitude detection module 14 triggers the switch module 13 to conduct, so that the sampling module 11 can sample. Fig. 8 shows an example, in which the amplitude detection module 14 is a comparator 14, and one end of the comparator 14 is connected to one end of the signal input terminal 101, and the other end is input with a threshold VTH (if the input signal is a current signal, the threshold is a current, and if the input signal is a voltage signal, the threshold is a voltage, or any other manner is also used, which is described herein by taking the voltage as an example). The comparator may compare the input signal amplitude with the set threshold VTH by setting the threshold VTH to determine whether the current opportunity is a trigger opportunity. When the amplitude of the input signal is less than or equal to the threshold VTH, the comparator 14 determines that the current timing is the trigger timing, and outputs information reflecting that the amplitude of the input signal is less than or equal to the threshold to the switch module 13 to turn on the switch module 13. In one possible embodiment in fig. 9, the triggering module includes a comparator 141 and a first timing module 142, where the comparator 141 is electrically connected to the first timing module 142, the first timing module 142 is electrically connected to the switch module 13, the comparator can compare the amplitude of the input signal with the set threshold VTH by setting the threshold VTH, the comparator 141 outputs the comparison result of the input signal with the threshold VTH, the first timing module 142 is used to detect the time when the output result of the comparator 141 is no longer oscillating, when the time when the output result is no longer oscillating meets the preset time, the first timing module 142 completes timing, and determines that the current opportunity is the triggering opportunity, The trigger switch module 13 is turned on, and the sampling module 11 performs sampling. The comparator 141 outputs a first logic level (e.g., logic 1) when the threshold is less than the input signal, and the comparator 141 outputs a second logic level (e.g., logic 0) when the threshold is greater than the input signal; the first timing module 142 detects the duration of the second logic level, where the duration satisfies the preset time to trigger the clock module to change the output frequency, for example, the first timing module 142 starts timing when receiving the second logic level, and if the duration of the second logic level is greater than a plurality of clock cycles, the output result of the comparator 141 is considered to be no longer oscillating, and the overall amplitude of the input signal has fallen to a specified value, so that sampling is required at this time, and some important data is prevented from being lost. In general, the input signal is a sine wave or a sine-like wave or a signal composition including high and low levels, such as a sine wave, and after a threshold value VTH is set, the input signal is compared with the threshold value VTH, the comparator 141 generates high and low level oscillations, and only after the input signal is entirely lower than VTH, the comparator 141 will not generate high and low level oscillations, which represents that the input signal is lower than a specified value.

The trigger module 14 uses the amplitude detection module 14, the voltage amplitude of the amplitude detection module 14 is higher than the threshold comparison circuit, or the amplitude detection module 14 ends the oscillation earlier than the threshold comparison circuit (i.e. the amplitude detection module stops oscillating before SW 1), and when the amplitude detection module stops oscillating, the ADC 11 is triggered to start sampling, so that it can be ensured that the signal received by the ADC 11 is not too late, and preparation is made for the oscillation phase or early echo to be identified. The circuit has simple structure, is not limited by the length of the driving signal, and has simple and convenient design logic. The threshold VTH may be set in a configurable manner, and the threshold size is adjusted according to the driving signal length, the transducer characteristics, the driving frequency, and the like, so as to satisfy multiple application scenarios. The preset time can also be set in a configurable way, and the preset time can be obtained through experiments in advance and fixed or adjusted according to the length of the driving signal, the characteristics of the transducer, the driving frequency and the like so as to meet the requirement of multiple application scenes. The first timing module is added to accurately judge whether the amplitude is reduced to a specified value or not, so that false triggering or premature triggering is prevented.

In one possible manner, as shown in fig. 10 and 11, the triggering module is a second timing module 14, the second timing module 14 (may be timing or may be timing manner), the triggering time of the triggering module is between the oscillation phase and the receiving phase, and the second timing module 14 may compare the timing time of the second timing module 14 with the designated time by setting the designated time (or directly set a time, and finish timing as long as reaching the time) to determine whether the current time is the triggering time. When the timing time of the second timing module 14 reaches the designated time, the trigger switch module 13 is turned on, the current opportunity is determined to be the trigger opportunity, and the sampling module 11 starts sampling. The trigger timing is usually set at least n periods before the maximum value of the envelope curve begins to drop, and the trigger module triggers the switch module to conduct, so that the ADC begins to sample, where n is the pulse number of the driving signal. In an example of fig. 10, the second timing module 14 is electrically connected to the driving module 16, when the driving module 16 starts to generate the driving signal, or when the driving module 16 finishes generating the driving signal, the second timing module 14 is triggered to start timing, when the second timing module 14 finishes timing, it is determined that the current time is the triggering time, the trigger switch module 13 is turned on, and the sampling module 11 starts to sample. In another possible manner, as shown in fig. 11, the ultrasonic signal processing circuit 4 further includes a main control module 17, after the main control module 17 receives a signal sent by the microcontroller 3, the main control module 17 controls the driving module 16 to generate a driving signal, the main control module 17 is electrically connected with the second timing module 14, the main control module 17 controls the driving module 16 to generate the driving signal and triggers the second timing module 14 to start timing at the same time or basically the same time, or the main control module 17 controls the driving module 16 to generate the driving signal and triggers the second timing module 14 to start timing, when the second timing module 14 finishes timing, it is determined that the current time is the triggering time, the trigger switch module 13 is turned on, and the sampling module 11 starts sampling. The conduction time of the switch module 13 is controlled in a timing mode, so that the application mode is flexible and the use scene is wide. The timing time of the second timing module 14 is set in a configurable manner, and the timing duration is adjusted according to the length of the driving signal, the characteristics of the transducer, the driving frequency and the like, so as to achieve the purpose that the trigger time is at least n periods before the maximum value of the envelope curve begins to drop between the oscillation stage and the receiving stage, and can also meet the requirement of multiple application scenes.

In one example, the ultrasonic signal processing circuit 4 further includes a threshold comparator electrically connected to the signal processing module 12, the threshold comparator being configured to receive the signal output by the signal processing module 12; comparing the signal output by the signal processing module 12 with the acquired signal threshold; the result of the comparison of the signal output by the signal processing module 12 and the signal threshold is output to the microcontroller 3 (e.g., ECU). As shown in fig. 12, the threshold comparator includes an output comparator 181, one end of the output comparator 181 is connected to the signal processing module 12, and the other end of the output comparator 181 inputs a signal threshold a (if the input signal is a current signal, the threshold is a current; if the input signal is a voltage signal, the threshold is a voltage); the output comparator 181 compares the signal output from the signal processing module 12 with a signal threshold value, and outputs a comparison result signal Sout to the ECU through the IO port. The obtained signal threshold value a may be a fixed value or may be set in a configurable manner, and the signal threshold value a may be adjusted according to the length of the driving signal, the characteristics of the transducer, the driving frequency, and the like, so as to satisfy multiple application scenarios.

In addition, the signal processing cycle includes a driving phase, an oscillating phase and a receiving phase, and after each cycle is finished, the signal processing cycle of the next round is performed again. Control circuits such as a first timing module and a second timing module can be used, the timing time of the first timing module and the second timing module is related to the signal processing period, and when the timing time reaches one period, the control switch module is turned off to wait for receiving the trigger of the next period. The control circuit may also be electrically connected to the trigger module to disconnect the switch module by the trigger module.

In one example, the signal Processing module 12 is a DSP (DIGITAL SIGNAL Processing) circuit, filters the sampled signal input by the sampling module 11 to form an envelope, or obtains a correlation value by adopting other manners such as fourier transform, and the envelope, the correlation value, and the like are input to a threshold comparison circuit for determining whether an echo exists. The signal processing module 12 outputs the processed result Sout to the microcontroller 3 (e.g. ECU) through the IO port.

As shown in fig. 2, the time point at which the oscillation phase ends is the time point at which the comparison threshold value SW1 is reached, and the on time of the switching module is earlier than this time point, and illustratively, before the oscillation phase starts to be conducted by the switching module, the envelope amplitude starts to be smaller than the amplitude maximum value (i.e. the maximum value of the intensity in fig. 2 and 3), for example, before at least n periods before the envelope curve maximum value starts to decrease, the triggering module triggers the switching module to be conducted, and thus the ADC starts to sample, where n is the pulse number of the driving signal, so that the subsequent useful signal is maximally obtained, and if an echo occurs in the oscillation phase, the echo can be detected by other means, and therefore, the time point at which the switch is conducted cannot be too late, and at the latest within several time periods after the envelope amplitude starts to be smaller than the amplitude maximum value. The amplitude detection module is used for setting the threshold value to meet the above conditions, and the timing time is set to meet the above conditions in a timing time triggering mode.

The first timing module or the second timing module and the like can use the existing conventional technology how to time or time, the timing or timing function is generated through a hardware circuit, the triggering and control relation among the modules can also be completed through the hardware circuit, for example, when a high level is received, a certain module is triggered to do a certain action, when a low level is received, a certain module is triggered to do another action and the like, and the control relation among the modules can be completed through the hardware circuit.

Although the input ends are electrically connected to the sampling module or the front module in the drawings, a part of the input ends may be electrically connected to the sampling module or the front module, so long as the signals of the ultrasonic transducer can be reflected, for example, one of the input terminals is grounded, so that only one input end is required for transmitting the signals. Of course, there may be more inputs for transmitting signals, and there are no limitations here, depending on the specific circuitry, type of ultrasonic transducer, etc.

In addition, the signal processing period comprises a driving stage, an oscillating stage and a receiving stage, and after each period is finished, the switch module is disconnected again to wait for the triggering of the next period to be conducted.

Corresponding to the above embodiments, the present application also provides a computer program product comprising executable instructions which, when executed on a computer, cause the computer to perform some or all of the steps of the above method embodiments.

In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "and/or", describes an association relation of association objects, and indicates that there may be three kinds of relations, for example, a and/or B, and may indicate that a alone exists, a and B together, and B alone exists. Wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of the following" and the like means any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.

Those of ordinary skill in the art will appreciate that the various elements and algorithm steps described in the embodiments disclosed herein can be implemented as a combination of electronic hardware, computer software, and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In several embodiments provided by the present application, any of the functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory RAM), a magnetic disk, or an optical disk, etc., which can store program codes.

The foregoing is merely exemplary embodiments of the present application, and any person skilled in the art may easily conceive of changes or substitutions within the technical scope of the present application, which should be covered by the present application. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. An ultrasonic signal processing circuit is used for being electrically connected with an ultrasonic transducer and is characterized by comprising a signal input end, a sampling module, a signal processing module, a switch module, a trigger module, a signal output end and a driving module;

the driving module is electrically connected with the signal output end and used for outputting a driving signal outwards, the signal input end is electrically connected with the signal output end and the ultrasonic transducer so as to receive an input signal, and the input signal comprises the driving signal and the signal input by the ultrasonic transducer;

The switch module is respectively and electrically connected with the signal input end and the sampling module, and is also electrically connected with the trigger module, and the trigger module is used for conducting the switch module between an oscillation stage and a receiving stage;

The sampling module is also electrically connected with the signal processing module, the switch module is conducted, and the sampling module samples the input signal and inputs the sampled signal to the signal processing module.

2. The circuit of claim 1, wherein the trigger module is an amplitude detection module for detecting an amplitude of the input signal.

3. The circuit of claim 2, wherein the amplitude detection module comprises a comparator that compares the magnitude of the input signal amplitude with a threshold, and the switching module is turned on based on a comparison result of the comparator.

4. The circuit of claim 3, wherein the amplitude detection module further comprises a first timing module; the threshold value is smaller than the input signal, the comparator outputs a first logic level, the threshold value is larger than the input signal, and the comparator outputs a second logic level; the first timing module detects the duration time of the second logic level, and the duration time meets the preset time to trigger the switch module to be conducted.

5. The circuit of claim 1, wherein the triggering module is a second timing module that completes timing triggering the switching module to conduct.

6. The circuit of claim 5, wherein the second timing module is electrically connected to the driving module, and the driving module triggers the second timing module to start timing when or after generating the driving signal.

7. The circuit of claim 5, further comprising a master control module electrically connected to the drive module and the second timing module, respectively, the master control module controlling the drive module to generate a drive signal and triggering the second timing module to start timing.

8. The circuit of any of claims 1-7, wherein the triggering module is configured to control the switching module to turn on when an envelope curve intensity of the oscillating phase is below a specified threshold between the oscillating phase and the receiving phase.

9. An ultrasound transducer chip for electrical connection with an ultrasound transducer, characterized in that the chip comprises a circuit according to any of claims 1-8.

10. An automotive radar device, characterized in that it comprises a chip as claimed in claim 9, and an ultrasonic transducer.