CN221079929U - Flow field adjusting device and plasma etching device - Google Patents

Flow field adjusting device and plasma etching device Download PDF

Info

Publication number
CN221079929U
CN221079929U CN202322908368.5U CN202322908368U CN221079929U CN 221079929 U CN221079929 U CN 221079929U CN 202322908368 U CN202322908368 U CN 202322908368U CN 221079929 U CN221079929 U CN 221079929U
Authority
CN
China
Prior art keywords
wafer
ring
flow field
plasma
reaction chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202322908368.5U
Other languages
Chinese (zh)
Inventor
游飞
谷志强
任舟逸
秦彬鑫
石小丽
许开东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Leuven Instruments Co Ltd
Original Assignee
Jiangsu Leuven Instruments Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Leuven Instruments Co Ltd filed Critical Jiangsu Leuven Instruments Co Ltd
Priority to CN202322908368.5U priority Critical patent/CN221079929U/en
Application granted granted Critical
Publication of CN221079929U publication Critical patent/CN221079929U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Drying Of Semiconductors (AREA)

Abstract

The utility model discloses a flow field adjusting device and a plasma etching device, which comprises an airflow shielding ring and a focusing ring, wherein the airflow shielding ring is arranged in a reaction cavity and is positioned above a wafer placing disc, an inner ring through hole of the airflow shielding ring is arranged opposite to a wafer placed on the wafer placing disc, and the shape of the inner ring through hole corresponds to the shape of the periphery of the wafer; the focusing ring is arranged on the wafer placing disc, the focusing ring is provided with an inner ring edge, the inner ring edge is used for being matched with the periphery of the wafer to form an annular drainage groove in a surrounding mode, and the annular drainage groove is used for introducing plasma air flow to the outer edge of the wafer. According to the flow field adjusting device, through adjusting the matching relation of the airflow shielding ring and the focusing ring, the plasma density of the center position and the edge position of the wafer is the same, the etching rate of the center position and the edge position of the wafer is balanced, and then the etching uniformity can be improved.

Description

Flow field adjusting device and plasma etching device
Technical Field
The utility model relates to the technical field of semiconductor chip production, in particular to a flow field adjusting device and a plasma etching device.
Background
In the manufacture of semiconductor devices, a plurality of identical devices are designed on a silicon wafer, and along with the reduction of the size of the devices, it becomes important to ensure the consistent performance among the devices, which directly determines the improvement of the product yield, and is beneficial to increasing the yield and reducing the manufacturing cost. The etching uniformity is a parameter for measuring the etching effect of the etching process on the whole silicon wafer or between silicon wafers or even between batches, and is also one of important parameters for measuring the process performance of etching equipment.
The main components of the etching cavity of the plasma etching machine are as follows: the plasma coupling coil 11, the air nozzle 12, the ICP power source 13, the lower electrode radio frequency source 14, the shielding cover 15, the quartz pressure plate 16, the helium pipeline 17, the vacuum channel 18 and the like. Process gas enters the plasma reaction chamber 19 through the gas nozzle 12, plasma is generated under the action of the plasma coupling coil 11, and the lower electrode radio frequency source 14 provides bias power to accelerate the plasma to bombard the substrate. In plasma etching techniques, an important factor affecting etch uniformity is gas flow. In a plasma chamber, a substrate is placed on an electrostatic chuck within a chamber, and a showerhead for injecting a gas into the chamber is typically mounted in the center or side wall of the chamber at the top, and the entire chamber is equipped with a vacuum pump for vacuum pumping. Due to the limitations of the overall structure, etc., the plasma density and distribution are not uniform, the gas flow is dispersed throughout the chamber, the etching uniformity for small-sized (e.g., less than 8 inch) polysilicon wafers is poor, and the etching rate at the edges is generally greater than that at the center. With the improvement of the line width control requirement of the semiconductor manufacturing process, the requirement on uniformity is also higher and higher.
In summary, how to solve the problem of poor etching uniformity when the plasma etching apparatus performs etching operation on the small-sized polysilicon wafer has become a technical problem to be solved by those skilled in the art.
Disclosure of utility model
In view of the above, the utility model provides a flow field adjusting device and a plasma etching device to solve the problem of poor etching uniformity when the plasma etching device performs etching operation on a small-sized polysilicon wafer.
In order to achieve the above purpose, the present utility model provides the following technical solutions:
A flow field adjusting device for being disposed in a reaction chamber of a plasma etching device, comprising:
the gas flow shielding ring is arranged in the reaction cavity and is positioned above the wafer placing disc, an inner ring through hole of the gas flow shielding ring is opposite to a wafer placed on the wafer placing disc, and the shape of the inner ring through hole corresponds to the shape of the periphery of the wafer;
The focusing ring is arranged on the wafer placing disc and is provided with an inner ring edge, the inner ring edge is used for being matched with the periphery of the wafer to form an annular drainage groove in a surrounding mode, and the annular drainage groove is used for introducing plasma air flow to the outer edge of the wafer.
Optionally, the reaction chamber further comprises an adjusting bracket which is arranged in the reaction chamber and used for supporting the airflow shielding ring.
Optionally, the adjusting bracket comprises a fixing bracket arranged on the focusing ring and a supporting column arranged between the fixing bracket and the airflow shielding ring, wherein an avoidance opening for avoiding the wafer is arranged on the fixing bracket.
Optionally, a distance between the bottom surface of the airflow shielding ring and the etched top surface of the wafer is a, where a is configured to: a is more than or equal to 30mm and less than or equal to 50mm.
Optionally, a preset gap is formed between the outer ring of the airflow shielding ring and the inner wall of the reaction cavity.
Optionally, the inner diameter of the inner ring through hole is not smaller than the outer diameter of the wafer.
Optionally, the inner diameter of the inner ring through hole takes a value r, where the value r is configured as: r is more than or equal to 160mm and less than or equal to 230mm.
Optionally, the inner ring through hole has a first flat side corresponding to a trimming position of the wafer, and the trimming is parallel to the first flat side.
Optionally, the length of the first flat edge is b, where the value of b is configured as follows: b is more than 0 and less than or equal to 57.5mm.
Optionally, the groove depth of the annular drainage groove is h, wherein the value of h is configured as follows: h is more than or equal to 4.25mm and less than or equal to 6.5mm.
Optionally, the inner ring edge has a second flat edge corresponding to the trimmed position and length of the wafer.
Compared with the introduction of the background technology, the flow field adjusting device is arranged in the reaction cavity of the plasma etching device and comprises an airflow shielding ring and a focusing ring, wherein the airflow shielding ring is arranged in the reaction cavity and is positioned above the wafer placing disc, an inner ring through hole of the airflow shielding ring is opposite to a wafer placed on the wafer placing disc, and the shape of the inner ring through hole corresponds to the peripheral shape of the wafer; the focusing ring is arranged on the wafer placing disc, the focusing ring is provided with an inner ring edge, the inner ring edge is used for being matched with the periphery of the wafer to form an annular drainage groove in a surrounding mode, and the annular drainage groove is used for introducing plasma air flow to the outer edge of the wafer. According to the flow field adjusting device, in the practical application process, the flow field adjusting device is arranged in the reaction cavity of the plasma etching device, generated plasmas in the reaction cavity circulate through the inner ring through holes of the airflow shielding ring, the airflow shielding ring can play a role in gathering plasmas towards the center of the inner ring through holes of the airflow shielding ring, and as the inner ring through holes are opposite to a wafer placed on the wafer placing disc, the shape of the inner ring through holes corresponds to the peripheral shape of the wafer, even if the flow field adjusting device is applied to etching operation of a small-size polycrystalline silicon wafer, the upper plasma density at the center of the wafer can be increased under the action of the airflow shielding ring, namely, the circulation opening of an airflow channel formed between the airflow shielding ring and the wafer can be changed by adjusting the height of the airflow shielding ring relative to the wafer, so that the airflow velocity of the plasmas can be controlled, the structure of the annular drainage groove can be adjusted in a matching manner, the plasma density at the center position and the edge position of the wafer can be adjusted, and even if the plasma density at the center position and the edge position of the wafer is the same, the etching rate can be further improved uniformly.
In addition, the utility model also provides a plasma etching device, which comprises a reaction cavity, wherein the flow field adjusting device described in any scheme is arranged in the reaction cavity. Because the flow field adjusting device has the technical effects, the plasma etching device with the flow field adjusting device also has corresponding technical effects, and the description is omitted here.
Optionally, the device further comprises a vacuum device for vacuumizing the reaction cavity and a jet assembly for supplying etching gas to the reaction cavity, wherein the cavity pressure of the reaction cavity is configured to be 5-80mTorr; the total flow of the jet assembly is configured to be 30sccm to 250sccm.
Optionally, the plasma processing device further comprises an ICP machine, wherein the ICP machine is used for enabling the etching gas sprayed into the reaction cavity by the gas spraying component to generate plasma and enabling the plasma to accelerate to bombard the wafer, the upper radio frequency power of the ICP machine ranges from 0W to 1000W, and the lower radio frequency power of the ICP machine ranges from 0W to 800W.
Optionally, the etching gas sprayed by the gas spraying component is configured as chlorine-based gas or bromine-based gas.
Optionally, the cooling device is used for cooling the reaction cavity, wherein the cooling temperature of the cooling device is configured to be 0-60 ℃.
Drawings
In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a prior art plasma etching apparatus;
FIG. 2 is a schematic diagram of the internal structure of a main reaction chamber of a plasma etching apparatus according to an embodiment of the present utility model;
FIG. 3 is a schematic top view of FIG. 2;
FIG. 4 is a schematic diagram showing the uniformity of the airflow shielding ring provided by the embodiment of the utility model under different lengths of the first flat sides;
FIG. 5 is a schematic diagram showing the uniformity of a focus ring at different second edge lengths according to an embodiment of the present utility model.
Wherein, in fig. 1:
the plasma coupling coil 11, the air nozzle 12, the ICP power source 13, the lower electrode radio frequency source 14, the shielding cover 15, the quartz pressure plate 16, the helium pipeline 17, the vacuum channel 18 and the plasma reaction chamber 19;
in fig. 2 and 3:
The wafer processing device comprises a first support column 101, an airflow shielding ring 102, an inner ring through hole 1021, a first flat edge 1022, an avoidance opening 103, a second support column 104, a fixed support 105, a focusing ring 106, an inner ring edge 1061, an equipment base 107, a wafer placing tray 108, an insulating ring 109, a sucking disc chamber 110, a reaction cavity 111, an adapter 112, a chamber inner wall 113 and an annular drainage groove 114.
Detailed Description
The utility model aims at providing a flow field adjusting device and a plasma etching device to solve the problem that etching uniformity is poor when the plasma etching device etches small-size polycrystalline silicon wafers.
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that, those skilled in the art will understand the basic structure of the plasma etching apparatus
Working principle:
Referring to FIG. 1, the main components of the etching chamber of the plasma etching machine are as follows: the plasma coupling coil 11, the air nozzle 12, the ICP power source 13, the lower electrode radio frequency source 14, the shielding cover 15, the quartz pressure plate 16, the helium pipeline 17, the vacuum channel 18 and the like. Process gas enters the plasma reaction chamber 19 through the gas nozzle 12, plasma is generated under the action of the plasma coupling coil 11, and the lower electrode radio frequency source 14 provides bias power to accelerate the plasma to bombard the substrate. In plasma etching techniques, an important factor affecting etch uniformity is gas flow. In a plasma chamber, a substrate is placed on an electrostatic chuck within a chamber, and a showerhead for injecting a gas into the chamber is typically mounted in the center or side wall of the chamber at the top, and the entire chamber is equipped with a vacuum pump for vacuum pumping.
Because of the limitations of the overall structure, such as the arrangement of equipment in the middle of the plasma reaction chamber 19, for the air flow channel in the plasma reaction chamber 19, the air flow preferentially flows away to the circulation channel near the cavity wall of the plasma reaction chamber 19 under the action of vacuumizing, then the plasma density of the plasma at the middle position relative to the plasma density at the peripheral cavity wall is relatively low, so that the plasma density and the distribution are uneven, the air flow is dispersed throughout the chamber, and especially, the etching uniformity of the polysilicon wafer with small size (such as less than 8 inches) is poor, and the etching rate at the edge is generally higher than that at the center.
Based on this, the present utility model specifically provides a flow field adjusting device, as shown in fig. 2 and 3, for being disposed in a reaction chamber 111 of a plasma etching device, including an airflow shielding ring 102 and a focusing ring 106, where the airflow shielding ring 102 is disposed in the reaction chamber 111 and above a wafer placing tray 108, an inner ring through hole 1021 of the airflow shielding ring 102 is disposed opposite to a wafer placed on the wafer placing tray 108, and a shape of the inner ring through hole 1021 corresponds to an outer peripheral shape of the wafer; the focus ring 106 is disposed on the wafer placing tray 108, the focus ring 106 has an inner ring edge 1061, and the inner ring edge 1061 is configured to match with the outer periphery of the wafer to form an annular induced flow groove 114, where the annular induced flow groove 114 is configured to introduce a plasma gas flow to the outer edge of the wafer.
According to the flow field adjusting device, in the practical application process, the flow field adjusting device is arranged in the reaction cavity 111 of the plasma etching device, generated plasmas in the reaction cavity 111 circulate through the inner ring through holes 1021 of the airflow shielding ring 102, the airflow shielding ring 102 can play a role of gathering plasmas towards the center of the inner ring through holes 1021 of the airflow shielding ring 102, as the inner ring through holes 1021 are opposite to a wafer placed on the wafer placing disc 108, the shape of the inner ring through holes 1021 corresponds to the peripheral shape of the wafer, even if the flow field adjusting device is applied to etching operation of small-size polycrystalline silicon wafers, the density of plasmas above the center of the wafer can be increased under the action of the airflow shielding ring 102, the circulation opening of an airflow channel formed between the inner ring through holes 1021 and the wafer can be changed by adjusting the height of the airflow shielding ring 102 relative to the wafer, and accordingly, the airflow flow velocity of the plasmas can be controlled, the edge positions of the wafer can be adjusted by matching with the structure of the annular diversion trenches 114, and finally, the center positions of the wafer and the edge positions can be the same as well as the etching positions of the edge positions of the wafer can be evenly and the etching positions of the wafer can be evenly.
In some specific embodiments, the flow field adjusting device may further include an adjusting bracket disposed in the reaction chamber 111 and used for supporting the gas flow shielding ring 102. Through this regulation support of design for the arrangement position adjustment of airflow shielding ring 102 is more convenient, for example, according to the demand of difference only need change different supporting height's regulation support can.
In a further embodiment, the adjusting support may specifically include a fixing support 105 disposed on the focusing ring 106 and a support column disposed between the fixing support 105 and the airflow shielding ring 102, where the fixing support 105 is provided with an avoidance opening 103 for avoiding the wafer, and the plasma passes through an inner ring through hole of the airflow shielding ring 102 and then passes through the avoidance opening 103 to reach the top surface of the wafer; the support columns may specifically include the first support column 101 and the second support column 104, or may be designed into more than two support columns according to the requirement, or may be designed into only one support column, and in the practical application process, the configuration may be selected according to the practical requirement and the arrangement requirement, which is not limited in any more detail herein.
In some specific embodiments, the distance between the bottom surface of the airflow shielding ring 102 and the etched top surface of the wafer is a, where a is configured as follows: a is more than or equal to 30mm and less than or equal to 50mm. Through a large number of simulation tests, the flow field adjustment requirements can be basically met by configuring the value of a to be the value range. It will be understood, of course, that the above value ranges of a are merely examples of embodiments of the present utility model, and other value ranges may be selected and configured according to actual requirements in the practical application process, which is not limited in any way.
In other embodiments, the outer ring of the gas flow shielding ring 102 may have a predetermined gap with the inner wall 113 of the reaction chamber 111. By designing a preset gap between the two, the plasma can be effectively prevented from accumulating at the outer ring position of the airflow shielding ring 102. The majority of the plasma air flows out through the inner ring through holes of the air flow shielding ring 102, and a small portion of the plasma air flows out through the preset gap, for example, 10% of the plasma air flows out through the preset gap, and the other 90% of the plasma air flows out through the inner ring through holes of the air flow shielding ring 102. Thus, the placement of the predetermined gap does not affect the effect of the airflow shroud ring 102 to focus the plasma. It will be understood, of course, that this way of arranging the preset gap is merely a preferred example of the embodiment of the present utility model, and in a practical application process, a structure without the preset gap may be designed, so that the density of the plasma flowing out from the inner ring through hole of the airflow shielding ring 102 may be maximized, but the connection position between the outer ring of the airflow shielding ring 102 and the inner wall 113 of the chamber may generate a problem of plasma accumulation and aggregation. In the practical application process, the corresponding preset gap size can be selected or the preset gap can be canceled according to specific requirements, and the method is not limited in detail.
In some specific embodiments, the inner diameter of the inner ring through hole 1021 is preferably designed to be not smaller than the outer diameter of the wafer. By designing the structure, the plasma distribution on the top surface of the wafer can be relatively more uniform.
Specifically, the inner diameter of the inner ring through hole 1021 is r, where the value of r is configured as follows: r is more than or equal to 160mm and less than or equal to 230mm. It will be understood, of course, that the value of r is related to the size of the wafer, and is primarily set for most small sized (e.g., less than 8 inches) polysilicon wafers. In the practical application process, the adjustment can be performed according to the practical requirement, and the adjustment is not particularly limited herein.
In other specific embodiments, the inner ring via 1021 has a first flat side 1022 corresponding to the position of the cut edge of the wafer, and the cut edge is parallel to the first flat side 1022. It should be noted that, the trimming of the wafer is mainly used for positioning the wafer, and the first flat edge 1022 is designed on the inner ring through hole and is corresponding to and parallel to the trimming position of the wafer, so that the plasma at the trimming position of the wafer is more uniformly distributed. Specifically, for different wafer sizes, the length of the first flat edge 1022 may be configured according to requirements, for example, the length of the first flat edge 1022 is b, where the value of b may be configured as follows: b is more than 0 and less than or equal to 57.5mm. Similarly, for different wafer sizes, the groove depth of the annular drainage groove 114 is h, where the value of h may be configured as follows: h is more than or equal to 4.25mm and less than or equal to 6.5mm. It will be understood, of course, that the values of b and h are merely examples of embodiments of the present utility model, and other values may be designed according to the requirements in the practical application process.
In other embodiments, the inner ring edge 1061 has a second flat edge corresponding to the cut edge position and length of the wafer. By designing the inner ring edge 1061 of the focus ring 106 into the above structure, the plasma gas flow distribution at the position of the edge of the wafer corresponding to the trimming is more uniform, which is helpful for realizing uniform etching.
In addition, the utility model also provides a plasma etching device, which comprises a reaction cavity 111, wherein the flow field adjusting device described in any scheme is arranged in the reaction cavity 111. Since the flow field adjusting device has the technical effects, the plasma etching device with the flow field adjusting device should have the corresponding technical effects, and will not be described herein.
It should be understood by those skilled in the art that, referring to fig. 2, a relevant device for installing the wafer placing tray 108 should be disposed in the reaction chamber 111 of the plasma etching apparatus, for example, the wafer placing tray 108 is an electrostatic chuck, the relevant device configured should also have an insulating ring 109 with a chuck chamber 110 disposed in the chuck chamber, and a device base 107 designed outside the chuck chamber 110, the focusing ring 106 may be installed on the device base 107, and in addition, an adapter 112 for connecting other relevant devices should be designed under the reaction chamber 111 of the plasma etching apparatus, because this part of the structure belongs to a relatively conventional structure, which will not be described in more detail herein.
In a further embodiment, the plasma etching apparatus may further include a vacuum device for evacuating the reaction chamber 111 and a gas injection assembly for supplying an etching gas to the reaction chamber 111, wherein a chamber pressure of the reaction chamber 111 may be configured to be 5-80mTorr; the total flow of the jet assembly may be configured to be 30sccm to 250sccm. In addition, the plasma etching apparatus may further include an ICP machine, wherein the ICP machine is used for generating plasma from etching gas injected into the reaction chamber 111 by the gas injection assembly and accelerating the plasma to bombard the wafer, and an upper rf power of the ICP machine is in a range of 0-1000W, and a lower rf power of the ICP machine is in a range of 0-800W. In addition, the plasma etching apparatus may further include a cooling device for cooling the reaction chamber, wherein a cooling temperature of the cooling device may be configured to be 0-60 ℃.
It will be understood, of course, that the above-mentioned parameter configuration is merely an example of the embodiment of the present utility model, and other parameter configurations may be selected and designed according to actual requirements in the practical application process, which is not limited in more detail herein.
It should be noted that the configuration of the etching gas sprayed by the above-mentioned spraying assembly may be specifically a chlorine-based gas or a bromine-based gas, or other etching gases commonly used by those skilled in the art, which are not limited herein in more detail.
For a better understanding of the plasma etching apparatus provided by the present utility model, the following is briefly described in connection with a specific application scenario:
referring to fig. 2 and 3 in combination with fig. 4, taking an example of etching uniformity when lengths of the first flat edges 1022 of the inner ring through holes 1021 of the airflow blocking ring 102 in the flow field adjusting device are different:
step 1: sequentially forming a SiO2 insulating layer and a Poly layer on a 6-inch semiconductor substrate;
Step 2: the ICP chamber is additionally provided with a plasma flow field adjusting device, the inner diameter of a special-shaped hole (namely an inner ring through hole 1021) of the air flow shielding ring 102 is configured to be 170mm, the height of a supporting column of the air flow shielding ring 102 is configured to be 30mm, the groove depth of an annular drainage groove corresponding to the focusing ring 106 is 6.5mm, and the length of a second flat edge of an inner ring edge 1061 of the focusing ring 106 is configured to be 47.5mm; the lengths of the first flat edges 1022 of the airflow shielding ring 102 are respectively adjusted to be 0mm, 47.5mm and 57.5mm;
Step 3: and (3) carrying out high-speed etching on the 6-inch poly blank wafer by using an ICP (inductively coupled plasma) etching machine, wherein parameters of the ICP etching machine are set as follows in the etching process: the upper radio frequency power is 600W, the lower radio frequency power is 140W, the temperature of a cold water machine of the ICP etching machine is 60 ℃, the cavity pressure is 10mTorr, and the use gas is 60sccmCl 2 and 120sccm HBr,5sccmHeO. The etching time is 30s, and the uniformity of the etching rate is shown in FIG. 4, so that the uniformity of the 6 inch poly blankwafer is less than 2 percent (49 point extremely bad method).
Step 4: and (3) carrying out low-rate etching on the 6-inch poly blank wafer by using an ICP (inductively coupled plasma) etching machine, wherein parameters of the ICP etching machine are set as follows in the etching process: the upper radio frequency power is 350W, the lower radio frequency power is 120W, the temperature of a cold water machine of the ICP etching machine is 60 ℃, the cavity pressure is 10mTorr, and the gas is 50sccmCl 2 and 150sccm HBr,5sccmHeO. The etching time is 30s, and the uniformity of the etching rate is shown in FIG. 4, so that the uniformity of the 6 inch poly blankwafer is less than 2 percent (49 point extremely bad method).
Referring to fig. 2 and 3 in combination with fig. 5, taking as an example etching uniformity when the second flat edge length of the inner annular edge 1061 of the focus ring 106 in the flow field adjustment device is different:
step 1: sequentially forming a SiO2 insulating layer and a Poly layer on a 6-inch semiconductor substrate;
step 2: the ICP chamber is additionally provided with a plasma flow field adjusting device, the inner diameter of a special-shaped hole (namely an inner ring through hole) of the airflow shielding ring 102 is configured to be 170mm, the height of a supporting column of the airflow shielding ring 102 is configured to be 30mm, the length of a first flat edge of the airflow shielding ring 102 is configured to be 47.5mm, and the groove depth of an annular drainage groove 114 of the focusing ring 106 is configured to be 6.5mm; the lengths of the second flat sides of the focusing rings 106 are respectively adjusted to be 0mm, 47.5mm and 57.5mm;
step 3: and (3) carrying out high-speed etching on the 6-inch poly blank wafer by using an ICP (inductively coupled plasma) etching machine, wherein parameters of the ICP etching machine are set as follows in the etching process: the upper radio frequency power is 600W, the lower radio frequency power is 140W, the temperature of a cold water machine of the ICP etching machine is 60 ℃, the cavity pressure is 10mTorr, and the use gas is 60sccmCl 2 and 120sccm HBr,5sccmHeO. The etching time is 30s, and the uniformity of the etching rate is shown in FIG. 5, so that the uniformity of the 6 inch poly blankwafer is less than 2 percent (49 point extremely bad method).
Step 4: the ICP etcher is used for carrying out low-rate etching on 6 inches of poly blank wafer, and parameters of the ICP etcher are set in the etching process as follows: the upper radio frequency power is 350W, the lower radio frequency power is 120W, the temperature of a cold water machine of the ICP etching machine is 60 ℃, the cavity pressure is 10mTorr, and the gas is 50sccmCl 2 and 150sccm HBr,5sccmHeO. The etching time is 30s, and the uniformity of the etching rate is shown in FIG. 5, so that the uniformity of the 6 inch poly blankwafer is less than 2 percent (49 point extremely bad method).
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
As used in the specification and in the claims, the terms "a," "an," "the," and/or "the" are not specific to a singular, but may include a plurality, unless the context clearly dictates otherwise. In general, the terms "comprises" and "comprising" merely indicate that the steps and elements are explicitly identified, and they do not constitute an exclusive list, as other steps or elements may be included in a method or apparatus. The inclusion of an element defined by the phrase "comprising one … …" does not preclude the presence of additional identical elements in a process, method, article, or apparatus that comprises an element.
In addition, in the description of the embodiments of the present application, "plurality" means two or more than two. The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
The principles and embodiments of the present utility model have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the core concepts of the utility model. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the utility model can be made without departing from the principles of the utility model and these modifications and adaptations are intended to be within the scope of the utility model as defined in the following claims.

Claims (16)

1. A flow field adjusting device for being disposed in a reaction chamber (111) of a plasma etching apparatus, comprising:
The gas flow shielding ring (102) is arranged in the reaction cavity (111) and is positioned above the wafer placing disc (108), an inner ring through hole (1021) of the gas flow shielding ring (102) is arranged opposite to a wafer placed on the wafer placing disc (108), and the shape of the inner ring through hole (1021) corresponds to the peripheral shape of the wafer;
the focusing ring (106) is arranged on the wafer placing disc (108), the focusing ring (106) is provided with an inner ring edge (1061), the inner ring edge (1061) is used for being matched with the periphery of the wafer to form an annular drainage groove (114) in a surrounding mode, and the annular drainage groove (114) is used for introducing plasma airflow to the outer edge of the wafer.
2. The flow field adjustment device of claim 1, further comprising an adjustment bracket disposed within the reaction chamber (111) for supporting the airflow baffle ring (102).
3. The flow field adjustment device according to claim 2, characterized in that the adjustment bracket comprises a fixed bracket (105) arranged on the focusing ring (106) and a support column arranged between the fixed bracket (105) and the airflow shielding ring (102), wherein an avoidance opening (103) for avoiding the wafer is arranged on the fixed bracket (105).
4. The flow field adjustment device of claim 1, wherein a distance between a bottom surface of the airflow shroud ring (102) and an etched top surface of the wafer is a, wherein a is configured to: a is more than or equal to 30mm and less than or equal to 50mm.
5. The flow field adjustment device according to claim 1, characterized in that a predetermined gap is provided between the outer ring of the gas flow barrier ring (102) and the inner chamber wall (113) of the reaction chamber (111).
6. The flow field adjustment device of claim 1, wherein an inner diameter of the inner annular through hole is not smaller than an outer diameter of the wafer.
7. The flow field adjustment device of claim 6, wherein the inner diameter of the inner annular through bore (1021) has a value r, wherein the value of r is configured to: r is more than or equal to 160mm and less than or equal to 230mm.
8. The flow field adjustment device of claim 5, wherein the inner ring through hole (1021) has a first flat side (1022) corresponding to a trimming position of the wafer, and the trimming is parallel to the first flat side (1022).
9. The flow field adjustment device of claim 8, wherein the first flat side (1022) has a length b, wherein b is configured to: b is more than 0 and less than or equal to 57.5mm.
10. The flow field adjustment device according to claim 1, characterized in that the annular draft slot (114) has a slot depth h, wherein the value of h is configured to: h is more than or equal to 4.25mm and less than or equal to 6.5mm.
11. The flow field adjustment device of claim 1, wherein the inner ring edge (1061) has a second flat side corresponding to the cut location and length of the wafer.
12. A plasma etching apparatus comprising a reaction chamber, wherein a flow field adjusting apparatus according to any one of claims 1 to 11 is provided in the reaction chamber.
13. The plasma etching apparatus of claim 12, further comprising a vacuum device for evacuating the reaction chamber (111) and a gas injection assembly for supplying an etching gas to the reaction chamber (111), wherein a chamber pressure of the reaction chamber (111) is configured to be 5-80mTorr; the total flow of the jet assembly is configured to be 30sccm to 250sccm.
14. The plasma etching apparatus of claim 13, further comprising an ICP machine, wherein the ICP machine is configured to generate plasma from etching gas injected into the reaction chamber (111) by the gas injection assembly and accelerate the plasma to bombard the wafer, and an upper rf power of the ICP machine is in a range of 0 to 1000W and a lower rf power of the ICP machine is in a range of 0 to 800W.
15. The plasma etching apparatus of claim 13, wherein the etching gas injected by the gas injection assembly is configured as a chlorine-based gas or a bromine-based gas.
16. The plasma etching apparatus as recited in claim 12, further comprising a cooling device for cooling the reaction chamber, wherein a cooling temperature of the cooling device is configured to be 0-60 ℃.
CN202322908368.5U 2023-10-27 2023-10-27 Flow field adjusting device and plasma etching device Active CN221079929U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322908368.5U CN221079929U (en) 2023-10-27 2023-10-27 Flow field adjusting device and plasma etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322908368.5U CN221079929U (en) 2023-10-27 2023-10-27 Flow field adjusting device and plasma etching device

Publications (1)

Publication Number Publication Date
CN221079929U true CN221079929U (en) 2024-06-04

Family

ID=91259564

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202322908368.5U Active CN221079929U (en) 2023-10-27 2023-10-27 Flow field adjusting device and plasma etching device

Country Status (1)

Country Link
CN (1) CN221079929U (en)

Similar Documents

Publication Publication Date Title
KR101504084B1 (en) Apparatus and method for controlling edge performance in an inductively coupled plasma chamber
JP5875864B2 (en) Lower liner with integrated flow balancer and improved conductance
TWI484577B (en) Etch reactor suitable for etching high aspect ratio features
US20050224180A1 (en) Apparatus for controlling gas flow in a semiconductor substrate processing chamber
TWI744673B (en) Loadlock integrated bevel etcher system
JP2020512692A (en) Electrostatic chuck with flexible wafer temperature control
CN107516626B (en) System and method for in-situ wafer edge and backside plasma cleaning
TWI466186B (en) Methods to eliminate "m-shape" etch rate profile in inductively coupled plasma reactor
US10297457B2 (en) Controlling azimuthal uniformity of etch process in plasma processing chamber
JP2007067037A (en) Vacuum processing device
KR20200051494A (en) Placing table, positioning method of edge ring and substrate processing apparatus
KR20180086279A (en) Achieve uniform wafer temperature in asymmetric chamber environments
TW201523683A (en) Bottom electrode apparatus and plasma processing device
JP2014096553A (en) Plasma processing method and plasma processing device
KR102343265B1 (en) Self-centering pedestal heater
CN221079929U (en) Flow field adjusting device and plasma etching device
TW201310521A (en) Pedestal with edge gas deflector for edge profile control
TW202231130A (en) Plasma processing apparatus and adjustment method capable of replacing the adjusting ring to meet process requirements and providing convenience for adjusting etching parameters
CN110137130B (en) Size conversion tray for dry etching system
TW201318063A (en) Inductance coupling plasma device for improving uniformity and efficiency of plasmon
JP6529943B2 (en) Method of manufacturing semiconductor device and plasma etching apparatus used for the method
CN105448633A (en) Plasma processing apparatus
CN103165384B (en) A kind of plasma etching room
CN218918783U (en) Inductively coupled plasma processing equipment and inductively coupled coil assembly
JP2002009049A (en) Plasma processing method and plasma processor using the same

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant