CN220985918U - DBC plate structure and high-power switch module - Google Patents

Abstract

The utility model discloses a DBC plate structure and a high-power switch module, relates to the technical field of DBC plates, and solves the technical problem that the reliability of a power semiconductor module is low because a DBC plate deforms when an existing power chip is welded with the DBC plate. The structure comprises a first copper-clad layer, a ceramic layer and a second copper-clad layer, wherein the ceramic layer is arranged between the first copper-clad layer and the second copper-clad layer; and a plurality of copper layer areas are etched on the first copper-clad layer, and a plurality of stress relief holes are formed in the edge of each copper layer area. The first copper-clad layer is provided with the plurality of copper layer areas, and the edges of the copper layer areas are provided with the plurality of stress relief holes, so that the internal stress generated when the power chip is welded on the DBC plate structure can be released, the deformation of the power chip and the DBC plate structure can be improved, and the reliability of the power semiconductor module is improved.

Description

DBC plate structure and high-power switch module

Technical Field

The utility model relates to the technical field of DBC boards, in particular to a DBC board structure and a high-power switch module.

Background

Power semiconductor modules, also known as power electronics, which generally function as power processors, are semiconductor devices with the ability to handle high voltages, large currents, including frequency conversion, voltage transformation, current conversion, power management, and the like.

In the manufacturing process of the power module, the power semiconductor module is finally formed by packaging after primary welding and secondary welding. However, during the soldering process of the power module, the DBC board is affected by the high temperature vacuum environment, thereby generating thermal stress. The DBC sheet expands when heated and contracts when cooled, which causes internal stresses in the DBC sheet and some deformation of the DBC sheet.

When the power chip is welded on the DBC plate, the power chip and the DBC plate are influenced due to the difference of the thermal expansion coefficients of the power chip and the DBC plate, the internal stress of the DBC plate cannot be released in the high-temperature welding process, the DBC plate and the power chip are deformed, and the service life and the reliability of the power semiconductor module are finally influenced.

As shown in fig. 1, in the prior art, stress generated during the welding process is released by directly providing a stress relief hole 2 'in a mounting substrate 1', and the deformation problem is relieved, but the overall effect is not significant enough.

In the process of implementing the present utility model, the inventor finds that at least the following problems exist in the prior art:

when the existing power chip is welded with the DBC board, the DBC board can deform, so that the reliability of the power semiconductor module is low.

Disclosure of utility model

The utility model aims to provide a DBC plate structure and a high-power switch module, which are used for solving the technical problem that the reliability of a power semiconductor module is lower because a DBC plate deforms when a power chip is welded with the DBC plate in the prior art. The preferred technical solutions of the technical solutions provided by the present utility model can produce a plurality of technical effects described below.

In order to achieve the above purpose, the present utility model provides the following technical solutions:

The DBC plate structure provided by the utility model comprises a first copper-clad layer, a ceramic layer and a second copper-clad layer, wherein the ceramic layer is arranged between the first copper-clad layer and the second copper-clad layer;

And a plurality of copper layer areas are etched on the first copper-clad layer, and a plurality of stress relief holes are formed in the edge of each copper layer area.

Preferably, the plurality of copper layer regions are uniformly distributed on the first copper-clad layer.

Preferably, in each of the copper layer regions, the plurality of stress relief holes are uniformly distributed over an edge of the copper layer region.

Preferably, the number of copper layer regions on the first copper-clad layer is two, three, four or nine.

A high power switch module comprising a DBC board structure according to any of the above, and a positive terminal, a negative terminal and a plurality of chip modules disposed on the DBC board structure; the chip modules are connected in series end to end, the positive terminal is connected with the first chip module of the plurality of chip modules, and the negative terminal is connected with the last chip module of the plurality of chip modules.

Preferably, the second copper-clad layer is etched with a negative electrode terminal copper layer and a plurality of chip module copper layers, the negative electrode terminal is arranged on the negative electrode terminal copper layer, each chip module in the plurality of chip modules is arranged on one chip module copper layer, and the positive electrode terminal is arranged on the chip module copper layer corresponding to the first chip module.

Preferably, each chip module comprises a first power chip, a second power chip, a gate control terminal and a sampling terminal;

Each chip module copper layer comprises a chip copper layer, a gate control terminal copper layer and a sampling terminal copper layer;

in the chip module copper layer corresponding to each chip module, the first power chip and the second power chip are both arranged on the chip copper layer, the gate control terminal is arranged on the gate control terminal copper layer, and the sampling terminal is arranged on the sampling terminal copper layer;

In each chip module, the gate electrode control terminal copper layer is connected with the gate electrode of the first power chip through a bonding wire, and the sampling terminal copper layer is connected with the position, except the gate electrode, on the first power chip through a bonding wire;

in the adjacent two chip modules, the adjacent two first power chips are connected in series, and the adjacent two second power chips are connected in series.

Preferably, in the chip module copper layer corresponding to each chip module, the first power chip and the second power chip are welded with the chip copper layer in a vacuum reflow soldering manner by using solder, and the gate control terminal and the sampling terminal are respectively connected with the gate control terminal copper layer and the sampling terminal copper layer in a solder bonding or vacuum reflow soldering manner;

The positive terminal and the negative terminal are respectively connected with the first chip module copper layer and the negative terminal copper layer in a solder bonding or vacuum reflow soldering mode.

Preferably, the gate control terminal copper layer and the sampling terminal copper layer on each chip module copper layer are located at the side edge of the second copper-clad layer;

The gate control terminal, the sampling terminal, the positive terminal and the negative terminal are S-shaped or Z-shaped.

Preferably, the switch module further comprises an encapsulation colloid, and the encapsulation colloid wraps the second copper-clad layer, the positive electrode terminal, the negative electrode terminal, the plurality of chip modules, the plurality of chip module copper layers and the negative electrode terminal copper layer.

By implementing one of the technical schemes, the utility model has the following advantages or beneficial effects:

The first copper-clad layer is provided with the plurality of copper layer areas, and the edges of the copper layer areas are provided with the plurality of stress relief holes, so that the internal stress generated when the power chip is welded on the DBC plate structure can be released, the deformation of the power chip and the DBC plate structure can be improved, and the reliability of the power semiconductor module is improved.

Drawings

For a clearer description of the technical solutions of embodiments of the present utility model, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art, in which:

FIG. 1 is a schematic view of a conventional mounting substrate;

FIG. 2 is a schematic view showing the overall structure of a first embodiment of the present utility model;

FIG. 3 is a schematic view of a first copper-clad layer etched with two etching grooves in the longitudinal direction in accordance with a first embodiment of the present utility model;

FIG. 4 is a schematic diagram of etching an etching groove in the transverse direction and the longitudinal direction of the first copper-clad layer according to the first embodiment of the present utility model;

FIG. 5 is a schematic diagram of a first copper-clad layer with two etching grooves etched in the transverse direction and the longitudinal direction respectively in a first embodiment of the present utility model;

FIG. 6 is a schematic overall structure of a second embodiment of the present utility model;

FIG. 7 is a schematic diagram of a current flow in accordance with a second embodiment of the present utility model;

FIG. 8 is a schematic diagram of a structure of each copper layer on the second copper clad layer in the DCB structure according to the second embodiment of the present utility model.

In the figure: 1. a DBC plate structure; 11. a first copper-clad layer; 111. a copper layer region; 112. stress relief holes; 113. etching a groove; 12. a ceramic layer; 13. a second copper-clad layer; 131. a chip copper layer; 132. a negative terminal copper layer; 133. a gate control terminal copper layer; 134. sampling a terminal copper layer; 135. a first power chip region; 136. a second power chip region; 2. a positive electrode terminal; 3. a negative electrode terminal; 4. a first power chip; 41. a gate electrode; 5. a second power chip; 6. a gate control terminal; 7. a sampling terminal; 8. and (5) bonding wires.

Detailed Description

For a better understanding of the objects, technical solutions and advantages of the present utility model, reference should be made to the various exemplary embodiments described hereinafter with reference to the accompanying drawings, which form a part hereof, and in which are described various exemplary embodiments which may be employed in practicing the present utility model. The same reference numbers in different drawings identify the same or similar elements unless expressly stated otherwise. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. It is to be understood that they are merely examples of processes, methods, apparatuses, etc. that are consistent with certain aspects of the present disclosure as detailed in the appended claims, other embodiments may be utilized, or structural and functional modifications may be made to the embodiments set forth herein without departing from the scope and spirit of the present disclosure.

In the description of the present utility model, it should be understood that the terms "center," "longitudinal," "transverse," and the like are used in an orientation or positional relationship based on that shown in the drawings, and are merely for convenience in describing the present utility model and to simplify the description, rather than to indicate or imply that the elements referred to must have a particular orientation, be constructed and operate in a particular orientation. The terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "plurality" means two or more. The terms "connected," "coupled" and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, integrally connected, mechanically connected, electrically connected, communicatively connected, directly connected, indirectly connected via intermediaries, or may be in communication with each other between two elements or in an interaction relationship between the two elements. The term "and/or" includes any and all combinations of one or more of the associated listed items. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

In order to illustrate the technical solutions of the present utility model, the following description is made by specific embodiments, only the portions related to the embodiments of the present utility model are shown.

Embodiment one:

As shown in fig. 2, the present utility model provides a DBC board structure including a first copper clad layer 11, a ceramic layer 12, and a second copper clad layer 13, the ceramic layer 12 being disposed between the first copper clad layer 11 and the second copper clad layer 13; the first copper-clad layer 11 is etched with a plurality of copper layer regions 111, and a plurality of stress relief holes 112 are formed at the edge of each copper layer region 111.

Specifically, when the power chip and other components in the switch module are welded on the DBC board structure 1, internal stress is generated when the power chip and other components are welded on the DBC board structure 1 at high temperature, and the internal stress can cause the deformation of the DBC board structure 1, so that the power chip and other components are deformed. The etched copper layer regions 111 on the first copper-clad layer 11 and the stress relief holes 112 arranged at the edges of the copper layer regions 111 can release the internal stress generated on the DBC board structure 1 during high-temperature welding, so that deformation during high-temperature welding is reduced.

In this embodiment, the first copper-clad layer 11 is divided into the plurality of copper layer areas 111 by adding the etching groove 113, so that the contact surface can be reduced to a certain extent in the high-temperature welding process, the heat dissipation capability can be improved, and the internal stress generated in the welding process can be further released.

As an alternative embodiment, the plurality of copper layer areas 111 are uniformly distributed on the first copper-clad layer 11. The etching bath 113 equally divides the first copper-clad layer 11 into two copper layer regions, three copper layer regions, four copper layer regions or nine copper layer regions. It should be noted that, the copper layer region 111 on the first copper clad layer 11 can divide the first copper clad layer 11 into a plurality of copper layer regions 111 by etching the etching grooves 113 with different numbers according to actual situations, and when the power chip and the component are welded with the DBC board structure 1 at high temperature, the plurality of copper layer regions 111 can buffer and release the internal stress of the DBC board structure 1 in the welding process.

As shown in fig. 2-5, the first copper-clad layer 11 is divided into a different number of copper layer regions 111 by etching a different number of etching trenches 113 on the first copper-clad layer 11. In this embodiment, the etching grooves 113 with different numbers are etched to divide the etching grooves into copper layer regions 111 with different numbers, so that deformation of the DBC plate in the vertical direction in the welding process can be reduced, the deformation problem is greatly improved, and the yield is effectively improved.

As shown in table 1, the deformation of the DBC board structure etched with the plurality of copper layer regions 111 in this embodiment is greatly improved during welding, thereby improving the service life, yield and reliability of the power module, as compared with the DBC board not etched with the etching grooves 113, in which the etching grooves 113 are etched on the first copper layer 11 to divide the same into the plurality of copper layer regions 111.

TABLE 1

In the present embodiment, the number of etching grooves 113 may be selected according to the actual situation, but it is known from the data provided in table 1 that the greater the number of etching grooves 113, the greater the number of copper layer regions 111 to be separated, and the better the effect to be achieved.

As an alternative embodiment, in each copper layer region 111, a plurality of stress relief holes 112 are uniformly distributed over the edges of the copper layer region 111. Specifically, the stress relief holes 112 are equidistantly arranged at intervals on the edge of the copper layer region 111, so that internal stress generated in the high-temperature welding process can be further eliminated, and a better release effect can be achieved.

As an alternative embodiment, the first copper-clad layer 11, the ceramic layer 12 and the second copper-clad layer 13 are connected by hot pressing, soldering with an inorganic paste, welding or sintering at a low temperature by using a DBC, AMB or other planar ceramic substrate process.

The embodiment is a specific example only and does not suggest one such implementation of the utility model.

Embodiment two:

As shown in fig. 6, a high power switch module includes a DBC board structure 1 according to embodiment one, and a positive terminal 2, a negative terminal 3 and a plurality of chip modules disposed on the DBC board structure 1; the plurality of chip modules are connected in series end to end, the positive electrode terminal 2 is connected with the first chip module of the plurality of chip modules, and the negative electrode terminal 3 is connected with the last chip module of the plurality of chip modules.

Specifically, as shown in fig. 6, the positive electrode terminal 2, the negative electrode terminal 3 and the plurality of chip modules are all disposed on the second copper-clad layer 13 on the DBC board structure 1, and the chips on the plurality of chip modules are electrically connected in series end to end. The positive terminal 2 is connected with the first chip module, and a plurality of chip modules are connected in series in proper order in the middle, namely first chip module, second chip module, &..the last chip module is connected in series in proper order. The negative terminal 3 is arranged after the last chip module and is connected to the last chip module.

As shown in fig. 7, the dotted arrows indicate the flow of current, the positive electrode terminal 2, the plurality of chip modules, and the negative electrode terminal 3 are connected end to end in this order to form a series structure, and the current flows from the positive electrode terminal 2 through the plurality of chip modules connected in series in the middle and finally flows back to the negative electrode terminal 3 to form a series circuit. The positive electrode terminal 2, the negative electrode terminal 3 and the plurality of chip modules in the embodiment are connected in series, so that stray inductance in the modules can be reduced, voltage can be divided in a series mode, the high-power switch module is suitable for high-power application scenes, and the reliability of the switch module is improved.

As an alternative embodiment, as shown in fig. 8, the second copper-clad layer 13 is etched with a negative terminal copper layer 132 and a plurality of chip module copper layers, the negative terminal 3 is disposed on the negative terminal copper layer 132, each of the plurality of chip modules is disposed on one chip module copper layer, and the positive terminal 2 is disposed on the chip module copper layer corresponding to the first chip module.

The second copper-clad layer 13 is provided with a plurality of copper layers for correspondingly placing the positive electrode terminal 2, the negative electrode terminal 3 and a plurality of chip modules, and errors generated in the welding process can be avoided and the stability and reliability of welding are improved because the positive electrode terminal 2, the negative electrode terminal 3 or the chip modules are placed at corresponding positions.

Specifically, the negative electrode terminal 3 is correspondingly arranged on the negative electrode terminal copper layer 132, the chip in each chip module is correspondingly arranged on the corresponding chip module copper layer, then the negative electrode terminal 3, the chip module and the positive electrode terminal 2 are welded on the negative electrode terminal copper layer 132 and the corresponding chip module copper layer in a welding mode, the positions of the negative electrode terminal 3, the positive electrode terminal 2 and the chip module in the welding process are not moved, and the welding stability, the welding accuracy and the product reliability can be ensured.

The positive electrode terminal 2, the negative electrode terminal 3 and the chip module in the present embodiment are welded on the DBC board structure 1 described in the first embodiment, so that when the negative electrode terminal 3, the positive electrode terminal 2 and the chip module are welded on the DBC board structure 1, deformation of the DBC board structure 1, the positive electrode terminal 2, the negative electrode terminal 3 and the chip module can be reduced, internal stress during high-temperature welding can be reduced, and service life, yield and reliability of the power module can be improved.

As an alternative embodiment, each chip module comprises a first power chip 4, a second power chip 5, a gate control terminal 6 and a sampling terminal 7; each chip module copper layer comprises a chip copper layer 131, a gate control terminal copper layer 133 and a sampling terminal copper layer 134; in the chip module copper layer corresponding to each chip module, the first power chip 4 and the second power chip 5 are both disposed on the chip copper layer 131, the gate control terminal 6 is disposed on the gate control terminal copper layer 133, and the sampling terminal 7 is disposed on the sampling terminal copper layer 134.

As shown in fig. 6 to 8, the first power chip 4, the second power chip 5, the gate control terminal 6, and the sampling terminal 7 included in the chip module may be disposed on the chip copper layer 131, the gate control terminal copper layer 133, and the sampling terminal copper layer 134, respectively. The chip copper layer 131 includes a first power chip region 135 and a second power chip region 136, in the chip module copper layer corresponding to each chip module, the first power chip 4 and the second power chip 5 are disposed in the first power chip region 135 and the second power chip region 136 on the chip copper layer 131, the gate control terminal 6 is disposed on the gate control terminal copper layer 133, and the sampling terminal 7 is disposed on the sampling terminal copper layer 134. The position in the welding process can be guaranteed not to move, and the first power chip 4, the second power chip 5, the gate control terminal 6 and the sampling terminal 7 are all in the corresponding copper layers during welding, so that the accuracy and the reliability during welding are further guaranteed.

The first power chip 4 is an IGBT chip, and the second power chip 5 is an FRD chip. Each chip module is preferably provided with one IGBT chip and one FRD chip.

In each chip module, the gate control terminal copper layer 133 is connected with the gate 41 of the first power chip 4 through the bonding wire 8, and the sampling terminal copper layer 134 is connected with the position, except the gate 41, on the first power chip 4 through the bonding wire 8; in the adjacent two chip modules, the adjacent two first power chips 4 are connected in series, and the adjacent two second power chips 5 are connected in series.

From the positive electrode terminal 2, two adjacent first power chips 4 are connected in series, two adjacent second power chips 5 are connected in series, and the connection ends to the negative electrode terminal 3, so that a series structure is formed, voltage can be divided, and parasitic inductance can be reduced. Specifically, the bonding wire 8 is made of aluminum wire and copper wire, and aluminum wire is preferable in the present utility model.

As an alternative embodiment, in the chip module copper layer corresponding to each chip module, the first power chip 4 and the second power chip 5 are welded with the chip copper layer 131 in a vacuum reflow soldering manner by using solder, and the gate control terminal 6 and the sampling terminal 7 are respectively connected with the gate control terminal copper layer 133 and the sampling terminal copper layer 134 in a solder bonding manner or a vacuum reflow soldering manner; the positive terminal 2 and the negative terminal 3 are connected to the first chip module copper layer and the negative terminal copper layer 132, respectively, by means of solder bonding or vacuum reflow soldering.

Specifically, the positive electrode terminal 2, the negative electrode terminal 3, the first power chip 4, the second power chip 5, the gate control terminal 6 and the sampling terminal 7 are all made of weldable metal materials such as copper, aluminum, copper alloy, aluminum alloy, electro-gold plating, nickel, tin, silver and the like.

When the positive electrode terminal 2, the negative electrode terminal 3, the first power chip 4, the second power chip 5, the gate electrode control terminal 6 and the sampling terminal 7 are arranged on the corresponding copper layers, certain temperature can be generated, and certain deformation can be generated on the DBC plate structure 1, the positive electrode terminal 2, the negative electrode terminal 3, the first power chip 4, the second power chip 5, the gate electrode control terminal 6 and the sampling terminal 7, but a plurality of copper layer areas 111 are etched on the first copper-clad layer 11 of the DBC plate structure 1, so that the internal stress during welding can be reduced to a certain extent, the deformation is reduced, and the yield is improved.

As an alternative embodiment, the gate control terminal copper layer 133 and the sampling terminal copper layer 134 on each chip module copper layer are located at the sides of the second copper-clad layer 13; the gate control terminal 6, the sampling terminal 7, the positive electrode terminal 2 and the negative electrode terminal 3 are S-shaped or Z-shaped.

The copper layers of the chip modules are arranged in two rows on the second copper-clad layer 13, each row is provided with five copper layers of the chip modules for placing five chip modules, and according to the connection mode between the positive terminal 2, the negative terminal 3 and the plurality of chip modules described above, the positive terminal 2, the negative terminal 3 and the plurality of chip modules after being connected in series form a complete circuit. When the switch module is conducted, the upper and lower rows of inductors can cancel each other, so that stray inductance of the switch module can be reduced, and reliability of the switch module is improved.

As an alternative embodiment, the switch module further includes an encapsulation body that encapsulates the second copper-clad layer 13, the positive electrode terminal 2, the negative electrode terminal 3, the plurality of chip modules, the plurality of chip module copper layers, and the negative electrode terminal copper layer 132. Because the gate control terminal 6, the sampling terminal 7, the positive electrode terminal 2 and the negative electrode terminal 3 are S-shaped or Z-shaped, after the encapsulation is completed, a part of the gate control terminal 6, the sampling terminal 7, the positive electrode terminal 2 and the negative electrode terminal 3 are exposed outside, so that connection with the outside is facilitated.

The packaging adhesive can wrap the positive electrode terminal 2, the negative electrode terminal 3, the plurality of chip modules, the plurality of chip module copper layers, the negative electrode terminal copper layer 132 and the bonding wire 8 connected with the plurality of chip modules, and package the same, so that the switch module is kept stable in the use process. The encapsulation range of the encapsulation colloid is the range of the whole DBC plate structure 1, and the preferable height of the encapsulation colloid is 3-5 cm. After the packaging colloid is used for packaging, the whole switch module can be packaged by adopting a plastic shell, and the annular shell can be used for packaging when the whole switch module is packaged again. However, since the module can be kept stable after being packaged by the packaging colloid, the module can be packaged without using a plastic shell, and the packaging can be specific according to actual use conditions.

The foregoing is only illustrative of the preferred embodiments of the utility model, and it will be appreciated by those skilled in the art that various changes in the features and embodiments may be made and equivalents may be substituted without departing from the spirit and scope of the utility model. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the utility model without departing from the essential scope thereof. Therefore, it is intended that the utility model not be limited to the particular embodiment disclosed, but that the utility model will include all embodiments falling within the scope of the appended claims.

Claims (10)

1. A DBC board structure characterized by comprising a first copper-clad layer (11), a ceramic layer (12) and a second copper-clad layer (13), the ceramic layer (12) being arranged between the first copper-clad layer (11) and the second copper-clad layer (13);

A plurality of copper layer areas (111) are etched on the first copper-clad layer (11), and a plurality of stress relief holes (112) are formed in the edge of each copper layer area (111).

2. A DBC plate structure according to claim 1, wherein the plurality of copper layer areas (111) are evenly distributed over the first copper-clad layer (11).

3. A DBC plate structure according to claim 1, wherein in each copper layer region (111) the plurality of stress relief holes (112) are evenly distributed over the edges of the copper layer region (111).

4. A DBC plate structure according to claim 3, characterized in that the number of copper layer areas (111) on the first copper clad layer (11) is two, three, four or nine.

5. A high power switch module characterized by comprising a DBC board structure (1) according to any of the claims 1-4, and a positive terminal (2), a negative terminal (3) and a plurality of chip modules arranged on the DBC board structure (1); the chip modules are connected in series end to end, the positive terminal (2) is connected with the first chip module of the plurality of chip modules, and the negative terminal (3) is connected with the last chip module of the plurality of chip modules.

6. The high-power switch module according to claim 5, wherein a negative terminal copper layer (132) and a plurality of chip module copper layers are etched on the second copper-clad layer (13), the negative terminal (3) is disposed on the negative terminal copper layer (132), each of the plurality of chip modules is disposed on one chip module copper layer, and the positive terminal (2) is disposed on the chip module copper layer corresponding to the first chip module.

7. A high power switch module according to claim 5, characterized in that each of the chip modules comprises a first power chip (4), a second power chip (5), a gate control terminal (6) and a sampling terminal (7);

each chip module copper layer comprises a chip copper layer (131), a gate control terminal copper layer (133) and a sampling terminal copper layer (134);

In the chip module copper layer corresponding to each chip module, the first power chip (4) and the second power chip (5) are both arranged on the chip copper layer (131), the gate control terminal (6) is arranged on the gate control terminal copper layer (133), and the sampling terminal (7) is arranged on the sampling terminal copper layer (134);

In each chip module, the gate control terminal copper layer (133) is connected with a gate electrode (41) of the first power chip (4) through a bonding wire (8), and the sampling terminal copper layer (134) is connected with a position, except the gate electrode (41), on the first power chip (4) through the bonding wire (8);

In the adjacent two chip modules, the adjacent two first power chips (4) are connected in series, and the adjacent two second power chips (5) are connected in series.

8. A high-power switch module according to claim 7, wherein in the chip module copper layer corresponding to each chip module, the first power chip (4) and the second power chip (5) are soldered to the chip copper layer (131) by means of vacuum reflow soldering, and the gate control terminal (6) and the sampling terminal (7) are connected to the gate control terminal copper layer (133) and the sampling terminal copper layer (134) respectively by means of solder bonding or vacuum reflow soldering;

The positive electrode terminal (2) and the negative electrode terminal (3) are respectively connected with the first chip module copper layer and the negative electrode terminal copper layer (132) through a solder bonding or vacuum reflow soldering mode.

9. A high power switch module according to claim 7, wherein a gate control terminal copper layer (133) and a sampling terminal copper layer (134) on each of said chip module copper layers are located on the sides of said second copper-clad layer (13);

The gate control terminal (6), the sampling terminal (7), the positive electrode terminal (2) and the negative electrode terminal (3) are S-shaped or Z-shaped.

10. The high-power switch module of claim 5, further comprising an encapsulant surrounding the second copper-clad layer (13), positive terminal (2), negative terminal (3), plurality of chip modules, plurality of chip module copper layers, and negative terminal copper layer (132).