CN220894424U - Unbalanced high-frequency line impedance stabilization network - Google Patents

Unbalanced high-frequency line impedance stabilization network Download PDF

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Publication number
CN220894424U
CN220894424U CN202322329057.3U CN202322329057U CN220894424U CN 220894424 U CN220894424 U CN 220894424U CN 202322329057 U CN202322329057 U CN 202322329057U CN 220894424 U CN220894424 U CN 220894424U
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China
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access port
terminal
tested cable
inductor
power supply
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CN202322329057.3U
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胡小军
杨铭
孙正
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Suzhou 3ctest Electronic Technology Co ltd
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Suzhou 3ctest Electronic Technology Co ltd
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Abstract

The utility model provides an unbalanced high-frequency line impedance stabilizing network, which comprises a tested cable access port, a power supply access port and a PCB (printed circuit board) connected between the tested cable access port and the power supply access port; an inductor L1 and an inductor L4 are connected in series between the live wire terminal of the tested cable access port and the live wire terminal of the power supply access port, and an inductor L2 and an inductor L4 are connected in series between the zero line terminal of the tested cable access port and the zero line terminal of the power supply access port; a capacitor C1 and a resistor R1 which are connected in series are connected between the live wire terminal and the zero wire terminal of the tested cable access port; a capacitor C2 and a resistor R2 which are connected in series are connected between the zero line terminal and the grounding terminal of the tested cable access port. The unbalanced high-frequency line impedance stabilizing network provided by the utility model provides controlled terminal impedance for the tested cable, and improves the reproducibility and repeatability of the radiation disturbance measurement result.

Description

Unbalanced high-frequency line impedance stabilization network
Technical Field
The utility model relates to the technical field of electromagnetic compatibility radiation disturbance measurement, in particular to an unbalanced high-frequency line impedance stabilizing network.
Background
The national standard GB/T6113.104 radiation disturbance measurement method is used for detecting the radiation disturbance of the electronic product. In radiation disturbance measurement, a Common Mode Absorption Device (CMAD) is used on the connecting cable leaving the test space. Because of the differences in common mode impedance and symmetry of cables exiting the test sites (e.g., turret center) at different test sites, it is desirable in radiation disturbance measurements to reduce variations in measurement results between the different test sites by using CMAD. CMAD adopts a pincer-shaped design, and a row of magnetic core materials are arranged in the interior; the cable of the tested product passes through the magnetic core. The common mode impedance of CMAD is different due to the different thickness of the cable and the different signal frequencies. And finally, the measurement results of different test sites are greatly different.
Disclosure of utility model
It is an object of the present utility model to provide an unbalanced high frequency line impedance stabilizing network that solves one or more of the above-mentioned problems of the prior art.
According to one aspect of the utility model, there is provided an unbalanced high frequency line impedance stabilizing network comprising a cable access port under test, a power supply access port, and a PCB board connected between the cable access port under test and the power supply access port;
The tested cable access port comprises a live wire terminal, a zero wire terminal and a grounding terminal, and the power supply access port also comprises a live wire terminal, a zero wire terminal and a grounding terminal;
An inductor L1 and an inductor L4 are connected in series between the live wire terminal of the tested cable access port and the live wire terminal of the power supply access port, and an inductor L2 and an inductor L4 are connected in series between the zero line terminal of the tested cable access port and the zero line terminal of the power supply access port;
a capacitor C1 and a resistor R1 which are connected in series are connected between the live wire terminal of the tested cable access port and the zero wire terminal of the tested cable access port;
A capacitor C2 and a resistor R2 which are connected in series are connected between the zero line terminal of the tested cable access port and the grounding terminal of the tested cable access port;
The grounding terminal of the tested cable access port is grounded through an inductor L3 and a resistor R3 which are connected in parallel;
The resistor R1, the resistor R2, the resistor R3, the capacitor C1, the capacitor C2, the inductor L1, the inductor L2, the inductor L3 and the inductor L4 are all arranged on the PCB.
In some embodiments, the PCB board is disposed inside the metal housing.
In some embodiments, three banana plugs are respectively arranged on the front panel and the rear panel of the metal shell, and the PCB board is connected with the metal conductors of the banana plugs in the metal shell as a tested cable access port and a tested power supply access port.
In some embodiments, the inductance L1, the inductance L2, the inductance L3, and the inductance L4 are all nickel zinc core inductances.
In some embodiments, the live terminal of the power access port is connected to ground through capacitor C3.
In some embodiments, a capacitor C4 is connected between the live terminal of the power access port and the neutral terminal of the power access port.
In some embodiments, a capacitor C5 is connected between the neutral terminal of the power access port and the ground terminal of the power access port.
According to the unbalanced high-frequency line impedance stabilizing network provided by the utility model, the circuit impedance is arranged at the access port of the tested cable, so that the differential mode impedance of the tested cable can be maintained within a certain range within the frequency range of 30MHz-300MHz, the controlled terminal impedance is provided for the tested cable, and the reproducibility and repeatability of the radiation disturbance measurement result are improved.
In addition, in the technical scheme of the utility model, the technical scheme can be realized by adopting conventional means in the field without specific description.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a circuit diagram of an unbalanced high frequency line impedance stabilizing network according to an embodiment of the present utility model.
Fig. 2 is a schematic structural diagram of an unbalanced high frequency line impedance stabilizing network according to an embodiment of the present utility model.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Examples:
In this embodiment, referring to fig. 1-2 of the specification, an unbalanced high-frequency line impedance stabilizing network is provided, which includes a tested cable access port, a power supply access port, and a PCB board connected between the tested cable access port and the power supply access port; the tested cable access port comprises a live wire terminal L, a neutral wire terminal N and a ground terminal PE, and the power supply access port also comprises a live wire terminal L ', a neutral wire terminal N ' and a ground terminal PE '; an inductor L1 and an inductor L4 are connected in series between a live wire terminal L of the tested cable access port and a live wire terminal L 'of the power supply access port, and an inductor L2 and an inductor L4 are connected in series between a zero line terminal N of the tested cable access port and a zero line terminal N' of the power supply access port; a capacitor C1 and a resistor R1 which are connected in series are connected between the live wire terminal L of the tested cable access port and the neutral wire terminal N of the tested cable access port; a capacitor C2 and a resistor R2 which are connected in series are connected between the zero line terminal N of the tested cable access port and the grounding terminal PE of the tested cable access port; the grounding terminal PE of the tested cable access port is grounded through an inductor L3 and a resistor R3 which are connected in parallel; the resistor R1, the resistor R2, the resistor R3, the capacitor C1, the capacitor C2, the inductor L1, the inductor L2, the inductor L3 and the inductor L4 are all arranged on the PCB.
Specifically, the resistor R1 is 100deg.OMEGA, the resistor R2 is 60deg.OMEGA, and the resistor R3 is 90Ω; the capacitor C1 is 1nF, and the capacitor C2 is 1nF; inductance L1 or inductance L2 series connection inductance L4 is far more than 160Ω in 30MHz-300MHz frequency range, inductance L3 is far more than 90Ω in 30MHz-300MHz frequency range, from this, the differential mode impedance of the measured cable can keep in certain range, taking above-mentioned parameter as an example, the differential mode impedance of the measured cable is: L-PE,160Ω+ -20%; N-PE,60 Ω+ -20%; PE-RGP,90Ω+ -20%.
Referring to fig. 2 of the drawings, there is shown a schematic structure of an unbalanced high frequency line impedance stabilizing network, and a PCB board (not shown) is disposed inside a metal case 1. Thus, the metal housing 1 can shield external electromagnetic waves from coupling to the internal circuit, improving measurement accuracy.
In an alternative embodiment, three banana plugs 2 are respectively arranged on the front panel and the rear panel (not shown in the figure) of the metal shell, and the PCB board is connected with metal conductors of the banana plugs 2, which are positioned inside the metal shell, as a tested cable access port and a power supply access port. From this, the cable access port that is surveyed is used for inserting the cable that is surveyed, and the power access port is used for inserting the power, and the PCB board is directly fixed on the metal conductor of banana plug, avoids PCB board and front and back panel's connecting terminal lead wire to arouse uncontrollable high frequency inductance, improves test accuracy and accuracy.
In an alternative embodiment, the components on the PCB board are chip mounted devices. Therefore, the inductance of the component pin at high frequency is reduced, the influence of the component pin on the inductance at high frequency is reduced, and the test accuracy is improved.
Specifically, the inductance L1, the inductance L2 and the inductance L4 may all be nickel-zinc magnetic core inductances.
In an alternative embodiment, the live terminal L' of the power access port is connected to ground through capacitor C3. A capacitor C4 is connected between the live wire terminal L 'of the power supply access port and the neutral wire terminal N' of the power supply access port. A capacitor C5 is connected between the neutral terminal N 'of the power access port and the ground terminal PE' of the power access port.
Specifically, the size of the capacitor C3 may be 1nF, the size of the capacitor C5 may be 1nF, and the size of the capacitor C4 may be 10nF.
According to the unbalanced high-frequency line impedance stabilization network provided by the utility model, the circuit impedance is arranged at the access port of the tested cable, so that the real impedance of a power grid circuit can be simulated in the frequency range of 30MHz-300MHz, the differential mode impedance of the tested cable can be maintained in a certain range, the controlled terminal impedance is provided for the tested cable, and the reproducibility and the repeatability of the radiation disturbance measurement result are improved; controlling matching frequency impedance through PCB wiring design; the tested cable access terminal can have higher working voltage.
The foregoing is merely an alternative embodiment of the utility model, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the principles of the utility model, and such modifications and variations should also be considered as being within the scope of the utility model.

Claims (7)

1. An unbalanced high frequency line impedance stabilizing network, characterized in that,
The PCB comprises a tested cable access port, a power supply access port and a PCB connected between the tested cable access port and the power supply access port;
the tested cable access port comprises a live wire terminal, a zero wire terminal and a grounding terminal, and the power supply access port also comprises a live wire terminal, a zero wire terminal and a grounding terminal;
An inductor L1 and an inductor L4 are connected in series between the live wire terminal of the tested cable access port and the live wire terminal of the power supply access port, and an inductor L2 and an inductor L4 are connected in series between the zero line terminal of the tested cable access port and the zero line terminal of the power supply access port;
a capacitor C1 and a resistor R1 which are connected in series are connected between the live wire terminal of the tested cable access port and the zero wire terminal of the tested cable access port;
A capacitor C2 and a resistor R2 which are connected in series are connected between the zero line terminal of the tested cable access port and the grounding terminal of the tested cable access port;
The grounding terminal of the tested cable access port is grounded through an inductor L3 and a resistor R3 which are connected in parallel;
The resistor R1, the resistor R2, the resistor R3, the capacitor C1, the capacitor C2, the inductor L1, the inductor L2 and the inductor L4 are all arranged on the PCB.
2. The unbalanced high frequency line impedance stabilizing network of claim 1, wherein said PCB board is disposed inside a metal housing.
3. The unbalanced high frequency line impedance stabilizing network according to claim 2, wherein three banana plugs are respectively arranged on the front panel and the rear panel of the metal shell, and serve as a tested cable access port and a power supply access port, and the PCB board is connected with a metal conductor of the banana plugs inside the metal shell.
4. The unbalanced high frequency line impedance stabilizing network of claim 1, wherein said inductance L1, inductance L2, inductance L3 and inductance L4 are all nickel zinc core inductances.
5. The unbalanced high frequency line impedance stabilizing network of claim 1, wherein the live terminal of said power access port is connected to ground through capacitor C3.
6. The unbalanced high frequency line impedance stabilizing network of claim 1, wherein a capacitor C4 is connected between the live terminal of said power access port and the neutral terminal of said power access port.
7. The unbalanced high frequency line impedance stabilizing network of claim 1, wherein a capacitance C5 is connected between a neutral terminal of said power access port and a ground terminal of said power access port.
CN202322329057.3U 2023-08-29 2023-08-29 Unbalanced high-frequency line impedance stabilization network Active CN220894424U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322329057.3U CN220894424U (en) 2023-08-29 2023-08-29 Unbalanced high-frequency line impedance stabilization network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322329057.3U CN220894424U (en) 2023-08-29 2023-08-29 Unbalanced high-frequency line impedance stabilization network

Publications (1)

Publication Number Publication Date
CN220894424U true CN220894424U (en) 2024-05-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202322329057.3U Active CN220894424U (en) 2023-08-29 2023-08-29 Unbalanced high-frequency line impedance stabilization network

Country Status (1)

Country Link
CN (1) CN220894424U (en)

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