CN220586273U - Agile frequency component system for scattering communication - Google Patents

Abstract

The utility model discloses a frequency agile component system for scattering communication, and belongs to the technical field of scattering communication. The receiving and transmitting channels all adopt a secondary frequency conversion mode, the intermediate frequency circuit utilizes DDS to complete signal hopping, and the radio frequency circuit uses fixed local oscillator mixing to generate corresponding radio frequency signals. The utility model combines the prior device resources and the prior art level, meets the requirement of smaller and smaller scattering communication frequency hopping interval by utilizing the characteristics of high speed and high resolution of the DDS, and solves the defect of low output frequency of the DDS by mixing the high-frequency fixed local oscillation module. Compared with the traditional frequency agile component architecture for scattering communication, the frequency agile component architecture reduces the complexity and cost of the component, improves the reliability of the frequency agile component, and is suitable for various scene applications.

Description

Agile frequency component system for scattering communication

Technical Field

The utility model relates to the technical field of scattering communication, in particular to a frequency agile component system for scattering communication, which can be applied to design references of frequency agile components in scattering communication and has the advantages of low cost, high reliability and the like.

Background

With the development of the scattering communication technology, the scattering communication equipment is developed to various types, light weight, low cost, free networking and the like, and the design of each module in the scattering communication is more and more required. Today, where electronic warfare is more and more intense, communication devices are required to have anti-interference and anti-interception capabilities, so frequency agile components generally employ a frequency hopping system to improve their anti-noise and anti-tracking capabilities. With the years of development of communication systems, the requirements for frequency hopping rate and data transmission rate are also increasing.

The frequency synthesizer is one of key core components of the agile frequency component, has direct influence on the frequency switching rate, and further influences the communication quality, stability and reliability of the whole scattering communication system.

In the field of scattering communication technology, in order to implement microsecond (us) frequency hopping rate, a ping-pong loop phase-locked loop (PLL), direct digital frequency synthesis (DDS) and hybrid frequency synthesis (pll+dds) are commonly used in the existing agile components.

Fig. 1 shows a agile transmitting chain using ping-pong phase-locked loop technology, in which an intermediate frequency signal is input and mixed with a fixed local oscillator once to generate a high intermediate frequency signal, and then mixed with one of the ping-pong phase-locked loops to generate a required radio frequency signal, and the signal is output after filtering and amplifying. The ping-pong phase-locked loop (PLL) 1 is locked when the frequency point 1 is reached, the corresponding switch is opened, and when the frequency needs to be changed, the phase-locked loop (PLL) 2 is already locked at the corresponding frequency point, and only the corresponding ping-pong switch is required to be opened. Because the switching time of the ping-pong switch is only nanosecond (ns), the frequency hopping rate can meet the requirement, but the scalability is poor, the reduction of frequency stepping or the improvement of the frequency hopping rate cannot be met, and higher integer boundary strays exist.

The advantages of providing local oscillation frequency for the agile frequency component by adopting a direct digital frequency synthesis (DDS) technology are obvious: the frequency resolution is high, the frequency conversion time is fast, the stability is good, and the phase noise is low, but the main disadvantage is that the output frequency point is low, if the frequency conversion or frequency multiplication circuit is adopted to work at a higher local oscillation frequency point, the design complexity is increased, more stray deteriorated channels are introduced, and the user requirements are difficult to meet.

In order to solve the above problem, a link structure as shown in fig. 2 is gradually evolved, and fractional frequency division is completed by using DDS, so that frequency resolution can be improved under the condition of reducing integer boundary spurious, and quick locking of a loop is realized on the basis of reducing frequency stepping. In order to avoid frequency traction caused by load change when switching frequency points, a buffer or a matching network is added before a ping-pong switch, so that the complexity of a frequency synthesizer circuit is further increased, and particularly when the frequency synthesizer circuit is applied to light weight networking, the cost is certainly increased, and the reliability is reduced.

Disclosure of Invention

In view of the foregoing deficiencies in the prior art, a need exists for a frequency agile assembly with high frequency resolution, small frequency steps, low spurious emissions, and fast locking. The utility model mainly provides a frequency agile component system for scattering communication, which solves the problems, has the advantages of simple design, low complexity, controllable cost, high reliability and the like, and is suitable for various scene applications.

The utility model aims at realizing the following technical scheme:

a frequency agile component system for scatter communication includes a radio frequency channel, a processing and control unit, and a reference input;

in a transmitting channel, a first filter, a first mixer, a second filter, a first amplifier and a first radio frequency switch are sequentially connected, an intermediate frequency signal given by a baseband enters the first mixer after being filtered by the first filter, a high intermediate frequency signal is obtained after the intermediate frequency signal is mixed with a low local oscillator signal, and the high intermediate frequency signal is sequentially filtered and amplified by the second filter and the first amplifier and is output to the first radio frequency switch; the first fixed local oscillator is connected to the input end of the DDSI, the output end of the DDSI is connected with the first mixer, and the first fixed local oscillator provides a reference signal for the DDSI, so that the DDS generates a high-resolution low local oscillator signal and outputs the high-resolution low local oscillator signal to the first mixer;

the high intermediate frequency signal is selected by a first radio frequency switch, and mixed with a high local oscillator signal generated by a second fixed local oscillator in a second mixer or mixed with a high local oscillator signal generated by a third fixed local oscillator in a third mixer; the second mixer, the third filter and the second amplifier are sequentially connected, and the third mixer, the fourth filter and the third amplifier are sequentially connected; the second fixed local oscillator is connected with the second mixer, the high local oscillator signal generated by the second fixed local oscillator is mixed in the second mixer, the third fixed local oscillator is connected with the third mixer, and the high local oscillator signal generated by the third fixed local oscillator is mixed in the third mixer; the two amplified signals are respectively output to two moving ends of a third radio frequency switch through two moving ends of a second radio frequency switch, wherein the fixed end of the second radio frequency switch is connected with the fixed end of the third radio frequency switch; the two moving ends of the third radio frequency switch are respectively connected with the two moving ends of the fourth radio frequency switch through a fifth filter and a sixth filter which correspond to each other, and the stationary end of the fourth radio frequency switch is used for radio frequency output;

in the receiving channel, the antenna receives radio frequency, the radio frequency enters a fifth radio frequency switch after being processed by a low noise amplifier, and two movable ends of the fifth radio frequency switch are respectively connected with a seventh filter and an eighth filter; the other ends of the seventh filter and the eighth filter are respectively connected with two moving ends of a sixth radio frequency switch, and the fixed end of the sixth radio frequency switch is connected with the fixed end of the seventh radio frequency switch; two movable ends of the seventh radio frequency switch are respectively connected with a ninth filter and a tenth filter; the ninth filter, the fourth amplifier and the fourth mixer are sequentially connected, and the tenth filter, the fifth amplifier and the fifth mixer are sequentially connected; the fourth fixed local oscillator is connected with a fourth mixer, and the fifth fixed local oscillator is connected with a fifth mixer; the fourth mixer and the fifth mixer are respectively connected with two movable ends of the eighth radio frequency switch; the fixed end of the eighth radio frequency switch, the eleventh filter, the sixth mixer, the second filter and the sixth amplifier are sequentially connected, and the sixth amplifier outputs an intermediate frequency signal to the baseband; the low local oscillation frequency of DDSII output of the sixth fixed local oscillation providing the reference frequency is mixed in a sixth mixer;

each radio frequency switch and DDS are connected with the processing and control unit, and the reference input is a radio frequency circuit and an intermediate frequency circuit for improving a stable reference clock signal.

Compared with the background technology, the utility model has the following advantages:

the intermediate frequency circuit adopts the DDS to provide low local oscillation frequency, uses the low-cost fixed local oscillation to provide reference frequency for the DDS, can provide radio frequency link characteristics of low spurious, small step and fast frequency hopping, improves the frequency accuracy, and meets the requirement of 0.5MHz through test frequency step;

the radio frequency circuit divides the whole signal bandwidth into two sub-frequency bands, adopts a fixed local oscillation module with lower cost to provide high local oscillation frequency, and after each branch is subjected to frequency conversion to a proper frequency band, the frequency is selected to be input or output through a radio frequency switch, so that the reliability of the system is improved to a certain extent, and the other sub-frequency band can be selected for point-frequency communication when a single sub-frequency band fails;

the frequency agility component adopts a superheterodyne mode, utilizes the mode of the DDS and the fixed local oscillator to complete frequency conversion twice, avoids the problems generated when the PLL and the DDS are independently used, reduces the complexity and the cost requirement of a frequency synthesizer used by the PLL in combination with the DDS, simultaneously avoids the problem of frequency switching load traction in the use of a ping-pong loop type frequency source, utilizes a low-cost and reliable fixed local oscillator module to complete frequency conversion, and improves the integration level of the frequency agility component.

Drawings

FIG. 1 is a schematic diagram of a frequency agile transmit chain circuit employing ping-pong phase locked loop technology;

fig. 2 is a schematic diagram of a frequency agile transmit chain circuit employing DDS technology and ping-pong phase locked loop technology;

FIG. 3 is a schematic circuit diagram of a frequency agile component architecture of the present utility model;

fig. 4 is a block diagram of a hardware implementation of the frequency agile component architecture of the present utility model.

Detailed Description

A frequency agile component architecture for scatter communication, as shown in figure 3, comprises a radio frequency channel, a frequency synthesizer, a processing and control unit, a power supply, a reference input and the like. The radio frequency channel is mainly divided into a transmitting channel and a receiving channel, for the transmitting channel, a radio frequency signal enters from an intermediate frequency input port and is mixed with the DDS once to generate a high intermediate frequency signal, the high intermediate frequency signal is mixed with a fixed local oscillator after being filtered and amplified to generate a radio frequency signal, and the radio frequency signal is output from a radio frequency output end after being filtered and amplified; for the receiving channel, the signal enters from the radio frequency input port, is subjected to filtering and amplification, is subjected to primary mixing with a fixed local oscillator to obtain a high intermediate frequency signal, is subjected to secondary mixing with the DDS after being filtered, and is output by the intermediate frequency output end to generate a required intermediate frequency signal. The frequency synthesizer adopts DDS to provide low local oscillation frequency at intermediate frequency, adopts fixed local oscillation to provide high frequency local oscillation frequency at radio frequency, and adopts multichannel power division to provide reference frequency for each fixed local oscillation at reference input. The processing and control unit adopts a RAM chip to carry out logic control, is connected with the control lines of the DDS and the radio frequency switch, and provides monitoring signals. The power supply divides the multiple paths of different voltage linear voltage regulators to supply power to the frequency synthesizer, the radio frequency switch, the amplifier, the RAM and the like.

The intermediate frequency circuit comprises a first filter, a first mixer, a second filter, a first amplifier, a first radio frequency switch, a first fixed local oscillator and a DDSI (digital signal processor); the radio frequency circuit comprises a second mixer, a third filter, a fourth filter, a second fixed local oscillator, a third fixed local oscillator, a second amplifier, a third amplifier, a second radio frequency switch, a third radio frequency switch, a fifth filter, a sixth filter and a fourth radio frequency switch. The intermediate frequency signal given by the baseband is filtered by a first filter and then enters a first mixer, a first fixed local oscillator provides a reference signal for DDSI, so that a low local oscillator signal with high resolution generated by DDS is output to the first mixer, the intermediate frequency signal and the low local oscillator signal are mixed to obtain a high intermediate frequency signal, the high intermediate frequency signal is filtered and amplified by a second filter and a first amplifier in sequence, and the high intermediate frequency signal is output to a first radio frequency switch; the second fixed local oscillator and the third fixed local oscillator convert the radio frequency band into two sub-bands, the high intermediate frequency signal is selected by the first radio frequency switch, the high intermediate frequency signal can be mixed with the high local oscillator signal generated by the second fixed local oscillator in the second mixer, or mixed with the high local oscillator signal generated by the third fixed local oscillator in the third mixer, the generated sub-band radio frequency signal is filtered by the third filter, the fourth filter, the second amplifier and the third amplifier, amplified and then enters the second radio frequency switch and the third radio frequency switch, filtered by the fifth filter and the sixth filter of different sub-bands, and then output to the power amplifier by the fourth radio frequency switch.

In the receiving channel, the radio frequency circuit comprises a fifth radio frequency switch, a seventh filter, an eighth filter, a sixth radio frequency switch, a seventh radio frequency switch, a ninth filter, a tenth filter, a fourth amplifier, a fifth amplifier, a fourth mixer, a fifth mixer, a fourth fixed local oscillator and a fifth fixed local oscillator; the intermediate frequency circuit comprises an eighth radio frequency switch, an eleventh filter, a sixth mixer, a twelfth filter, a sixth amplifier, a sixth fixed local oscillator and a DDSII. The method comprises the steps that a radio frequency received by an antenna end is processed by a low-noise amplifier, a signal enters two sub-bands through a fifth radio frequency switch, is filtered through a seventh filter and an eighth filter respectively, enters different sub-band channels through a sixth radio frequency switch and a seventh radio frequency switch, is filtered and amplified through a ninth filter and a fourth amplifier or a tenth filter and a fifth amplifier, is output to a fourth mixer and a fifth mixer, is mixed with high local oscillation frequency provided by a fourth fixed local oscillation or a fifth fixed local oscillation, generates a high intermediate frequency signal, and is output to the eighth radio frequency switch, and therefore enters an intermediate frequency circuit; the high intermediate frequency signal is filtered by an eleventh filter, mixed with a low local oscillation frequency of DDSII output of a sixth fixed local oscillation to provide a reference frequency in a sixth mixer, and the generated intermediate frequency signal is filtered and amplified by a twelfth filter and a sixth amplifier to output the intermediate frequency signal to a baseband.

The intermediate frequency circuit frequency synthesizer adopts a fixed local oscillator to provide lower frequency reference for the DDS to output low local oscillator frequency, the radio frequency circuit frequency synthesizer adopts a fixed local oscillator module to provide higher local oscillator frequency, the fixed local oscillators are all in modularized design, the independent frequency point is obtained, the phase noise and the spurious performance are excellent, the cost is low, and the control logic is simple and clear.

The present embodiment will be further described below,

referring to fig. 3, the present utility model includes an intermediate frequency circuit, a radio frequency circuit, a reference input, a processing and control unit, and a power supply.

The utility model completes the mutual conversion of the radio frequency signal and the intermediate frequency signal in the receiving and transmitting channel through twice frequency conversion, selects the high intermediate frequency far larger than the working bandwidth, and the intermediate frequency is similar to the signal bandwidth, thereby being beneficial to extracting the useful channel and inhibiting the adjacent channel interference while improving the image frequency inhibition degree. The bandwidth of the radio frequency signal is divided into two sub-frequency bands, the isolation of a receiving and transmitting channel is improved, and the spurious suppression of the received signal under the lowest communication rate is ensured.

The main function of the radio frequency circuit is to up-convert the high intermediate frequency signal output by the intermediate frequency circuit to the radio frequency band, and complete the movement from the high intermediate frequency signal to the radio frequency band; and carrying out frequency spectrum separation on the radio frequency signals, down-converting the radio frequency signals into high intermediate frequency signals, and sending the high intermediate frequency signals into an intermediate frequency circuit to finish the movement of the signals from the radio frequency band to the high intermediate frequency. The intermediate frequency circuit has the main function of mixing an intermediate frequency signal input by a baseband to a high intermediate frequency and completing the frequency shifting from the intermediate frequency to the high intermediate frequency; down-converting the high intermediate frequency signal to intermediate frequency, and sending the intermediate frequency signal to a baseband to finish the frequency spectrum shifting of the high intermediate frequency signal to the intermediate frequency signal.

In the utility model, as shown in fig. 4, the monitoring management of the receiving and transmitting channels is realized by configuring the frequency word of the DDS and the closing direction of the switch in the radio frequency channel through the RAM chip. Reference input f _REF The stable reference clock signal is improved for the radio frequency circuit and the intermediate frequency circuit.

In the present utility model, as shown in FIG. 4, the local oscillation frequency of the intermediate frequency circuit is provided by DDS, and the output frequency of the DDS is not more than 0.4f at maximum due to the limit of the Neugus law _i (f _i (i=1, 2) is the reference frequency provided by the fixed local oscillator for the DDS). The local oscillator module with fixed frequency is used for providing the reference frequency for the DDS, the cost is low, a control circuit is not needed, and the reference frequency can be output after power is applied. The frequency hopping function is realized by the DDS, and the frequency stabilization time of less than 2 mu s can be realized by configuring the frequency word FTW, the phase word POW, the amplitude word ASF, the corresponding SPI time sequence and other configuration words, so that the small stepping frequency hopping of 0.5MHz frequency stepping can be realized.

In the utility model, the local oscillation frequency of the radio frequency circuit is provided by the fixed local oscillation, and the fixed frequency can be output without RAM control and power-up. As shown in fig. 4, fixed local oscillation frequency points corresponding to different radio frequency sub-bands in the receiving and transmitting channels are different and are f respectively ₃ And f ₄ Four fixed local oscillators corresponding to two frequency points are output by the radio frequency circuit of the corresponding receiving channel, and the fixed local oscillators output f when receiving the channel ₃ At the time, the transmission channel outputs f ₄ When the receiving channel fixes the local oscillator output f ₄ At the time, the transmission channel outputs f ₃ 。

The power supply circuit has the function of providing stable, linear and reliable power supply for the whole intermediate frequency circuit, the radio frequency circuit, the local oscillation circuit and the processing control circuit. It is to linearly stabilize the power supply introduced from the interface circuit and filter out different voltages.

The working principle of the utility model is as follows:

the frequency agility component adopting the framework of the utility model adopts a frequency division duplex working mode. The RAM chip switches the transmitting channel and the receiving channel to different sub-frequency bands by controlling a plurality of radio frequency switches according to frequency information issued by the upper monitoring, and simultaneously, the RAM chip writes a frequency control word, a phase control word, an amplitude control word and a corresponding SPI control word into a corresponding DDSI and a corresponding DDSII to generate corresponding frequency hopping frequency, and radio frequency input signals and intermediate frequency input signals generate corresponding intermediate frequency signals and radio frequency signal output after multistage amplification and filtering, wherein the specific circuit structure is as follows:

in a transmitting channel, the intermediate frequency circuit comprises a first filter, a first mixer, a second filter, a first amplifier, a first radio frequency switch, a first fixed local oscillator and a DDSI; the radio frequency circuit comprises a second mixer, a third filter, a fourth filter, a second fixed local oscillator, a third fixed local oscillator, a second amplifier, a third amplifier, a second radio frequency switch, a third radio frequency switch, a fifth filter, a sixth filter and a fourth radio frequency switch. The intermediate frequency signal given by the baseband is filtered by a first filter and then enters a first mixer, a first fixed local oscillator provides a reference signal for DDSI, so that a low local oscillator signal with high resolution generated by DDS is output to the first mixer, the intermediate frequency signal and the low local oscillator signal are mixed to obtain a high intermediate frequency signal, the high intermediate frequency signal is filtered and amplified by a second filter and a first amplifier in sequence, and the high intermediate frequency signal is output to a first radio frequency switch; the second fixed local oscillator and the third fixed local oscillator convert the radio frequency band into two sub-bands, the high intermediate frequency signal is selected by the first radio frequency switch, the high intermediate frequency signal can be mixed with the high local oscillator signal generated by the second fixed local oscillator in the second mixer, or mixed with the high local oscillator signal generated by the third fixed local oscillator in the third mixer, the generated sub-band radio frequency signal is filtered by the third filter, the fourth filter, the second amplifier and the third amplifier, amplified and then enters the second radio frequency switch and the third radio frequency switch, filtered by the fifth filter and the sixth filter of different sub-bands, and then output to the power amplifier by the fourth radio frequency switch.

In the receiving channel, the radio frequency circuit comprises a fifth radio frequency switch, a seventh filter, an eighth filter, a sixth radio frequency switch, a seventh radio frequency switch, a ninth filter, a tenth filter, a fourth amplifier, a fifth amplifier, a fourth mixer, a fifth mixer, a fourth fixed local oscillator and a fifth fixed local oscillator; the intermediate frequency circuit comprises an eighth radio frequency switch, an eleventh filter, a sixth mixer, a twelfth filter, a sixth amplifier, a sixth fixed local oscillator and a DDSII. The method comprises the steps that a radio frequency received by an antenna end is processed by a low-noise amplifier, a signal enters two sub-bands through a fifth radio frequency switch, is filtered through a seventh filter and an eighth filter respectively, enters different sub-band channels through a sixth radio frequency switch and a seventh radio frequency switch, is filtered and amplified through a ninth filter and a fourth amplifier or a tenth filter and a fifth amplifier, is output to a fourth mixer and a fifth mixer, is mixed with high local oscillation frequency provided by a fourth fixed local oscillation or a fifth fixed local oscillation, generates a high intermediate frequency signal, and is output to the eighth radio frequency switch, and therefore enters an intermediate frequency circuit; the high intermediate frequency signal is filtered by an eleventh filter, mixed with a low local oscillation frequency of DDSII output of a sixth fixed local oscillation to provide a reference frequency in a sixth mixer, and the generated intermediate frequency signal is filtered and amplified by a twelfth filter and a sixth amplifier to output the intermediate frequency signal to a baseband.

Claims (1)

1. A frequency agile component system for scatter communication includes a radio frequency channel, a processing and control unit, and a reference input; it is characterized in that the method comprises the steps of,

in a transmitting channel, a first filter, a first mixer, a second filter, a first amplifier and a first radio frequency switch are sequentially connected, an intermediate frequency signal given by a baseband enters the first mixer after being filtered by the first filter, a high intermediate frequency signal is obtained after the intermediate frequency signal is mixed with a low local oscillator signal, and the high intermediate frequency signal is sequentially filtered and amplified by the second filter and the first amplifier and is output to the first radio frequency switch; the first fixed local oscillator is connected to the input end of the DDSI, the output end of the DDSI is connected with the first mixer, and the first fixed local oscillator provides a reference signal for the DDSI, so that the DDS generates a high-resolution low local oscillator signal and outputs the high-resolution low local oscillator signal to the first mixer;

the high intermediate frequency signal is selected by a first radio frequency switch, and mixed with a high local oscillator signal generated by a second fixed local oscillator in a second mixer or mixed with a high local oscillator signal generated by a third fixed local oscillator in a third mixer; the second mixer, the third filter and the second amplifier are sequentially connected, and the third mixer, the fourth filter and the third amplifier are sequentially connected; the second fixed local oscillator is connected with the second mixer, the high local oscillator signal generated by the second fixed local oscillator is mixed in the second mixer, the third fixed local oscillator is connected with the third mixer, and the high local oscillator signal generated by the third fixed local oscillator is mixed in the third mixer; the two amplified signals are respectively output to two moving ends of a third radio frequency switch through two moving ends of a second radio frequency switch, wherein the fixed end of the second radio frequency switch is connected with the fixed end of the third radio frequency switch; the two moving ends of the third radio frequency switch are respectively connected with the two moving ends of the fourth radio frequency switch through a fifth filter and a sixth filter which correspond to each other, and the stationary end of the fourth radio frequency switch is used for radio frequency output;

in the receiving channel, the antenna receives radio frequency, the radio frequency enters a fifth radio frequency switch after being processed by a low noise amplifier, and two movable ends of the fifth radio frequency switch are respectively connected with a seventh filter and an eighth filter; the other ends of the seventh filter and the eighth filter are respectively connected with two moving ends of a sixth radio frequency switch, and the fixed end of the sixth radio frequency switch is connected with the fixed end of the seventh radio frequency switch; two movable ends of the seventh radio frequency switch are respectively connected with a ninth filter and a tenth filter; the ninth filter, the fourth amplifier and the fourth mixer are sequentially connected, and the tenth filter, the fifth amplifier and the fifth mixer are sequentially connected; the fourth fixed local oscillator is connected with a fourth mixer, and the fifth fixed local oscillator is connected with a fifth mixer; the fourth mixer and the fifth mixer are respectively connected with two movable ends of the eighth radio frequency switch; the fixed end of the eighth radio frequency switch, the eleventh filter, the sixth mixer, the second filter and the sixth amplifier are sequentially connected, and the sixth amplifier outputs an intermediate frequency signal to the baseband; the low local oscillation frequency of DDSII output of the sixth fixed local oscillation providing the reference frequency is mixed in a sixth mixer;

each radio frequency switch and DDS are connected with the processing and control unit, and the reference input is a radio frequency circuit and an intermediate frequency circuit for improving a stable reference clock signal.