CN220570533U - Integrated device of many WIFI modules - Google Patents

Integrated device of many WIFI modules Download PDF

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Publication number
CN220570533U
CN220570533U CN202322259024.6U CN202322259024U CN220570533U CN 220570533 U CN220570533 U CN 220570533U CN 202322259024 U CN202322259024 U CN 202322259024U CN 220570533 U CN220570533 U CN 220570533U
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pin
capacitor
wifi module
chip unit
pins
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CN202322259024.6U
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Inventor
唐少锋
高超
彭蛟龙
刘鑫
魏云龙
刘新强
汪盛国
吴京
徐正军
王志伟
屈小刚
叶小强
陈彬
刘增鹏
黄海钺
蒋良华
曾保梁
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Shenzhen Bmorn Technology Co ltd
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Shenzhen Bmorn Technology Co ltd
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Abstract

The utility model relates to an integrated device of a plurality of WIFI modules, which comprises: the WIFI module group comprises at least three different WIFI modules, wherein the at least three different WIFI modules comprise a WIFI module U1 with the pin number of n1 paths, a WIFI module U2 with the pin number of n2 paths and a WIFI module U3 with the pin number of n3 paths; pins with the same functions in a plurality of different WIFI modules are respectively overlapped on the PCB; according to the utility model, three different WIFI modules are packaged and designed on the same PCB, so that the compatibility of the different packaged WIFI modules on the same PCB is realized, and the research and development time and cost for changing edition due to WIFI requirement change are greatly reduced.

Description

Integrated device of many WIFI modules
Technical Field
The utility model belongs to the technical field of wireless communication, and particularly relates to an integrated device with multiple WIFI modules.
Background
With the rapid development and wide popularization of smart phones, tablet computers and various smart devices, data transmission and exchange such as internet, screen transmission, file copying and the like are realized through wireless wifi, which becomes an unavoidable basic functional configuration of the smart devices, and compared with a wired mode, the wireless wifi has the characteristics of convenience, rapidness, good mobility and the like, and along with the continuous improvement of the transmission rate, the wireless wifi becomes an indiscriminate choice of mobile portable devices.
Currently, a Wi-Fi module may have multiple modes, such as an Access Point (AP) mode, a Station (STA) mode, and a Mesh mode. A user can switch the Wi-Fi module between different modes through a hardware switch. In the prior art, each Wi-Fi module is independently designed on an independent PCB.
The prior art has at least the following problems:
1. one intelligent device with various Wi-Fi modules needs to be provided with a plurality of corresponding PCB boards, so that materials are wasted, and the occupied space is large.
Disclosure of Invention
The utility model provides an integrated device of a plurality of WIFI modules, and aims to solve the technical problems that in the prior art, a plurality of corresponding PCB boards are required to be installed on intelligent equipment with a plurality of Wi-Fi modules, materials are wasted, and occupied space is large.
The technical scheme for solving the technical problems is as follows: an integrated device of multiple WIFI modules, comprising: the WIFI module group comprises at least three different WIFI modules, wherein the at least three different WIFI modules comprise a WIFI module U1 with the pin number of n1 paths, a WIFI module U2 with the pin number of n2 paths and a WIFI module U3 with the pin number of n3 paths; wherein n1, n2 and n3 are preset values, and n2< n3< n1; the WIFI module U1 and the WIFI module U3 are provided with n4 paths of pins with the same function, and the pins with the same function of the n4 paths of the WIFI module U1 and the WIFI module U3 are respectively overlapped and arranged on a PCB; wherein n4 is a preset value, and n4< n3;
the n1-n 4-path pins remained by the WIFI module U1, the n3-n 4-path pins remained by the WIFI module U3 and the n 2-path pin of the WIFI module U2 are all arranged on the PCB.
The beneficial effects of the utility model are as follows: according to the method, the packaging CO-LAY of the three different WIFI modules is designed on the same PCB, so that the WIFI modules packaged differently are compatible on the same PCB, and the research and development time and cost required by version modification due to WIFI demand change are greatly reduced.
On the basis of the technical scheme, the utility model can be improved as follows.
Further, the PINs in the WIFI module U1 include PIN 1PIN to PIN96 PIN and PIN 1PIN to PIN 4 PIN, where n4=100; PINs in the WIFI module U3 comprise PIN1 PINs to PIN100 PINs;
PIN 1PIN ~ PIN96 PIN of WIFI module U1 designs on the PCB board with the PIN 1PIN ~ PIN96 PIN coincidence of WIFI module U3 respectively, PING 1PIN ~ PING4 PIN of WIFI module U1 designs on the PCB board with the PIN97 PIN ~ PIN100 PIN coincidence of WIFI module U3 respectively.
The beneficial effects of adopting the further scheme are as follows: specifically, pins with the same functions in two different WIFI modules are shared, so that the cost of materials and the occupation of space are saved, and the whole size of the device is reduced.
Further, the WIFI module U2 is a single-frequency WIFI module and includes a second chip unit with a model RTL8723BU, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, and an antenna unit, where pins of the second chip unit include: RF0 pin, VCC33 pin, d+ pin, and D-pin;
the RF0 pin of second chip unit is connected resistance R1's one end and the one end of electric capacity C1, resistance R1's the other end is connected at antenna element output, electric capacity C1's the other end ground connection, the VCC33 pin of second chip unit is connected with power supply voltage and with electric capacity C2's one end, electric capacity C3's one end and electric capacity C4's one end are connected, electric capacity C2's the other end, electric capacity C3's the other end and electric capacity C4's the other end all ground connection, second chip unit's D+ pin with resistance R2's one end is connected, second chip unit's D-pin with resistance R3's one end is connected, resistance R2's the other end with resistance R3's the other end is all connected on WIFI module U3.
The beneficial effects of adopting the further scheme are as follows: according to the WIFI module U2, the pins of the WIFI module U2 are mostly arranged on the periphery of the WIFI module U1 and the periphery of the WIFI module U3, so that the bodies of the WIFI module U2 are mostly arranged above the WIFI module U1 and the WIFI module U3, and the design of the pins of the WIFI module U1 and the WIFI module U3 below the WIFI module U2 is facilitated.
Further, the WIFI module U3 is a dual-frequency WIFI module and includes a third chip unit, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a resistor R4, and a resistor R5; the WIFI module U1 is a dual-frequency WIFI module and comprises a first chip unit;
the pins of the third chip unit include: SUSCLK_32KHZ pin, PERN0 pin, PERP0 pin, VEN_DEF_44 pin, USB_D_N pin, and USB_D_P pin;
the pins of the first chip unit include: SUSCLK_32KHZ pin, PERN0 pin and PERP0 pin;
the SUSCLK_32KHZ pin of the third chip unit is connected with one end of a capacitor C5 and is overlapped with the SUSCLK_32KHZ pin of the first chip unit, the other end of the capacitor C5 is grounded, the PERN0 pin of the third chip unit is connected with one end of a capacitor C6, the other end of the capacitor C6 is overlapped with the PERN0 pin of the first chip unit and is arranged on the PCB, the PERP0 pin of the third chip unit is connected with one end of a capacitor C7, the other end of the capacitor C7 is overlapped with the PERP0 pin of the first chip unit and is arranged on the PCB, the VEN_DEF_44 pin of the third chip unit is connected with a power supply voltage and is connected with one end of a capacitor C8, the other end of the capacitor C8 is grounded, the USB_D_N pin of the third chip unit is connected with one end of a resistor R4, the other end of the resistor R4 is connected with the resistor R2, and the other end of the USB_DEF_44 pin of the third chip unit is connected with the resistor R5.
The beneficial effects of adopting the further scheme are as follows: according to the method, pins with the same functions as the WIFI module U1 and the WIFI module U3 are found, the circuit functions and the sizes of the pins are overlapped, the pins with the more pins of the WIFI module U1 are arranged below the WIFI module U3, the circuits with the same functions as the peripheral pins are directly connected together, and the other pins with different functions are arranged below the WIFI module U3, so that perforation lines walk out of the inner layer of the PCB;
further, the power supply voltage input end of the third chip unit and the power supply voltage input end of the first chip unit are respectively connected with a first filter circuit and a second filter circuit;
the first filter circuit includes: a capacitor C9, a capacitor C10, and a capacitor C11, wherein the second filter circuit includes a capacitor C12 and a capacitor C13;
one end of the capacitor C9 is connected with the power supply voltage input end of the third chip unit, the other end of the capacitor C9 is grounded, and the capacitor C10 and the capacitor C11 are connected with the capacitor C9 in parallel;
one end of the capacitor C12 is connected with the power supply voltage input end of the first chip unit, the other end of the capacitor C12 is grounded, and the capacitor C13 is connected with the capacitor C12 in parallel.
The beneficial effects of adopting the further scheme are as follows: the filter circuit is arranged, so that alternating current components in pulsating direct current voltage are reduced, and the output voltage is smooth and stable.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
FIG. 1 is a schematic diagram illustrating connection between a second chip unit and a peripheral circuit thereof according to an embodiment of the present utility model;
fig. 2 is a schematic diagram illustrating connection between a third chip unit a and a surrounding circuit according to an embodiment of the present utility model;
fig. 3 is a schematic diagram of a third chip unit B according to an embodiment of the present utility model;
fig. 4 is a schematic diagram of a first chip unit a according to an embodiment of the present utility model;
fig. 5 is a schematic diagram of a first chip unit B according to an embodiment of the present utility model;
FIG. 6 is a schematic diagram of a first filter circuit according to an embodiment of the present utility model;
fig. 7 is a schematic diagram of a second filter circuit according to an embodiment of the utility model.
Detailed Description
The principles and features of the present utility model are described below with examples given for the purpose of illustration only and are not intended to limit the scope of the utility model.
The following describes the technical scheme of the present utility model and how the technical scheme of the present utility model solves the above technical problems in detail with specific embodiments. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. Embodiments of the present utility model will be described below with reference to the accompanying drawings.
The embodiment of the utility model provides an integrated device of a plurality of WIFI modules, which comprises: the WIFI module U1 with 140 paths of pins, the WIFI module U2 with 14 paths of pins, the WIFI module U3 with 105 paths of pins and the PCB board;
the WIFI module U1 and 100 paths of pins with the same functions of the WIFI module U3 are respectively overlapped and arranged on the PCB, and the remaining 40 paths of pins of the WIFI module U1, the remaining 5 paths of pins of the WIFI module U3 and 4 paths of pins of the WIFI module U2 are all arranged in a coverage area of the WIFI module U3 covered on the PCB.
The packaging CO-LAY of the three different WIFI modules is designed on the same PCB, so that the WIFI modules packaged differently are compatible on the same PCB, and the research and development time and cost required by modification due to WIFI demand change are greatly reduced. The WIFI module U1, the WIFI module U2 and the WIFI module U3 jointly form a large WIFI module board, the WIFI module U1 and 100 paths of pins overlapped with the WIFI module U3 are arranged on the periphery of the WIFI module board and welded with the PCB board, the remaining 40 paths of pins of the WIFI module U1, the remaining 5 paths of pins of the WIFI module U3 and the 4 paths of pins of the WIFI module U2 are all arranged at the bottom of the large WIFI module board, the pins are covered by the large WIFU module board after being connected with the PCB board, the remaining 10 paths of pins of the WIFI module U2 are arranged on the periphery of the WIFI module board, namely, the distance from the pins to the WIFI module board is greater than the distance from the pins overlapped with 100 paths of pins to the WIFI module board, and the pins are also arranged on the PCB board.
Optionally, the PIN1 to PIN96 of the WIFI module U1 are respectively overlapped with the PIN1 to PIN96 of the WIFI module U3, and the PIN1 to PIN 4 of the WIFI module U1 are respectively overlapped with the PIN97 to PIN100 of the WIFI module U3.
Specifically, pins with the same functions in two different WIFI modules are shared, so that the cost of materials and the occupation of space are saved, and the whole size of the device is reduced.
Optionally, as shown in fig. 1, the WIFI module U2 is a single-frequency WIFI module and includes a second chip unit with a model RTL8723BU, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, and an antenna unit, where pins of the second chip unit include: RF0 pin, VCC33 pin, d+ pin, and D-pin;
the RF0 pin of second chip unit is connected resistance R1's one end and the one end of electric capacity C1, resistance R1's the other end is connected at antenna element output, electric capacity C1's the other end ground connection, the VCC33 pin of second chip unit is connected with power supply voltage and with electric capacity C2's one end, electric capacity C3's one end and electric capacity C4's one end are connected, electric capacity C2's the other end, electric capacity C3's the other end and electric capacity C4's the other end all ground connection, second chip unit's D+ pin with resistance R2's one end is connected, second chip unit's D-pin with resistance R3's one end is connected, resistance R2's the other end with resistance R3's the other end is all connected on WIFI module U3.
Wherein, this application is because the pin of WIFI module U2 mostly all is in WIFI module U1 and WIFI module U3's periphery, consequently the body of WIFI module U2 mostly all is above WIFI module U1 and WIFI module U3, makes things convenient for the pin design of WIFI module U1 and WIFI module U3 below it.
In this embodiment, the parameter of the capacitor C1 is 1.2pF/50V, the parameter of the capacitor C2 is 1uF/6.3V/X5R, the parameter of the capacitor C3 is 1uF/6.3V/X5R, and the parameter of the capacitor C4 is 10uF/6.3V/X5R.
2-5, the first chip unit A and the first chip unit B together form a first chip unit, the third chip unit A and the third chip unit B together form a third chip unit, and the WIFI module U3 is a dual-frequency WIFI module and comprises a third chip unit, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a resistor R4 and a resistor R5; the WIFI module U1 is a dual-frequency WIFI module and comprises a first chip unit;
the pins of the third chip unit include: SUSCLK_32KHZ pin, PERN0 pin, PERP0 pin, VEN_DEF_44 pin, USB_D_N pin, and USB_D_P pin;
the pins of the first chip unit include: SUSCLK_32KHZ pin, PERN0 pin and PERP0 pin;
the SUSCLK_32KHZ pin of the third chip unit is connected with one end of a capacitor C5 and is overlapped with the SUSCLK_32KHZ pin of the first chip unit, the other end of the capacitor C5 is grounded, the PERN0 pin of the third chip unit is connected with one end of a capacitor C6, the other end of the capacitor C6 is overlapped with the PERN0 pin of the first chip unit and is arranged on the PCB, the PERP0 pin of the third chip unit is connected with one end of a capacitor C7, the other end of the capacitor C7 is overlapped with the PERP0 pin of the first chip unit and is arranged on the PCB, the VEN_DEF_44 pin of the third chip unit is connected with a power supply voltage and is connected with one end of a capacitor C8, the other end of the capacitor C8 is grounded, the USB_D_N pin of the third chip unit is connected with one end of a resistor R4, the other end of the resistor R4 is connected with the resistor R2, and the other end of the USB_DEF_44 pin of the third chip unit is connected with the resistor R5.
According to the method, pins with the same functions as the WIFI module U1 and the WIFI module U3 are found out, the circuit functions and the sizes of the pins are overlapped, the pins with more pins of the WIFI module U1 are arranged below the WIFI module U3, the circuits with the same functions as the peripheral pins are directly connected together, and the other pins with different functions are arranged below the WIFI module U3, so that perforation lines walk out of the inner layer of the PCB;
in this embodiment, the parameter of the capacitor C5 is 18PF/50V/COG, the parameter of the capacitor C6 is 0.1UF/10V/X5R, the parameter of the capacitor C7 is 0.1UF/10V/X5R, and the parameter of the capacitor C8 is 1UF/6.3V/X5R.
Optionally, as shown in fig. 6 and fig. 7, the power supply voltage input end of the third chip unit and the power supply voltage input end of the first chip unit are respectively connected with a first filter circuit and a second filter circuit;
the first filter circuit includes: a capacitor C9, a capacitor C10, and a capacitor C11, wherein the second filter circuit includes a capacitor C12 and a capacitor C13;
one end of the capacitor C9 is connected with the power supply voltage input end of the third chip unit, the other end of the capacitor C9 is grounded, and the capacitor C10 and the capacitor C11 are connected with the capacitor C9 in parallel;
one end of the capacitor C12 is connected with the power supply voltage input end of the first chip unit, the other end of the capacitor C12 is grounded, and the capacitor C13 is connected with the capacitor C12 in parallel.
By arranging the filter circuit, the alternating current component in the pulsating direct current voltage is reduced, and the output voltage is smooth and stable.
In this embodiment, the parameter of the capacitor C9 is 10uF/6.3V/X5R, the parameter of the capacitor C10 is 4.7uF/6.3V/X5R, and the parameter of the capacitor C11 is 0.1uF/6.3V/X5R; the parameter of the capacitor C12 is 4.7uF/6.3V/X5R, and the parameter of the capacitor C13 is 1uF/10V/X5R.
The above description is only illustrative of the preferred embodiments of the present utility model and of the principles of the technology employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in the present utility model is not limited to the specific combinations of technical features described above, but also covers other technical features formed by any combination of the technical features described above or their equivalents without departing from the spirit of the disclosure. Such as the above-mentioned features and the technical features disclosed in the present utility model (but not limited to) having similar functions are replaced with each other.

Claims (5)

1. An integrated device of many WIFI modules, characterized in that includes: the WIFI module group comprises at least three different WIFI modules, wherein the at least three different WIFI modules comprise a WIFI module U1 with the pin number of n1 paths, a WIFI module U2 with the pin number of n2 paths and a WIFI module U3 with the pin number of n3 paths; wherein n1, n2 and n3 are preset values, and n2< n3< n1; the WIFI module U1 and the WIFI module U3 are provided with n4 paths of pins with the same function, and the pins with the same function of the n4 paths of the WIFI module U1 and the WIFI module U3 are respectively overlapped and arranged on a PCB; wherein n4 is a preset value, and n4< n3;
the n1-n 4-path pins remained by the WIFI module U1, the n3-n 4-path pins remained by the WIFI module U3 and the n 2-path pin of the WIFI module U2 are all arranged on the PCB.
2. The integrated device of claim 1, wherein n4=100, and the PINs in the WIFI module U1 include PIN1 PIN-PIN 96 PIN and PIN1 PIN-PIN 4 PIN; PINs in the WIFI module U3 comprise PIN1 PINs to PIN100 PINs;
PIN 1PIN ~ PIN96 PIN of WIFI module U1 designs on the PCB board with the PIN 1PIN ~ PIN96 PIN coincidence of WIFI module U3 respectively, PING 1PIN ~ PING4 PIN of WIFI module U1 designs on the PCB board with the PIN97 PIN ~ PIN100 PIN coincidence of WIFI module U3 respectively.
3. The integrated device of claim 1, wherein the WIFI module U2 is a single frequency WIFI module and includes a second chip unit with a model RTL8723BU, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, and an antenna unit, and pins of the second chip unit include: RF0 pin, VCC33 pin, d+ pin, and D-pin;
the RF0 pin of second chip unit is connected resistance R1's one end and the one end of electric capacity C1, resistance R1's the other end is connected at antenna element output, electric capacity C1's the other end ground connection, the VCC33 pin of second chip unit is connected with power supply voltage and with electric capacity C2's one end, electric capacity C3's one end and electric capacity C4's one end are connected, electric capacity C2's the other end, electric capacity C3's the other end and electric capacity C4's the other end all ground connection, second chip unit's D+ pin with resistance R2's one end is connected, second chip unit's D-pin with resistance R3's one end is connected, resistance R2's the other end with resistance R3's the other end is all connected on WIFI module U3.
4. The integrated device of claim 3, wherein the WIFI module U3 is a dual frequency WIFI module and includes a third chip unit, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a resistor R4, and a resistor R5; the WIFI module U1 is a dual-frequency WIFI module and comprises a first chip unit;
the pins of the third chip unit include: SUSCLK_32KHZ pin, PERN0 pin, PERP0 pin, VEN_DEF_44 pin, USB_D_N pin, and USB_D_P pin;
the pins of the first chip unit include: SUSCLK_32KHZ pin, PERN0 pin and PERP0 pin;
the SUSCLK_32KHZ pin of the third chip unit is connected with one end of a capacitor C5 and is overlapped with the SUSCLK_32KHZ pin of the first chip unit, the other end of the capacitor C5 is grounded, the PERN0 pin of the third chip unit is connected with one end of a capacitor C6, the other end of the capacitor C6 is overlapped with the PERN0 pin of the first chip unit and is arranged on the PCB, the PERP0 pin of the third chip unit is connected with one end of a capacitor C7, the other end of the capacitor C7 is overlapped with the PERP0 pin of the first chip unit and is arranged on the PCB, the VEN_DEF_44 pin of the third chip unit is connected with a power supply voltage and is connected with one end of a capacitor C8, the other end of the capacitor C8 is grounded, the USB_D_N pin of the third chip unit is connected with one end of a resistor R4, the other end of the resistor R4 is connected with the resistor R2, and the other end of the USB_DEF_44 pin of the third chip unit is connected with the resistor R5.
5. The integrated device of a multiple WIFI module according to claim 4, wherein the power supply voltage input terminal of the third chip unit and the power supply voltage input terminal of the first chip unit are connected to a first filter circuit and a second filter circuit, respectively;
the first filter circuit includes: a capacitor C9, a capacitor C10, and a capacitor C11, wherein the second filter circuit includes a capacitor C12 and a capacitor C13;
one end of the capacitor C9 is connected with the power supply voltage input end of the third chip unit, the other end of the capacitor C9 is grounded, and the capacitor C10 and the capacitor C11 are connected with the capacitor C9 in parallel;
one end of the capacitor C12 is connected with the power supply voltage input end of the first chip unit, the other end of the capacitor C12 is grounded, and the capacitor C13 is connected with the capacitor C12 in parallel.
CN202322259024.6U 2023-08-22 2023-08-22 Integrated device of many WIFI modules Active CN220570533U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322259024.6U CN220570533U (en) 2023-08-22 2023-08-22 Integrated device of many WIFI modules

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322259024.6U CN220570533U (en) 2023-08-22 2023-08-22 Integrated device of many WIFI modules

Publications (1)

Publication Number Publication Date
CN220570533U true CN220570533U (en) 2024-03-08

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ID=90087889

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202322259024.6U Active CN220570533U (en) 2023-08-22 2023-08-22 Integrated device of many WIFI modules

Country Status (1)

Country Link
CN (1) CN220570533U (en)

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