CN220569092U - Selectable self-adaptive PWM speed regulation control logic signal circuit - Google Patents
Selectable self-adaptive PWM speed regulation control logic signal circuit Download PDFInfo
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- CN220569092U CN220569092U CN202321844286.2U CN202321844286U CN220569092U CN 220569092 U CN220569092 U CN 220569092U CN 202321844286 U CN202321844286 U CN 202321844286U CN 220569092 U CN220569092 U CN 220569092U
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Abstract
The utility model provides a selectable self-adaptive PWM speed regulation control logic signal circuit, which comprises an MCU chip, a gating circuit, an inverting amplifying circuit, a combined amplifying circuit, a push-pull circuit and an output circuit, wherein a signal output end PWM1 of the MCU chip is connected with the gating circuit, the gating circuit is connected with the inverting amplifying circuit or the combined amplifying circuit, the inverting amplifying circuit and the combined amplifying circuit are both connected with the push-pull circuit, the push-pull circuit is connected with the output circuit, the output circuit is provided with a control output end PWM2 of PWM signals, the push-pull circuit is connected with the output end PWM2, square wave PWM signals generated by the MCU chip enter the inverting amplifying circuit or the combined amplifying circuit through the gating circuit, and the inverted or in-phase PWM signals are input into the push-pull circuit and enter the output circuit through the output end PWM2, so that the control of a motor or a water pump is realized.
Description
Technical Field
The utility model relates to the technical field of signal circuits, in particular to a selectable self-adaptive PWM speed regulation control logic signal circuit.
Background
The problem that the maintenance and the replacement of vulnerable parts are inconvenient in structure also exists because relevant installation spaces of electric automobiles and the like are narrow.
Particularly for the PWM speed-regulating ventilation motor, working medium circulating pump and other similar vulnerable parts, maintenance and replacement are often required. Besides the trouble of disassembly and assembly, different technical process designs lead to the fact that the speed-regulating PWM signals have different high-level duty ratio and low-level duty ratio, and PWM speed-regulating circuits are basically fixed, so that the replacement universality is poor.
Disclosure of Invention
In view of the poor universality of the current equipment replacement using PWM speed regulation, the utility model provides a selectable self-adaptive PWM speed regulation control logic signal circuit, wherein the output path selection of PWM signals is realized through a manually controlled motor switch T1, and the output logic of the switching chip software is realized through the inverted output of an inverting amplifying circuit or the in-phase output of a combined amplifying circuit.
In order to achieve the above purpose, the embodiment of the present utility model adopts the following technical scheme:
the utility model provides a selectable self-adaptation PWM speed governing control logic signal circuit, includes MCU chip, gating circuit, inverting amplification circuit, combination amplification circuit, push-pull circuit and output circuit, the signal output part PWM1 of MCU chip connects gating circuit, gating circuit is equipped with motor switch T1, one pin connection VDD of motor switch T1 another pin connecting resistor R14, the other end of resistor R14 links to each other with triode Q6, diode D1 and single-pole double-throw relay are connected to triode Q6, gating circuit with inverting amplification circuit or combination amplification circuit is connected, inverting amplification circuit, combination amplification circuit all are connected push-pull circuit, push-pull circuit with output circuit connects, output circuit is equipped with PWM signal's control output part PWM2.
According to one aspect of the utility model, the base electrode of the triode Q6 is connected with a resistor R14, a resistor R15 and a capacitor C2, the emitter electrode of the triode Q6, the resistor R15 and the capacitor C2 are grounded, the collector electrode is connected with the anode of a diode D1 and a single-pole double-throw relay, the cathode of the diode D1 and the single-pole double-throw relay are connected with VCC, the single-pole double-throw relay is provided with a movable end and a fixed end, and the fixed end is connected with the signal output end PWM 1.
According to one aspect of the utility model, the inverting amplifier circuit is provided with an input end PWM3, when the motor switch T1 is turned off, the triode Q6 is turned off, and the moving end of the single-pole double-throw relay is connected with the input end PWM3.
According to one aspect of the utility model, the inverting amplifier circuit is provided with a triode Q2, the base electrode of the triode Q2 is connected with a resistor R5 and a resistor R6, the emitter electrode and the resistor R6 are grounded, the collector electrode is connected with the resistor R2 and the push-pull circuit, the other end of the resistor R2 is connected with VCC, and the other end of the resistor R5 is connected with the input end PWM3.
According to one aspect of the utility model, the combined amplifying circuit is provided with an input end PWM4, when the motor switch T1 is closed, the triode Q6 is conducted, and the moving end of the single-pole double-throw relay is connected with the input end PWM4.
According to one aspect of the utility model, the combined amplifying circuit is provided with a triode Q4 and a triode Q5, the emitters of the triode Q4 and the triode Q5 are commonly grounded, the collector of the triode Q4 is connected with a resistor R2 and the push-pull circuit, the base of the triode Q4 is connected with a resistor R11, the other end of the resistor R2 is connected with VCC, and the other end of the resistor R10 is connected with VDD; the collector of the triode Q5 is connected with the other ends of the resistor R10 and the resistor R11, the base of the triode Q5 is connected with the resistor R12 and the resistor R13, and the other end of the resistor R12 is connected with the input end PWM4.
According to one aspect of the utility model, the push-pull circuit is provided with a triode Q1 and a triode Q3, the triode Q1 is connected with the base electrode of the triode Q3, a resistor R3 is connected with the other end of the resistor R3, the inverting amplifier circuit and the combined amplifier circuit, and the resistor R2 is connected with VCC; the collector of the triode Q1 is connected with a resistor R1, and the emitter is connected with a resistor R4, a resistor R7 and the emitter of the triode Q3; the collector of the triode Q3 is grounded, and the emitter is connected with a resistor R4 and a resistor R7; the other end of the resistor R4 is connected with the control output end PWM2, and the other end of the resistor R7 is grounded.
According to one aspect of the utility model, the output circuit is provided with an output terminal T2 controlled by a PWM signal, the output terminal T2 is provided with a PWM pin, an FG pin and a GND pin, the PWM pin is connected to the control output terminal PWM2, the GND pin is grounded, the FG pin is connected to a resistor R8, a resistor R9 and a capacitor C2, the other end of the resistor R8 is connected to VDD, the other end of the resistor R9 is connected to a capacitor C1 and a pump_fg output terminal, and the capacitors C1 and C2 are grounded.
The implementation of the utility model has the advantages that: the utility model provides a selectable self-adaptive PWM speed regulation control logic signal circuit, which comprises an MCU chip, a gating circuit, an inverting amplifying circuit, a combined amplifying circuit, a push-pull circuit and an output circuit, wherein a signal output end PWM1 of the MCU chip is connected with the gating circuit, the gating circuit is connected with the inverting amplifying circuit or the combined amplifying circuit, the inverting amplifying circuit and the combined amplifying circuit are both connected with the push-pull circuit, the push-pull circuit is connected with the output circuit, the output circuit is provided with a control output end PWM2 of PWM signals, the push-pull circuit is connected with the output end PWM2, square wave PWM signals generated by the MCU chip enter the inverting amplifying circuit or the combined amplifying circuit through the gating circuit, the inverting or non-inverting PWM signals are input into the push-pull circuit and enter the output circuit through the output end PWM2, the control of a motor or a water pump is realized, and the output logic of chip software is automatically switched by adopting a selectable switch. The method is convenient to replace parts with different logics on application products, can avoid the trouble of rewriting and burning software and disassembling a controller box to replace a control board, improves the universality of spare parts and reduces the maintenance cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a circuit diagram of an alternative adaptive PWM speed control logic signal according to the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
As shown in FIG. 1, the selectable self-adaptive PWM speed regulation control logic signal circuit comprises an MCU chip, a gating circuit, an inverting amplification circuit, a combined amplification circuit, a push-pull circuit and an output circuit, wherein a signal output end PWM1 of the MCU chip is connected with the gating circuit, the gating circuit is connected with the inverting amplification circuit or the combined amplification circuit, the inverting amplification circuit and the combined amplification circuit are both connected with the push-pull circuit, the push-pull circuit is connected with the output circuit, the output circuit is provided with a control output end PWM2 of PWM signals, and the push-pull circuit is connected with the output end PWM2.
The MCU chip can generate square wave PWM signals of high and low level cyclic conversion, the total time of the high and low levels in each period is fixed, and speed regulation signals are formed according to different duty ratios of the high level time or the low level time in the total time, so that the speed regulation of the speed regulation signals in equal proportion is realized.
In this embodiment, the gating circuit includes a motor switch T1, a triode Q6, a resistor R14, a resistor R15, a capacitor C3, a diode D1, and a single-pole double-throw relay, where one pin of the motor switch T1 is connected to VDD, and the other pin is connected to the resistor R14; the other end of the resistor R14 is connected with a resistor R15, a capacitor C3 and a base electrode of the triode Q6; the base electrode of the triode Q6 is connected with a resistor R14, a resistor R15 and a capacitor C2, the emitter electrode of the triode Q6, the resistor R15 and the capacitor C2 are grounded, and the collector electrode is connected with the anode of the diode D1 and the single-pole double-throw relay; the cathode of the diode D1 and the single-pole double-throw relay are connected with VCC, the single-pole double-throw relay is provided with a movable end and a fixed end, and the fixed end is connected with the signal output end PWM 1.
According to the embodiment of the utility model, the gating circuit is connected with the inverting amplifying circuit or the combined amplifying circuit through the closing or opening of the motor switch T1, the inverting amplifying circuit is provided with an input end PWM3, the combined amplifying circuit is provided with an input end PWM4, and the movable end of the single-pole double-throw relay is connected with one of the PWM3 and the PWM4.
In practical application, when the motor switch T1 is disconnected, the triode Q6 is cut off, the movable end of the single-pole double-throw relay is connected with the input end PWM3, connection between the gating circuit and the inverting amplification circuit is realized, the signal output end PWM1 of the MCU chip is sequentially connected with the gating circuit, the inverting amplification circuit and the push-pull circuit through the input end PWM3, and then enters the output circuit through the output end PWM2.
The inverting output of the square wave PWM signal is realized through an inverting amplifying circuit, and in the embodiment, the inverting amplifying circuit specifically comprises a triode Q2, a resistor R5 and a resistor R6; the base electrode of the triode Q2 is connected with a resistor R5 and a resistor R6, the emitter electrode and the resistor R6 are grounded, the collector electrode is connected with the resistor R2 and the push-pull circuit, the other end of the resistor R2 is connected with VCC, the other end of the resistor R5 is connected with the input end PWM3, when the PWM signal of the input end PWM3 is at a high level, the signal entering the push-pull circuit becomes at a low level through the inverting amplification effect of the inverting circuit, and the signal of the input circuit of the output end PWM2 is also at a low level, so that the high and low level signals of the signal output end PWM1 are opposite to the high and low level phases of the output end PWM2.
In practical application, when the motor switch T1 is closed, the triode Q6 is conducted, the movable end of the single-pole double-throw relay is connected with the input end PWM4, connection between the gating circuit and the combined amplifying circuit is achieved, the signal output end PWM1 of the MCU chip is sequentially connected with the gating circuit, the combined amplifying circuit and the push-pull circuit through the input end PWM4, and then the signal enters the output circuit through the output end PWM2.
The in-phase output of the square wave PWM signal is realized through the combined amplifying circuit, the combined amplifying circuit is formed by combining two-stage inverting circuits, and in the embodiment, the combined amplifying circuit comprises a triode Q4, a triode Q5, a resistor R2, a resistor R10, a resistor R11, a resistor R12 and a resistor R13; the emitters of the triode Q4 and the triode Q5 are grounded, and the resistor R13 is grounded; the collector of the transistor Q4 is connected with a resistor R2, the base of the transistor Q4 is connected with a resistor R11, the other end of the resistor R2 is connected with VCC, the other end of the resistor R11 is connected with a resistor R10 and the collector of the transistor Q5, and the other end of the resistor R10 is connected with VDD; the collector of the triode Q5 is connected with a resistor R10, the other end of the resistor R11 is also connected, the base of the triode Q5 is connected with a resistor R12 and a resistor R13, and the other end of the resistor R12 is connected with an input end PWM4; when the PWM signal of the input end PWM4 is at a high level, the PWM signal is changed into a low level through the inverting amplification effect of a first-stage inverting circuit where the triode Q5 is positioned, and then the PWM signal at the low level is changed into a high-level PWM signal through the inverting amplification effect of a second-stage inverting amplification circuit where the triode Q4 is positioned, and then enters the push-pull circuit to keep in phase with the PWM signal of the input end PWM4; similarly, when the PWM signal input to the input terminal PWM4 is at a low level, the PWM signal is changed into a high level PWM signal and then into a low level PWM signal through the two inverting amplification actions of the combination amplifying circuit, and then enters the push-pull circuit, and finally enters the output circuit through the output terminal PWM2.
The push-pull circuit can be used in a direct current motor driver, and can realize the functions of forward and reverse rotation, speed regulation and the like of a direct current motor. The push-pull circuit can control the rotating speed and the steering of the direct current motor by controlling the on and off of the two triodes, and in the embodiment, the push-pull circuit comprises a triode Q1, a triode Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a resistor R7; the triode Q1 is connected with the base electrode of the triode Q3 and is connected with a resistor R3, the other end of the resistor R3 is connected with a resistor R2, and the other end of the resistor R2 is connected with VCC; the collector of the triode Q1 is connected with a resistor R1, the other end of the resistor R1 is connected with VCC, and the emitter of the triode Q1 is connected with a resistor R4, a resistor R7 and the emitter of the triode Q3; the collector of the triode Q3 is grounded, and the emitter of the triode Q3 is connected with a resistor R4, a resistor R7 and the emitter of the triode Q1; the other end of the resistor R4 is connected with an output end PWM2, and a PWM signal passing through the push-pull circuit is transmitted to an output terminal T2.
In practical application, the output terminal T2 is a water pump or motor PWM signal control output terminal.
In this embodiment, the output circuit includes an output terminal T2, a resistor R8, a resistor R9, a capacitor C1, and a capacitor C2; the output terminal T2 is provided with three pins, including: a PWM pin, an FG pin and a grounded GND pin which are directly connected with the output end PWM 2; the FG pin is connected with a resistor R8, a resistor R9 and a capacitor C2, the other end of the resistor R8 is connected with VDD, the other end of the resistor R9 is connected with a capacitor C1 and a PUMP_FG output end, and the capacitor C1 and the capacitor C2 are grounded.
In practical application, when the high-level speed-regulating motor or the water pump is replaced on the same equipment, the motor switch T1 can be selectively disconnected on the premise of not replacing software and controlling a hardware board by the selectable self-adaptive PWM speed-regulating control logic signal circuit, so that the motor can work normally; when the motor or the water pump with low-level speed regulation is required to be replaced, the motor switch T1 is only required to be selectively closed, so that the motor can work normally, and different spare parts can be replaced conveniently and quickly.
The implementation of the utility model has the advantages that: the utility model provides a selectable self-adaptive PWM speed regulation control logic signal circuit, which comprises an MCU chip, a gating circuit, an inverting amplifying circuit, a combined amplifying circuit, a push-pull circuit and an output circuit, wherein a signal output end PWM1 of the MCU chip is connected with the gating circuit, the gating circuit is connected with the inverting amplifying circuit or the combined amplifying circuit, the inverting amplifying circuit and the combined amplifying circuit are both connected with the push-pull circuit, the push-pull circuit is connected with the output circuit, the output circuit is provided with a control output end PWM2 of PWM signals, the push-pull circuit is connected with the output end PWM2, square wave PWM signals generated by the MCU chip enter the inverting amplifying circuit or the combined amplifying circuit through the gating circuit, the inverting or non-inverting PWM signals are input into the push-pull circuit and enter the output circuit through the output end PWM2, the control of a motor or a water pump is realized, and the output logic of chip software is automatically switched by adopting a selectable switch. The method is convenient to replace parts with different logics on application products, can avoid the trouble of rewriting and burning software and disassembling a controller box to replace a control board, improves the universality of spare parts and reduces the maintenance cost.
The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present utility model should be included in the scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.
Claims (8)
1. The utility model provides a selectable self-adaptation PWM speed governing control logic signal circuit, includes MCU chip, gating circuit, inverting amplification circuit, combination amplification circuit, push-pull circuit and output circuit, its characterized in that, the signal output part PWM1 of MCU chip connects gating circuit, gating circuit is equipped with motor switch T1, one pin of motor switch T1 connects VDD, another pin connecting resistor R14, and the other end of resistor R14 links to each other with triode Q6, and diode D1 and single-pole double-throw relay are connected to triode Q6, gating circuit with inverting amplification circuit or combination amplification circuit is connected, inverting amplification circuit, combination amplification circuit all are connected push-pull circuit, push-pull circuit with output circuit connects, output circuit is equipped with the control output part PWM2 of PWM signal.
2. The selectable self-adaptive PWM speed regulation control logic signal circuit according to claim 1, wherein a base electrode of the triode Q6 is connected with a resistor R14, a resistor R15 and a capacitor C2, an emitter electrode of the triode Q6, the resistor R15 and the capacitor C2 are grounded, a collector electrode is connected with an anode of the diode D1 and a single-pole double-throw relay, a cathode of the diode D1 and the single-pole double-throw relay are connected with VCC, a movable end and a fixed end are arranged on the single-pole double-throw relay, and the fixed end is connected with the signal output end PWM 1.
3. The selectable adaptive PWM speed control logic signal circuit according to claim 2, wherein the inverting amplifier circuit has an input PWM3, the transistor Q6 is turned off when the motor switch T1 is turned off, and the moving terminal of the single pole double throw relay is connected to the input PWM3.
4. A selectable adaptive PWM speed regulation control logic signal circuit according to claim 3, wherein the inverting amplifier circuit is provided with a triode Q2, the base of the triode Q2 is connected to a resistor R5, a resistor R6, the emitter is grounded to the resistor R6, the collector is connected to the resistor R2 and the push-pull circuit, the other end of the resistor R2 is connected to VCC, and the other end of the resistor R5 is connected to the input PWM3.
5. The selectable adaptive PWM speed control logic signal circuit according to claim 2, wherein the combination amplifier circuit has an input PWM4, the transistor Q6 is turned on when the motor switch T1 is turned on, and the moving terminal of the single pole double throw relay is connected to the input PWM4.
6. The selectable self-adaptive PWM speed regulation control logic signal circuit according to claim 5, wherein the combined amplifying circuit is provided with a triode Q4 and a triode Q5, the emitters of the triode Q4 and the triode Q5 are grounded, the collector of the triode Q4 is connected with a resistor R2 and the push-pull circuit, the base of the triode Q4 is connected with a resistor R11, the other end of the resistor R2 is connected with VCC, and the other end of the resistor R10 is connected with VDD; the collector of the triode Q5 is connected with the other ends of the resistor R10 and the resistor R11, the base of the triode Q5 is connected with the resistor R12 and the resistor R13, and the other end of the resistor R12 is connected with the input end PWM4.
7. The selectable self-adaptive PWM speed regulation control logic signal circuit according to claim 1, wherein the push-pull circuit is provided with a triode Q1 and a triode Q3, the base electrodes of the triode Q1 and the triode Q3 are connected, a resistor R3 is connected, the other end of the resistor R3 is connected with a resistor R2, the inverting amplification circuit and the combined amplification circuit, and the resistor R2 is connected with VCC; the collector of the triode Q1 is connected with a resistor R1, and the emitter is connected with a resistor R4, a resistor R7 and the emitter of the triode Q3; the collector of the triode Q3 is grounded, and the emitter is connected with a resistor R4 and a resistor R7; the other end of the resistor R4 is connected with the control output end PWM2, and the other end of the resistor R7 is grounded.
8. The selectable adaptive PWM speed regulation control logic signal circuit according to claim 1, wherein the output circuit is provided with an output terminal T2 controlled by PWM signals, the output terminal T2 is provided with a PWM pin, an FG pin and a GND pin, the PWM pin is connected to the control output terminal PWM2, the GND pin is grounded, the FG pin is connected to a resistor R8, a resistor R9 and a capacitor C2, the other end of the resistor R8 is connected to VDD, the other end of the resistor R9 is connected to a capacitor C1 and a pump_fg output terminal, and the capacitors C1 and C2 are grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321844286.2U CN220569092U (en) | 2023-07-13 | 2023-07-13 | Selectable self-adaptive PWM speed regulation control logic signal circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321844286.2U CN220569092U (en) | 2023-07-13 | 2023-07-13 | Selectable self-adaptive PWM speed regulation control logic signal circuit |
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| Publication Number | Publication Date |
|---|---|
| CN220569092U true CN220569092U (en) | 2024-03-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321844286.2U Active CN220569092U (en) | 2023-07-13 | 2023-07-13 | Selectable self-adaptive PWM speed regulation control logic signal circuit |
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| Country | Link |
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| CN (1) | CN220569092U (en) |
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2023
- 2023-07-13 CN CN202321844286.2U patent/CN220569092U/en active Active
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