CN220491884U - High-voltage MIM capacitor layout structure, integrated circuit, driving chip and electronic equipment - Google Patents
High-voltage MIM capacitor layout structure, integrated circuit, driving chip and electronic equipment Download PDFInfo
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- CN220491884U CN220491884U CN202321392753.2U CN202321392753U CN220491884U CN 220491884 U CN220491884 U CN 220491884U CN 202321392753 U CN202321392753 U CN 202321392753U CN 220491884 U CN220491884 U CN 220491884U
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- 239000003990 capacitor Substances 0.000 title claims abstract description 56
- 239000002184 metal Substances 0.000 claims abstract description 119
- 239000010410 layer Substances 0.000 claims description 135
- 239000000758 substrate Substances 0.000 claims description 20
- 238000002347 injection Methods 0.000 claims description 10
- 239000007924 injection Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 239000011241 protective layer Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 11
- 238000013461 design Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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- Semiconductor Integrated Circuits (AREA)
Abstract
The utility model provides a high-voltage MIM capacitor layout structure, an integrated circuit, a driving chip and electronic equipment, which comprises the following components: an MIM upper polar plate and an MIM lower polar plate; wherein, the MIM upper polar plate includes: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the space positions of the first metal plates; several grounding protection layers; a plurality of via structures; the via structures are formed among the MIM upper polar plate, the MIM lower polar plate and the grounding protection layers, so that the grounding protection layers are grounded through the corresponding via holes; the cross sections of the first metal plate and the second metal plate are of circular structures. The technical scheme provided by the utility model solves the problems of high cost and insufficient performance stability of the existing high-voltage MIM capacitor layout.
Description
Technical Field
The utility model belongs to the technical field of integrated circuits, and particularly relates to a high-voltage MIM capacitor layout structure, an integrated circuit, a driving chip and electronic equipment.
Background
In very large scale integrated circuits, capacitance is one of the commonly used passive devices. Are widely used in modules such as sample and hold circuits, analog to digital converters, filters, and radio frequency circuits. The matching accuracy of the capacitor can directly influence the linearity, speed, area, power consumption and other factors of the whole module. The integrated circuit implemented capacitors include MOM capacitors, MIM (metal-insulator-metal) capacitors, PIP capacitors, and the like.
The MIM capacitor is an important component in an integrated circuit, and utilizes C between an upper metal layer and a lower metal layer, namely an electrode layer capacitor, wherein the upper electrode layer is MN, and the lower electrode layer is MN-1, and the common MN and MN-1 are far away from each other in a three-dimensional space by an oxide layer, so that the C is not large. Thus, MIM introduces a dielectric layer CTM, which is formed above MN-1, below MN, and is connected to MN by VIA.
The traditional MIM capacitor layout design method comprises the steps of designing a lower electrode layer, designing a dielectric layer, punching holes in the dielectric layer and filling the holes, and finally connecting an upper electrode layer with the dielectric layer through rectangular through holes. The rectangular hole has stable performance and insufficient quality.
Therefore, developing a high-voltage MIM capacitor layout design with low cost and more stable performance becomes a technical problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The utility model provides a high-voltage MIM capacitor layout structure, an integrated circuit, a driving chip and electronic equipment, which are used for solving the problems of high cost and insufficient performance stability of the existing high-voltage MIM capacitor layout.
According to a first aspect of the utility model, there is provided a high voltage MIM capacitor layout structure comprising:
an MIM upper polar plate and an MIM lower polar plate; wherein, the MIM upper polar plate includes: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the space positions of the first metal plates;
several grounding protection layers;
a plurality of via structures; the via structures are formed among the MIM upper polar plate, the MIM lower polar plate and the grounding protection layers, so that the grounding protection layers are grounded through the corresponding via holes;
the cross sections of the first metal plate and the second metal plate are of circular structures.
Optionally, the plurality of grounding protection layers are sequentially formed in different dielectric layers in the dielectric body along the first direction; wherein the dielectric layers are sequentially formed on different horizontal planes in the dielectric body along the second direction; the second direction is perpendicular to the first direction.
Optionally, the plurality of grounding protection layers include: the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole, the third via hole, the second metal grounding protection layer, the fourth via hole, the third metal grounding protection layer, the fifth via hole, the fourth metal grounding protection layer, the sixth via hole and the fifth metal grounding protection layer are sequentially arranged along the second direction;
the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole, the MIM upper plate, the third via hole, the second metal grounding protection layer, the fourth via hole, the third metal grounding protection layer, the fifth via hole, the fourth metal grounding protection layer, the sixth via hole and the fifth metal grounding protection layer are sequentially arranged in the corresponding dielectric layers along the second direction; the fifth metal grounding protection layer comprises a via hole, and the MIM lower electrode plate is formed in the via hole in the fifth metal grounding protection layer;
and the first metal grounding protection layer is provided with a metal lead, so that the first metal grounding protection layer passes through the second via hole and is connected to the MIM upper polar plate.
Optionally, a plurality of vias are disposed in the second metal grounding protection layer; the cross section of the plurality of through holes is round; the positions and the shapes of the plurality of through holes arranged in the second metal grounding protective layer are corresponding to the positions and the shapes of the more than two first metal plates on the MIM upper polar plate;
the cross sections of the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole and the third via hole are all as follows: "circular"; and a plurality of through holes corresponding to the MIM upper electrode plate and the metal plate in the MIM electrode plate and the second metal grounding protection layer.
Optionally, the profiles of the fourth via hole, the via hole in the third metal grounding protection layer and the fifth via hole are adapted to the profile of the second metal grounding protection layer.
Optionally, the high voltage MIM capacitor layout structure further comprises:
and the PAD window opening layer is formed in the dielectric layer between the fourth metal grounding protection layer and the sixth via hole.
Optionally, the material of the dielectric layer is: a nitride; the dielectric body is made of the following materials: and (3) silicon oxide.
According to a second aspect of the present utility model there is provided an integrated circuit comprising a high voltage MIM capacitor layout structure according to any one of the first aspect of the present utility model.
According to a third aspect of the present utility model, there is provided a driver chip comprising an integrated circuit according to the second aspect of the present utility model.
According to a fourth aspect of the present utility model, there is provided an electronic device comprising the driving chip according to the third aspect of the present utility model.
The utility model provides a layout structure of a high-voltage MIM capacitor, which is characterized in that an MIM upper polar plate and an MIM lower polar plate are arranged as follows: the cross sections of the first metal plate and the second metal plate are of circular structures; the structural performance of the high-voltage MIM capacitor layout formed by the MIM upper polar plate and the MIM lower polar plate of the circular structure is more stable; and the MIM top plate comprises: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the first metal plates in space positions, and the arrangement of the metal plates further improves the stability of the capacitor; the high-voltage MIM capacitor layout structure provided by the utility model has lower cost; therefore, the technical scheme provided by the utility model reduces the cost and has more stable performance.
Drawings
Fig. 1 is an exploded view of a specific structure of a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 2 is a schematic structural diagram of an AA layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of an SP layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 4 is a schematic structural diagram of a CT layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 5 is a schematic structural diagram of an M1 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 6 is a schematic structural diagram of a V1 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 7 is a schematic structural diagram of an M2 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 8 is a schematic structural diagram of an M3 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 9 is a schematic structural diagram of an M4 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 10 is a schematic structural diagram of an M5 layer in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
FIG. 11 is a schematic diagram of a distribution structure of PADs in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
FIG. 12 is a schematic view of a layer TV1 in a layout structure of a high voltage MIM capacitor according to an embodiment of the present utility model;
fig. 13 is a schematic diagram of a layout structure of a high-voltage MIM capacitor according to an embodiment of the present utility model;
reference numerals illustrate:
AA-substrate;
SP-substrate injection layer;
CT-first via
M1-a first metal grounding protection layer;
v1-a second via;
M2-MIM upper plate;
a third via;
m3-a second metal grounding protection layer;
v3-fourth via holes;
m4-a third metal grounding protection layer;
v4-fifth via;
m5-a fourth metal grounding protection layer;
TV 1-sixth via;
TM 1-fifth metal grounding protective layer;
and opening a window layer by the PA-PAD.
Detailed Description
The high voltage MIM capacitor layout structure, integrated circuit, driver chip, and electronic device of the present utility model will be described in more detail with reference to the accompanying schematic drawings, wherein preferred embodiments of the present utility model are shown, and it should be understood that those skilled in the art can modify the utility model described herein while still achieving the advantageous effects of the utility model. Accordingly, the following description is to be construed as broadly known to those skilled in the art and not as limiting the utility model.
The traditional high-voltage MIM capacitor layout has higher design cost and low stability; the inventor finds that through repeated research experiments: the problem of high cost and unstable performance can be solved by arranging the MIM upper polar plate and the MIM lower polar plate into a circular structure; therefore, a layout structure of the high-voltage MIM capacitor is designed.
The utility model is more particularly described by way of example in the following paragraphs with reference to the drawings. Advantages and features of the utility model will become more apparent from the following description and from the claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the utility model.
Referring to fig. 1-13, according to an embodiment of the present utility model, there is provided a high voltage MIM capacitor layout structure comprising:
MIM upper polar plate M2 and MIM lower polar plate; wherein, the MIM upper plate M2 comprises: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the space positions of the first metal plates;
several grounding protection layers;
a plurality of via structures; the via structures are formed among the MIM upper polar plate M2, the MIM lower polar plate and the grounding protection layers, so that the grounding protection layers are grounded through the corresponding via holes;
the cross sections of the first metal plate and the second metal plate are of a circular structure, and the structure of the high-voltage MIM capacitor layout is shown in figure 1.
The plurality of grounding protection layers are used for grounding protection; the number of the grounding protection layers is not limited, and any number of the protection layers capable of achieving the purpose of the utility model is within the protection scope of the utility model.
The utility model provides a layout structure of a high-voltage MIM capacitor, which is formed by arranging an MIM upper polar plate M2 and an MIM lower polar plate as follows: the cross sections of the first metal plate and the second metal plate are of circular structures; the structural performance of the high-voltage MIM capacitor layout formed by the MIM upper polar plate M2 and the MIM lower polar plate of the circular structure is more stable; and the MIM upper plate M2 comprises: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the first metal plates in space positions, and the arrangement of the metal plates further improves the stability of the capacitor; the high-voltage MIM capacitor layout structure provided by the utility model has lower cost; therefore, the technical scheme provided by the utility model reduces the cost and has more stable performance.
In one embodiment, the plurality of grounding protection layers are sequentially formed in different dielectric layers in the dielectric body along the first direction; wherein the dielectric layers are sequentially formed on different horizontal planes in the dielectric body along the second direction; the second direction is perpendicular to the first direction.
In one embodiment, the plurality of ground protection layers includes: the substrate AA, the substrate injection layer SP, the first via CT, the first metal ground cap layer M1, the second via V1, the third via V2, the second metal ground cap layer M3, the fourth via V3, the third metal ground cap layer M4, the fifth via V4, the fourth metal ground cap layer M5, the sixth via TV1, and the fifth metal ground cap layer TM1 are sequentially arranged along the second direction;
the substrate AA, the substrate injection layer SP, the first via CT, the first metal ground protection layer M1, the second via V1, the MIM top plate M2, the third via V2, the second metal ground protection layer M3, the fourth via V3, the third metal ground protection layer M4, the fifth via V4, the fourth metal ground protection layer M5, the sixth via TV1, and the fifth metal ground protection layer TM1 are sequentially arranged in the corresponding dielectric layers along the second direction; the fifth metal grounding protection layer TM1 comprises a via hole, and the MIM lower electrode plate is formed in the via hole of the fifth metal grounding protection layer TM1;
the metal lead is disposed on the first metal grounding protection layer M1, so that the first metal grounding protection layer M1 passes through the second via hole V1 and is connected to the MIM upper plate M2.
Referring to fig. 1 to 13, fig. 13 is a schematic view of a fifth metal ground protection layer TM1 for convenience of illustration; the rest is other structures of the MIM capacitor;
in one embodiment, the second metal grounding protection layer M3 is provided with a plurality of vias; the cross section of the plurality of through holes is round; the positions and shapes of the plurality of through holes arranged in the second metal grounding protection layer M3 are arranged corresponding to the positions and shapes of the more than two first metal plates on the MIM upper polar plate M2;
the cross sections of the substrate AA, the substrate injection layer SP, the first via CT, the first metal grounding protection layer M1, the second via V1, and the third via V2 are all: "circular"; and a plurality of through holes corresponding to the metal plates in the MIM upper plate M2 and the MIM plate and the second metal grounding protection layer M3 are arranged.
In one embodiment, the profiles of the fourth via V3, the via in the third metal ground cap layer M4, and the fifth via V4 are adapted to the profile of the second metal ground cap layer M3.
In one embodiment, the high voltage MIM capacitor layout structure further comprises:
PAD window layer PA is formed in the dielectric layer between the fourth metal grounding protection layer M5 and the sixth via TV 1.
In one embodiment, the dielectric layer is made of the following materials: a nitride; the dielectric body is made of the following materials: and (3) silicon oxide.
According to an embodiment of the present utility model, there is also provided an integrated circuit including the high voltage MIM capacitor layout structure according to any one of the first aspect of the present utility model.
Next, according to an embodiment of the present utility model, there is also provided a driving chip including the integrated circuit according to the second aspect of the present utility model.
In addition, according to a fourth aspect of the present utility model, there is also provided an electronic device including the driving chip according to the third aspect of the present utility model.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present utility model without departing from the spirit or scope of the utility model. Thus, it is intended that the present utility model also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (10)
1. The utility model provides a high-voltage MIM capacitance territory structure which characterized in that includes:
an MIM upper polar plate and an MIM lower polar plate; wherein, the MIM upper polar plate includes: two or more first metal plates arranged in sequence along a first direction; the MIM lower polar plate comprises more than two second metal plates which are sequentially arranged along the first direction; the second metal plates are arranged in one-to-one correspondence with the space positions of the first metal plates;
several grounding protection layers;
a plurality of via structures; the via structures are formed among the MIM upper electrode plate, the MIM lower electrode plate and the grounding protection layers, so that the grounding protection layers are grounded through the corresponding via structures;
the cross sections of the first metal plate and the second metal plate are of circular structures.
2. The high voltage MIM capacitor layout structure of claim 1 wherein the plurality of ground cap layers are formed sequentially in different ones of the dielectric layers along the first direction; wherein the dielectric layers are sequentially formed on different horizontal planes in the dielectric body along the second direction; the second direction is perpendicular to the first direction.
3. The high voltage MIM capacitor layout structure according to claim 2 wherein the plurality of ground protection layers comprises: the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole, the third via hole, the second metal grounding protection layer, the fourth via hole, the third metal grounding protection layer, the fifth via hole, the fourth metal grounding protection layer, the sixth via hole and the fifth metal grounding protection layer are sequentially arranged along the second direction;
the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole, the MIM upper plate, the third via hole, the second metal grounding protection layer, the fourth via hole, the third metal grounding protection layer, the fifth via hole, the fourth metal grounding protection layer, the sixth via hole and the fifth metal grounding protection layer are sequentially arranged in the corresponding dielectric layers along the second direction; the fifth metal grounding protection layer comprises a via hole, and the MIM lower electrode plate is formed in the via hole in the fifth metal grounding protection layer;
and the first metal grounding protection layer is provided with a metal lead, so that the first metal grounding protection layer passes through the second via hole and is connected to the MIM upper polar plate.
4. The high voltage MIM capacitor layout structure of claim 3 wherein,
a plurality of through holes are formed in the second metal grounding protection layer; the cross section of the plurality of through holes is round; the positions and the shapes of the plurality of through holes arranged in the second metal grounding protective layer are corresponding to the positions and the shapes of the more than two first metal plates on the MIM upper polar plate;
the cross sections of the substrate, the substrate injection layer, the first via hole, the first metal grounding protection layer, the second via hole and the third via hole are all as follows: "circular"; and a plurality of through holes corresponding to the metal plates in the MIM upper plate and the MIM plate and the second metal grounding protection layer.
5. The high voltage MIM capacitor layout structure according to claim 4 wherein the profile of the fourth via, the via in the third metal ground cap layer, and the fifth via is adapted to the profile of the second metal ground cap layer.
6. The high voltage MIM capacitor layout structure according to claim 5 wherein the high voltage MIM capacitor layout structure further comprises:
and the PAD window opening layer is formed in the dielectric layer between the fourth metal grounding protection layer and the sixth via hole.
7. The high voltage MIM capacitor layout structure of claim 6 wherein the dielectric layer comprises: a nitride; the dielectric body is made of the following materials: and (3) silicon oxide.
8. An integrated circuit comprising the high voltage MIM capacitor layout structure of any one of claims 1-7.
9. A driver chip comprising the integrated circuit of claim 8.
10. An electronic device comprising the driver chip of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321392753.2U CN220491884U (en) | 2023-06-02 | 2023-06-02 | High-voltage MIM capacitor layout structure, integrated circuit, driving chip and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321392753.2U CN220491884U (en) | 2023-06-02 | 2023-06-02 | High-voltage MIM capacitor layout structure, integrated circuit, driving chip and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220491884U true CN220491884U (en) | 2024-02-13 |
Family
ID=89826215
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321392753.2U Active CN220491884U (en) | 2023-06-02 | 2023-06-02 | High-voltage MIM capacitor layout structure, integrated circuit, driving chip and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220491884U (en) |
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2023
- 2023-06-02 CN CN202321392753.2U patent/CN220491884U/en active Active
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