CN220457383U

CN220457383U - Digital modulation module, measurement and control system and quantum computer

Info

Publication number: CN220457383U
Application number: CN202320858151.5U
Authority: CN
Inventors: 请求不公布姓名; 孔伟成
Original assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Current assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Priority date: 2023-04-12
Filing date: 2023-04-12
Publication date: 2024-02-06
Anticipated expiration: 2033-04-12

Abstract

The utility model discloses a digital modulation module, a measurement and control system and a quantum computer, wherein the digital modulation module is arranged in refrigeration equipment and comprises a digital signal generation module which is configured to output at least one group of digital signals with preset frequency; a multiplexer configured to selectively output one of the digital signals generated by the digital signal generation module; a calibrator configured to calibrate the digital signal selected for output by the multiplexer as an output signal of the digital modulation module. The digital modulation module and the quantum processor are arranged in the same refrigeration equipment, so that interference input in the transmission process is reduced.

Description

Digital modulation module, measurement and control system and quantum computer

Technical Field

The utility model relates to the technical field of quantum computers, in particular to a digital modulation module, a measurement and control system and a quantum computer.

Background

In quantum computation, a qubit circuit, a transmission line of a measurement and control system connected with the qubit circuit, and the like are extremely sensitive to environmental noise, in particular thermal noise, electromagnetic noise and signal noise. The common method for suppressing thermal noise is to place the quantum chip in a huge dilution refrigerator, attach the quantum chip to the refrigeration source through a gold-plated copper plate to reduce the ambient temperature to about 10mK, and keep excellent thermal contact to take away the heat generated by the quantum chip during operation at any time. The method for suppressing electromagnetic noise is to design a multi-layer complex shielding packaging device around the quantum bit circuit, so that on one hand, interference of the electromagnetic noise of the environment to the operation of the quantum chip is shielded, and on the other hand, crosstalk among different components in the quantum bit circuit is shielded.

The signal noise is troublesome to solve, so that not only is the noise of a quantum computer control system reduced as much as possible, but also a multistage noise reduction component is added for a signal line of a quantum chip, and radiation, noise, thermal power and the like caused by the noise reduction component are considered. It is not an easy matter to reduce the noise of a quantum computer control system, even though the devices are all ideal, and signal fluctuations caused by Johnson-Nyquist noise (thermal fluctuation noise for short) caused by blackbody radiation can enter the quantum chip along with the signal.

In order to reduce noise input, if all the qubit state regulation circuit, the qubit frequency regulation circuit, the qubit state regulation output circuit and the qubit state regulation feedback input control circuit outside the qubit circuit are directly arranged in the refrigeration equipment, the qubit state regulation circuit and the qubit state regulation output circuit all comprise circuits needing to be modulated, the existing modulation circuit is not suitable for the refrigeration equipment, the power consumption of the existing modulation circuit is high, and the whole occupied space is large.

Disclosure of Invention

The utility model aims at: in order to reduce noise input, a digital modulation module, a measurement and control system and a quantum computer are provided

In order to achieve the above object, the present utility model provides the following technical solutions:

an aspect of the present utility model provides a digital modulation module, provided in a refrigeration apparatus, including:

a digital signal generation module configured to output at least one set of digital signals having a preset frequency;

a multiplexer configured to selectively output one of the digital signals generated by the digital signal generation module;

a calibrator configured to calibrate the digital signal selected for output by the multiplexer as an output signal of the digital modulation module.

Optionally, the digital signal generating module includes:

a digitally controlled oscillator configured to output two digital signals having a preset frequency;

a phase modulator configured to directly phase modulate the two digital signals, respectively, in accordance with phase information;

an amplitude modulator configured to modulate the amplitude of two of the digital signals in dependence on amplitude information.

Optionally, the digital signal generating module includes:

a digital signal generator for modulation configured to output a digital signal having a preset frequency;

a first sine and cosine lookup table configured to determine a sine and cosine function value of a corresponding frequency according to a preset frequency of a digital signal generated by the digital signal generator for modulation, and output two digital signals corresponding to the sine and cosine function value;

a phase modulator configured to directly phase modulate the digital signals or modulate the phases of two of the digital signals in accordance with phase information;

Optionally, the input end of the multiplexer is used for receiving the two digital signals subjected to amplitude phase modulation and the amplitude information; the output end is used for outputting two digital signals and/or the amplitude information, the two digital signals are input into the calibrator, and the amplitude information is used as one output signal of the digital modulation module.

Optionally, the number of the digital signal generating modules is a plurality, and the digital signal generating modules are configured to generate frequency signals for a plurality of quantum bits at the same time.

Optionally, the digital modulation module further includes:

and the second sine and cosine lookup table is configured to determine a sine and cosine function value of a corresponding frequency according to the frequency of a selected group of digital signals with preset frequency, output two digital signals corresponding to the sine and cosine function value, and input the two digital signals into the calibrator for calibration output.

A further aspect of the utility model provides an aspect of a measurement and control system, comprising a qubit state regulation circuit disposed in a refrigeration device and connected to a quantum processor in the refrigeration device, configured to regulate quantum state information of the quantum processor; the quantum bit state regulation circuit comprises a first digital modulation module, wherein the first digital modulation module is the digital modulation module comprising a phase modulator and an amplitude modulator, digital signals output by the first digital modulation module are a first digital signal and a second digital signal, and the first digital modulation module is configured to regulate the quantum bit state regulation signal input into the quantum processor;

A measurement signal output circuit configured to obtain a measurement signal for the quantum processor and transmit the measurement signal to the quantum processor;

and the sampling signal reading circuit is configured to process the feedback signal output by the quantum processor to obtain quantum state information of the quantum processor.

Optionally, the qubit state regulation circuit further includes:

a first digital-to-analog conversion module configured to process the first digital signal and the second digital signal into a first analog signal and a second analog signal;

the first signal processing module is configured to perform frequency conversion processing on the first analog signal and the second analog signal according to the working frequency of the qubit and output a qubit state regulation signal which is input to the quantum processor as the qubit state regulation circuit.

Optionally, the measurement signal output circuit includes:

a second digital modulation module configured to output a third digital signal and a fourth digital signal of a predetermined frequency;

a second digital-to-analog conversion module configured to process the third digital signal and the fourth digital signal into a third analog signal and a third analog signal;

And the second signal processing module is configured to perform frequency conversion processing on the third analog signal and the fourth analog signal according to the frequency of the qubit and output a qubit state regulation output signal which is input to the quantum processor as a regulation circuit.

Preferably, the second digital modulation module is the above digital modulation module, the digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust the qubit state adjustment output signal input into the quantum processor.

In a further aspect, the utility model provides a second aspect of a measurement and control system comprising a quantum processor disposed in a refrigeration device and coupled to the refrigeration device

A qubit state conditioning circuit configured to condition quantum state information of the quantum processor;

a measurement signal output circuit configured to obtain a measurement signal for the quantum processor and transmit the measurement signal to the quantum processor; the measuring signal output circuit comprises a second digital modulation module, wherein the second digital modulation module is any digital modulation module, digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust a qubit state regulation output signal input into the quantum processor;

Optionally, the measurement signal output circuit further comprises

Optionally, the qubit state regulation circuit includes:

a first digital modulation module configured to modulate an amplitude and a phase of a digital signal having a preset frequency, outputting a first digital signal and a second digital signal;

the first signal processing module is configured to perform frequency conversion processing on the first analog signal and the second analog signal according to the working frequency of the qubit and output a qubit state regulation signal which is input to the quantum processor as a regulation circuit.

A further aspect of the utility model provides a third aspect of a measurement and control system, comprising a qubit frequency regulation circuit disposed in a refrigeration device and connected to a quantum processor in the refrigeration device, configured to regulate frequency parameters of the quantum processor;

a measurement signal output circuit configured to obtain a measurement signal for a quantum processor and transmit the measurement signal to the quantum processor; the measuring signal output circuit comprises a second digital modulation module, wherein the second digital modulation module is a digital modulation module of different schemes, digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust a qubit state regulation output signal input into the quantum processor;

a sampling signal reading circuit configured to process a feedback signal output by the quantum processor, to obtain quantum state information of the quantum processor.

Optionally, the qubit frequency regulation circuit includes:

a voltage source module configured to output a low frequency collimated current signal;

a pulse source module configured to output a pulse signal;

And a bias unit configured to bias the low-frequency collimated stream signal and the pulse signal and transmit the processed low-frequency collimated stream signal and pulse signal to the quantum processor.

Optionally, the voltage value output by the voltage source module changes in a set positive and negative interval.

Optionally, the measurement signal output circuit further includes:

A further aspect of the present utility model provides a fourth aspect of the measurement and control system, further comprising a qubit state regulation circuit disposed in a refrigeration device and connected to the quantum processor in the refrigeration device, configured to regulate quantum state information of the quantum processor; the quantum bit state regulation and control circuit comprises a first digital modulation module, wherein the first digital modulation module is a digital modulation module comprising a phase modulator and an amplitude modulator, digital signals output by the first digital modulation module are a first digital signal and a second digital signal, and the first digital modulation module is configured to regulate the quantum bit state regulation and control signal input into the quantum processor.

Optionally, the qubit state regulation circuit further includes:

In the above three measurement and control system schemes, the sampling signal reading circuit includes:

an isolation amplifying module configured to isolate an analog signal output by the quantum processor from a back-end module and amplify the analog signal to output;

a third signal processing module configured to down-convert the signal output from the isolation amplifying module;

an analog-to-digital conversion module configured to convert the analog signal after the down-conversion processing by the third signal processing module into a digital signal;

and the digital demodulation module is configured to perform demodulation processing on the digital signal output by the analog-to-digital conversion module and output digital information representing the state of the quantum bit.

Optionally, the isolation amplifying module includes:

a circulator, the first port being connected to an output of the quantum processor, configured for directional transmission of signals at the output of the quantum processor;

and a third amplifier configured to amplify the feedback signal output from the quantum processor.

Optionally, the digital demodulation module includes:

a digital signal generator for demodulation configured to obtain a plurality of sets of digital signals of a preset frequency;

a multiplexer for demodulation for selecting one set of digital signals of a preset frequency;

jie Diaoyong sine and cosine look-up table configured to output fifth and sixth digital signals corresponding to sine and cosine function values according to sine and cosine function values corresponding to a preset frequency of the selected digital signal;

and the IQ demodulator is configured to perform IQ demodulation on the digital signal output by the analog-to-digital conversion module according to the fifth digital signal and the sixth digital signal output by the Jie Diaoyong sine-cosine lookup table to obtain digital information representing the state of the qubit.

In the above three measurement and control system schemes, the control system further includes a memory module configured to send a frequency control word to a corresponding digital modulation module or digital demodulation module, send phase information and amplitude information to a phase modulator and an amplitude modulator, and send sine and cosine values of a corresponding frequency to a sine and cosine lookup table for demodulation.

In the above three measurement and control system schemes, the control system further includes a plurality of attenuator modules configured to attenuate the analog signals input into the quantum processor by the qubit state regulation circuit and the measurement signal output circuit, and the feedback signals output by the quantum processor, respectively.

In the above three measurement and control system schemes, the control system further includes a plurality of filter modules configured to filter out the interference signals input into the quantum processor by the qubit state regulation circuit and the measurement signal output circuit, and the interference signals in the feedback signal output by the quantum processor, respectively.

In the above three measurement and control systems, the qubit state control circuit, the qubit frequency control circuit, the measurement signal output circuit, and the sampling signal reading circuit are integrated on one or more substrates.

In the above three measurement and control systems, the qubit state control circuit, the qubit frequency control circuit, the measurement signal output circuit, and the sampling signal reading circuit are integrated on one or more substrates through a CMOS process.

In a further aspect of the present utility model, a quantum computer is provided, where the control signal and the measurement signal are sent to the quantum processor by using the measurement and control system, and the feedback signal output by the quantum processor is processed.

The utility model has the beneficial effects that:

the digital modulation module uses the multiplexer to select and output, and when the digital modulation module is applied to the quantum bit regulating circuit, the multiplexer can realize the output of digital signals with frequency, phase and amplitude or amplitude signals with amplitude information only, so that the amplitude information is used as a direct current signal, does not need to pass through a calibrator and a signal processing module, and correspondingly outputs special requirements of gate processing operation, and the quantum bit regulating signals after the frequency conversion processing of the first analog signal and the second analog signal are combined, thereby meeting the measurement and control requirements.

The digital modulation module uses the frequency and phase offset required by the digital signal generation module to generate the quantum bits, reduces the number of multipliers and adders, greatly reduces the power consumption, and can determine the phase of the quantum bits, thereby realizing coherent operation, reducing the requirement on a memory module compared with the mode of directly adopting SRAM to store all modulated waveform files, and being more suitable for a low-temperature environment.

The measurement and control system and the quantum computer provided by the application belong to the same utility model conception as the digital modulation module, so that the measurement and control system and the quantum computer have the same beneficial effects and are not repeated here.

Drawings

Fig. 1 is a schematic structural diagram of a digital modulation module according to embodiment 1 of the present utility model;

FIG. 2 is a diagram of embodiment 2 of the present utility model a schematic structure of the digital modulation module;

fig. 3 is a schematic structural diagram of a digital modulation module according to embodiment 3 of the present utility model;

fig. 4 is a schematic structural diagram of a digital modulation module according to embodiment 4 of the present utility model;

fig. 5 is a schematic structural diagram of a digital modulation module according to embodiment 5 of the present utility model;

FIG. 6 is a schematic structural diagram of one embodiment of the measurement and control system according to the present utility model.

Fig. 7 is a schematic diagram of a structure of a qubit state control circuit for processing a digital signal with a set frequency according to the present utility model.

Fig. 8 is a schematic diagram of a structure of the qubit state control circuit provided by the utility model for processing amplitude information output by an amplitude modulator.

Fig. 9 is a schematic diagram of a structure of a qubit frequency control circuit according to the present utility model.

Fig. 10 is a schematic structural diagram of a qubit state control reading circuit provided by the utility model.

Fig. 11 is a schematic structural diagram of a digital demodulation module in the qubit state adjustment and control reading circuit provided by the utility model.

In the reference numerals:

111. digital control an oscillator; 112. a phase modulator; 113. an amplitude modulator; 114. a first sine and cosine lookup table; 115. a first multiplexer; 116. a calibrator; 121. a digital signal generator for modulation; 124. a second sine and cosine lookup table; 125. a second multiplexer;

10. a qubit state regulation circuit; 101. a first digital modulation module; 102. a first digital-to-analog conversion module; 103. a first signal processing module; 104. a first memory module; 105. a first amplifier module; 106. a first attenuator module; 107. a first filter module;

20. a qubit frequency regulation circuit; 201. a voltage source module; 202. a pulse source module; 203. a biaser; 2021. a pulse generator; 2022. a DAC converter;

30. a measurement signal output circuit; 301. a second digital modulation module; 302. a second digital-to-analog conversion module; 303. a second signal processing module; 304. a second memory module; 305. a second amplifier module; 306. a second attenuator module; 307. a second filter module;

40. a sampling signal reading circuit; 401. an isolation amplifying module; 402. a third signal processing module; 403. an analog-to-digital conversion module; 404. a digital demodulation module; 405. a third memory module; 406. a third attenuator module; 407. a third filter module; 408. a third amplifier module; 4041. a demodulation digital signal generator; 4042. a demultiplexer; 4043. jie Diaoyong sine and cosine look-up tables; 4044. an IQ demodulator;

50. A transmission line; 60. a quantum processor; 70. and an upper computer.

Detailed Description

In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application. The embodiments described below by referring to the drawings are exemplary only for the purpose of illustrating the present application and are not to be construed as limiting the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

In order to reduce interference of the measurement and control system to the input signal of the quantum processor 60, the embodiment of the application discloses a digital modulation module, which is arranged in a refrigeration device and comprises:

a calibrator 116 configured to calibrate the digital signal selected for output by the multiplexer as an output signal of the digital modulation module.

The digital modulation module specifically comprises the following five embodiments:

example 1

As shown in fig. 1: in the present application, the digital signal generation module includes:

the digitally controlled oscillator 111 is configured to output two digital signals with a preset frequency, in this embodiment, the digitally controlled oscillator 111 internally includes a variable mode counter and a lookup table, wherein the variable mode counter calculates an address required by the lookup table to retrieve data from an external memory module according to a frequency control word, and the lookup table outputs two digital signals with the preset frequency and in quadrature according to corresponding addresses that are continuous in phase.

A phase modulator 112 configured to output two digital signals having a preset frequency; specifically, in the phase modulator 112 of the present embodiment, the two digital signals are added to the phase information by corresponding adders, respectively, and two digital signals after phase modulation are output;

an amplitude modulator 113 configured to modulate the amplitude of the two-way digital signal subjected to phase modulation in accordance with the amplitude information; specifically, in the amplitude modulator 113, the first digital signal and the second digital signal after being phase modulated are multiplied by the amplitude information through corresponding multipliers, respectively, to finally obtain two paths of digital signals after being both amplitude and phase modulated.

The digitally controlled oscillator 111 produces the frequency and phase offset required by the quantum processor 60, reduces the number of multipliers and adders, greatly reduces power consumption, and the digitally controlled oscillator 111 can determine the phase of the qubits to achieve coherent operation, reduces the requirements on external memory modules relative to storing all modulated waveform files directly with SRAM, and is more suitable for low temperature environments. The phase modulator 112 and the amplitude modulator 113 are capable of satisfying pulse variability for qubits. In this embodiment the phase modulation is 10 bits and the envelope modulation is 8 bits.

The multiplexer is a first multiplexer 115 in this embodiment, and an input end of the first multiplexer 115 is configured to receive two paths of digital signals after amplitude phase modulation and the amplitude information; the output terminal of the first multiplexer 115 is configured to output two paths of the digital signals or the amplitude information. The first multiplexer 115 is used to realize 1-2 selection of digital signals and amplitude information, when the digital signals are selected, the digital signals pass through the digital-to-analog conversion module and the signal processing module, one path of the digital signals is output as a qubit state regulating signal input to the quantum processor 60 by the regulating circuit, and the other path of the digital signals is input to the measuring signal of the quantum processor 60, and the measuring signal can select the functions of not using the amplitude information and the phase information in the scheme. When the amplitude information is selected as the amplitude information of the direct current signal, the amplitude information outputs an amplitude analog signal through the digital-to-analog conversion module, the amplitude analog signal can be used as a qubit state regulation signal which is input into the quantum processor 60 by the other path of the skip high circuit without passing through the signal processing module, and the signal meets the requirements of special gate processing operation in the quantum controller, such as executing qubit frequency regulation of a single-bit gate or a two-bit gate; it should be noted that the amplitude modulator 113 may be an arbitrary waveform generator, and the use of the first multiplexer 115 may be used to detect whether the envelope signal generated by the arbitrary waveform generator meets the requirements.

The calibrator 116 is configured to calibrate the two digital signals output by the first multiplexer 115. Because the electronic components of the IQ modulator of the signal processing module at the rear end of the digital modulation module are not in a perfect ideal state, the amplitude phase of the input two paths of digital signals can generate unbalance and/or generate DC offset, the unbalance can generate mirror image components, and the offset can affect the accuracy of the signals, the calibrator 116 is arranged to calibrate the two paths of digital signals. Illustratively, when the calibrator 116 calibrates the signal by the effect of image rejection, the calibrator 116 is configured with the set parameters in the current state; as a further example, when the calibrator 116 calibrates the signal by calibrating the DC offset, the calibrator 116 may correct the DC imbalance and remove unwanted sideband tones, and in particular, may obtain a DC offset value between two digital signals, and by obtaining the offset value multiple times, the calibrator 116 sets the calibration value to achieve calibration of the DC offset.

The number of the digital modulation modules can be a plurality of, and is illustratively consistent with the number of the quantum bits, so that frequency signals for a plurality of the quantum bits can be generated at the same time, thereby having rich frequency multiplexing expansibility.

Example 2

As shown in fig. 2, the difference from embodiment 1 is that the amplitude modulation is performed first, and then the phase modulation is performed, and detailed processes are not repeated.

Example 3

As shown in fig. 3, the digital modulation module includes:

a digital signal generator 121 for modulation configured to output a digital signal having a preset frequency;

a first sine and cosine lookup table 114 configured to determine a sine and cosine function value of a corresponding frequency according to a preset frequency of the digital signal generated by the digital signal generator 121 for modulation, and outputs two digital signals corresponding to the sine and cosine function values; the sine and cosine lookup table retrieves data from the external memory module, and when the modulation digital signal generator 121 sends a lookup address to the first sine and cosine lookup table 114, the sine and cosine lookup table checks whether a corresponding sine value or a corresponding cosine value is stored at the current lookup address in the external memory module, when the corresponding sine value or the corresponding cosine value is stored, the stored current sine value and current cosine value are output to respectively form two paths of digital signals with preset frequency, and when the corresponding sine value or the corresponding cosine value is not stored, the corresponding sine value or the corresponding cosine value is calculated according to the periodicity of the sine value or the cosine value, the calculated current sine value and the calculated current cosine value are output to respectively form two paths of digital signals with preset frequency.

The phase modulator 112 and the amplitude modulator 113 are the same as those in embodiment 1, and will not be described here.

The combined action effect of the modulation digital signal generator 121 and the first sine and cosine lookup table 114 is the same as that of the digitally controlled oscillator 111 in embodiment 1, and will not be described here again.

The function and function of the multiplexer and calibrator 116 are the same as those of embodiment 1, and will not be described again.

Example 4

As shown in fig. 4, the difference from embodiment 3 is that the amplitude modulation is performed first, and then the phase modulation is performed, and detailed processes are not repeated.

Example 5

As shown in fig. 5, the digital signal generating module includes a plurality of digitally controlled oscillators 111, and outputs a plurality of sets of digital signals with preset frequencies, which are consistent with the number of qubits in the example, so that frequency signals for a plurality of qubits can be generated at the same time, thereby having abundant frequency multiplexing expansibility. The multiplexer is a second multiplexer 125, and the second multiplexer 125 selects one of the digital signals with a preset frequency to output, in this embodiment, the multiplexer selects n×1, where N is the number of input paths and 1 is the number of output paths. The digital modulation module further includes a second sine and cosine lookup table 124 configured to determine a sine and cosine function value of a corresponding frequency according to a frequency of a selected set of digital signals having a preset frequency, and output two digital signals corresponding to the sine and cosine function value, and the two digital signals are input to the calibrator 116 for calibration output. The effect of the calibrator 116 is the same as that of embodiment 1, and will not be described again.

The digital modulation modules in the above five embodiments may be used in a measurement and control system all disposed in a refrigeration apparatus, as shown in fig. 6, where the measurement and control system includes:

the qubit state regulation and control circuit 10 is used for carrying out quantum state information regulation and control on the quantum processor 60;

the qubit frequency regulation circuit 20 is used for regulating and controlling frequency parameters of the quantum processor 60;

a measurement signal output circuit 30 configured to obtain a measurement signal for the quantum processor 60 and transmit the measurement signal to the quantum processor 60;

a sampling signal reading circuit 40 configured to process the feedback signal output by the quantum processor 60 to obtain quantum state information of the quantum processor 60.

The measurement signal output circuit 30 and the sampling signal reading circuit 40 form a qubit state regulation and reading circuit, and the qubit state regulation and reading circuit, the qubit frequency regulation and reading circuit and the qubit state regulation and reading circuit are integrated on one or more substrates according to the different schemes, specifically, integrated on one or more substrates through a CMOS process.

It should be noted that the measurement and control system further includes another technical solution, for example, only including the qubit state adjusting circuit 10 and the qubit state adjusting and reading circuit, or only including the qubit frequency adjusting circuit 20 and the qubit state adjusting and reading circuit, or only including the qubit state adjusting and reading circuit. According to the above different schemes, the measurement and control system is integrated on one or more substrates according to the CMOS process. Because different combination modes exist, the application describes each circuit respectively, and the technical scheme can form different measurement and control systems according to the combination.

In all the embodiments of this application, the refrigeration apparatus is a dilution refrigerator, and it should be noted that the refrigeration apparatus is not limited to the dilution refrigerator in practical use.

Quantum bit state control circuit 10

As shown in fig. 7, in order to reduce the interference of the qubit state regulating circuit 10 in the measurement and control system to the input signal of the quantum processor 60, the qubit state regulating circuit 10 includes:

a first digital modulation module 101, where the first digital modulation module 101 is any one of the digital modulation modules in embodiments 1 to 4, and the digital signals output by the first digital modulation module 101 are a first digital signal and a second digital signal, and the first digital modulation module 101 is configured to adjust a qubit state regulation signal input into the quantum processor 60; the first digital signal and the second digital signal are orthogonal signals; the first digital modulation module 101 adopts DDS technology, directly synthesizes the required waveforms from the phase concept, the method has the advantages of high frequency precision, short conversion time, high frequency spectrum purity, easy programming of frequency phase, and the same frequency stability of output as the system.

The first digital-to-analog conversion block 102, configured to process the first and second digital signals into first and second analog signals;

A first signal processing module 103 configured to perform frequency conversion processing on the first analog signal and the second analog signal in accordance with an operating frequency of a qubit and output a qubit state regulation signal input to the quantum processor 60 as the qubit state regulation circuit 10.

The qubit state regulation circuit 10 further includes a first memory module 104 communicatively coupled to the first digital modulation module 101 and configured to store frequency control words, amplitude information, and phase information. The first memory module 104 may be a memory unit inside the first digital modulation module 101, or may be a separate memory module outside the first digital modulation module 101.

In an alternative, the first amplifier module 105 is disposed before and/or at the rear end of the first signal processing module 103, the first amplifier module 105 disposed at the front end is a VGA (variable gain amplifier) amplifier, and the first amplifier module 105 disposed at the rear end is a first driving amplifier. In one of the embodiments, the front end of the signal processor is provided with a VGA amplifier (not shown in the figure), and the rear end is provided with a driving amplifier. The VGA amplifier amplifies the analog signal and then performs IQ modulation, and in another scheme, as shown in fig. 7, a driving amplifier is disposed at the rear end of the first signal processing module 103.

In an alternative, the conditioning circuit further comprises a first attenuator module 106, the first attenuator module 106 being configured to attenuate the signal input by the conditioning circuit to the quantum processor 60. The first attenuator module 106 can realize the function of precisely controlling the signal amplitude and noise, and the first attenuator module 106 and the first amplifier module 105 are combined to play the function of correcting signals.

In an alternative, the regulating circuit further comprises a first filter module 107, and the first filter module 107 is configured to filter out an interference signal input to the quantum processor 60 by the regulating circuit. The first filter module 107 may filter out unwanted tones/harmonics in the signal input to the quantum processor 60.

The qubit state regulating circuit 10 in the application is used as a frame circuit support in an extremely low temperature environment, so that the power consumption can be reduced as much as possible, the occupied space in refrigeration equipment is reduced, and in addition, the qubit state regulating circuit 10 and the quantum processor 60 are both positioned in the refrigeration equipment, so that the transmission line 50 is shortened, the great change of the environmental temperature is avoided, the noise input is reduced, and the data controllability is improved.

As shown in fig. 1-8, the qubit state control circuit 10 operates as follows:

The upper computer 70 converts the task of the user into transmissible information, and sends a signal corresponding to the task information to the first memory module 104 in the vector sub-control system and in the vector sub-control system through the transmission line 50; the signal comprises a frequency control word, amplitude information, phase information and calibration information;

the digital signal generator in the digital modulation module obtains a frequency control word, outputs a digital signal with a set frequency, and then outputs a first digital signal and a second digital signal which form the preset frequency and are orthogonal through a sine and cosine lookup table or directly through the digital control oscillator 111;

the phase modulator 112 and the amplitude modulator 113 perform phase modulation and amplitude modulation on the first digital signal and the second digital signal, and finally form digital signals with modulated amplitude and phase which can be output, the modulated digital signals and the amplitude signals output by the amplitude modulator 113 are selected by a multiplexer, the first digital signal and the second digital signal can be selectively output and simultaneously selected, and the amplitude signals of the amplitude modulator 113 can also be selectively output. As shown in fig. 7, when the first digital signal and the second digital signal are selected, the two digital signals enter the calibrator 116 to calibrate, and finally output to the first digital-to-analog conversion module 102 to perform digital-to-analog conversion, and then IQ-modulated by the first signal processing module 103 to obtain a modulated signal. As shown in fig. 8, when the amplitude signal is selected, the amplitude signal is outputted as a direct current signal through the first digital-to-analog conversion module 102 as a corresponding amplitude digital signal. The amplitude digital signal and the modulated signal are processed by the first amplifier module 105, the first attenuator module 106 and the first filter module 107, so that noise input to the quantum processor 60 is reduced, and the input qubit state regulation signal is optimized.

Qubit frequency regulation circuit 20

As shown in fig. 9, the qubit frequency regulation circuit 20 includes:

a voltage source module 201 configured to provide a low frequency collimated stream signal to the vector sub-processor 60, the low frequency collimated stream signal adjusting the operating frequency of the qubit for the qubit to perform a single bit gate operation;

a pulse source module 202 configured to provide a pulse signal to the vector sub-processor 60, the pulse signal adjusting an operating frequency of the qubit for the qubit to perform a two-bit gate operation.

A biaser 203 configured to inject the low frequency collimated stream signal and the pulse signal into the vector sub-processor 60.

The pulse source module 202 includes a pulse generator 2021 and a DAC converter 2022 connected, and the DAC converter 2022 converts the pulse signal generated by the pulse generator 2021 into an analog signal. Specifically, the number of pulse source modules 202 is 3m+1, where m is the number of qubits.

Measurement signal output circuit 30

As shown in fig. 9, the measurement signal output circuit 30 includes:

a second digital modulation module 301 configured to adjust a qubit state manipulation output signal input into the quantum processor 60; the second digital modulation module 301 is the digital modulation module described in embodiments 1-5, and the output digital signals are the third digital signal and the fourth digital signal, and it should be noted that when the second digital modulation module 301 uses the schemes of embodiments 1-4, the phase modulator 112 and the amplitude modulator 113 may not be applied or used without affecting the waveforms.

A second digital-to-analog conversion module 302 configured to process the third digital signal and the fourth digital signal into a third analog signal and a third analog signal;

a second signal processing module 303 configured to perform frequency conversion processing on the third analog signal and the fourth analog signal according to the frequency of the qubit and output a qubit state regulation output signal input as a regulation circuit to the quantum processor 60. The second signal processing module 303 is an IQ modulator.

The measurement signal output circuit 30 further comprises a second memory module 304 communicatively connected to the second digital modulation module 301, which is configured to store frequency control words, the second memory module 304 being either a memory unit inside the second digital modulation module 301 or a separate memory module outside the second digital modulation module 301.

In an alternative, the second amplifier module 305 is disposed before and/or at the rear end of the second signal processing module 303, the second amplifier module 305 disposed at the front end is a VGA (variable gain amplifier) amplifier, and the second amplifier module 305 disposed at the rear end is a second driving amplifier. In one of the embodiments, the front end of the signal processor is provided with a VGA amplifier (not shown in the figure), and the rear end is provided with a driving amplifier. The VGA amplifier amplifies the analog signal and then performs IQ modulation, and in another scheme, as shown in fig. 9, a driving amplifier is disposed at the rear end of the second signal processing module 303.

In an alternative, the conditioning circuit further comprises a second attenuator module 306, the second attenuator module 306 being configured to attenuate the signal input by the conditioning circuit to the quantum processor 60. The second attenuator module 306 can precisely control the signal amplitude and noise, and the second attenuator module 306 and the second amplifier module 305 are combined to correct the signal.

In an alternative, the regulating circuit further comprises a second filter module 307, and the second filter module 307 is configured to filter out the interference signal input to the quantum processor 60 by the regulating circuit. The second filter module 307 may filter out unwanted tones/harmonics in the signal input to the quantum processor 60.

In this application, the measurement signal output circuit 30 is supported as a frame circuit in an extremely low temperature environment, so that power consumption can be reduced as much as possible, and the space occupied in the refrigeration equipment is reduced, and in addition, the measurement signal output circuit 30 and the quantum processor 60 are both located in the refrigeration equipment, so that the transmission line 50 is shortened, and the great change of the ambient temperature is avoided, thereby reducing noise input and improving the controllability of data.

Sampling signal reading circuit 40

As shown in fig. 10, the sampling signal reading circuit 40 includes:

an isolation amplifying module 401 configured to isolate an analog signal output from the quantum processor 60 from a back-end module and amplify the analog signal to output;

a third signal processing module 402 configured to down-convert the signal output from the isolation amplifying module 401;

an analog-to-digital conversion module 403 configured to convert the analog signal after the down-conversion processing by the third signal processing module 402 into a digital signal;

a digital demodulation module 404 configured to perform demodulation processing on the digital signal output from the analog-to-digital conversion module 403 and output digital information representing the state of the qubit.

The isolation amplifying module 401 includes:

a circulator, the first port being connected to an output of the quantum processor 60, configured for directional transmission of signals at the output of the quantum processor 60; the isolating effect can be realized by the directional transmission function of the circulator.

And a third amplifier configured to amplify the feedback signal output from the quantum processor 60. In this embodiment, the third amplifier includes a josephson junction parametric amplifier and a gallium nitride high electron mobility transistor HEMT, which are disposed at two ports of the circulator, and the other port of the circulator receives the sampling signal output by the quantum processor 60, and an output terminal of the gallium nitride high electron mobility transistor HEMT is used as an output terminal of the isolation amplifying module 401.

As shown in fig. 11, the digital demodulation module 404 includes:

a demodulation digital signal generator 4041 configured to obtain a plurality of sets of digital signals of a preset frequency; the number of the digital signals that the demodulation digital signal generator 4041 can output is the same as the number of the digital modulation modules in the second digital modulation module 301, and the preset frequency corresponds to the preset frequency of all the digital signals that the second digital modulation module 301 can output.

A demodulation multiplexer 4042 for selecting one set of digital signals of a predetermined frequency;

jie Diaoyong sine and cosine look-up table 4043 configured to output fifth and sixth digital signals corresponding to the sine and cosine function values according to the sine and cosine function value corresponding to the preset frequency of the selected digital signal;

an IQ demodulator 4044 configured to IQ demodulate the digital signal output by the analog-to-digital conversion module 403 according to the fifth digital signal and the sixth digital signal output by the Jie Diaoyong sine and cosine lookup table 4043, so as to obtain digital information representing the state of the qubit.

The sampled signal read circuit 40 further comprises a third memory module 405 communicatively coupled to the digital demodulation module 404, the third memory module 405 being configured to store a frequency control word, the third memory module 405 may be a memory unit inside the digital demodulation module 404 or may be a separate memory module outside the digital demodulation module 404.

In an alternative, the sampling signal reading circuit 40 further comprises a third attenuator module 406, the third attenuator module 406 being configured to attenuate the signal output by the quantum processor 60 to the sampling signal reading circuit 40. The third attenuator module 406 may perform the function of accurately outputting signal amplitude and noise, and the third attenuator module 406 in combination with the third amplifier module 408 may perform the function of correcting signals.

In an alternative, the sampling read circuit further includes a third filter module 407, and the third filter module 407 is configured to filter out the interference signal output by the quantum processor 60 to the sampling signal read circuit 40. The third filter block 407 may filter out unwanted tones/harmonics in the signal output by the quantum processor 60.

Based on the same application concept, the embodiment of the application also provides a quantum computer, the quantum computer is connected with the upper computer 70 through the transmission line 50, the upper computer 70 firstly receives the quantum computing task of the user through explanation, processes the quantum computing task and forms a quantum circuit, and then maps the quantum circuit into the topological structure of the corresponding quantum processor 60. The quantum circuit comprises a quantum logic gate required by the quantum computing task, measurement operation of a final quantum computing result and time sequences of the operations, and when the measurement and control system receives the information contained in the quantum circuit, the measurement and control system converts the information into corresponding instructions so that corresponding hardware equipment operates and completes the quantum computing task.

In the description of the present specification, reference to the term "some embodiments" or "examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.

The foregoing is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the utility model without departing from the scope of the technical solution of the utility model, and the technical solution of the utility model is not departing from the scope of the utility model.

Claims

1. A digital modulation module, disposed in a refrigeration appliance, comprising:

2. The digital modulation module of claim 1, wherein the digital signal generation module comprises:

3. The digital modulation module of claim 1, wherein the digital signal generation module comprises:

4. The digital modulation module of claim 2, wherein the multiplexer has an input for receiving the two digital signals amplitude phase modulated and the amplitude information; the output end is used for outputting two digital signals and/or the amplitude information, the two digital signals are input into the calibrator, and the amplitude information is used as one output signal of the digital modulation module.

5. A digital modulation module according to claim 3, wherein the multiplexer has an input for receiving two digital signals subjected to amplitude phase modulation and the amplitude information; the output end is used for outputting two digital signals and/or the amplitude information, the two digital signals are input into the calibrator, and the amplitude information is used as one output signal of the digital modulation module.

6. The digital modulation module of claim 5, wherein the number of digital signal generation modules is a plurality configured to generate frequency signals for a plurality of qubits at a same time.

7. The digital modulation module of claim 6, wherein the digital modulation module further comprises:

8. A measurement and control system, comprising a qubit state regulation circuit arranged in a refrigeration device and connected with a quantum processor in the refrigeration device, wherein the qubit state regulation circuit is configured to regulate quantum state information of the quantum processor; the qubit state regulation circuit comprises a first digital modulation module, wherein the first digital modulation module is the digital modulation module of any one of claims 2-5, digital signals output by the first digital modulation module are a first digital signal and a second digital signal, and the first digital modulation module is configured to regulate the qubit state regulation signal input into the quantum processor;

9. The measurement and control system of claim 8, wherein the measurement signal output circuit comprises:

10. The measurement and control system of claim 8, wherein the qubit state regulation circuit further comprises:

11. The measurement and control system of claim 9, wherein the second digital modulation module is a digital modulation module according to any one of claims 1-7, the digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust a qubit state regulation output signal input into the quantum processor.

12. The measurement and control system of claim 9, wherein the measurement signal output circuit comprises:

13. The measurement and control system of claim 12, wherein the second digital modulation module is a digital modulation module of any one of claims 1-7, the digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust the qubit state-regulated output signal input into the quantum processor.

14. The measurement and control system of claim 8, wherein the sampling signal reading circuit comprises:

15. The measurement and control system of claim 14, wherein the isolation amplification module comprises:

16. The measurement and control system of claim 14, wherein the digital demodulation module comprises:

17. The measurement and control system of claim 8, further comprising a memory module configured to send a frequency control word into a corresponding digital modulation module or digital demodulation module, to send phase information and amplitude information into a phase modulator and amplitude modulator, and to send sine and cosine values of a corresponding frequency into a demodulation sine and cosine look-up table.

18. The measurement and control system of claim 8, further comprising a plurality of attenuator modules configured to attenuate the qubit state regulation circuit, the analog signal input into the quantum processor by the measurement signal output circuit, and the feedback signal output by the quantum processor, respectively.

19. The measurement and control system of claim 8, further comprising a plurality of filter modules configured to filter out interfering signals from the qubit state regulation circuit, the interfering signals input into the quantum processor by the measurement signal output circuit, and the feedback signals output by the quantum processor, respectively.

20. The measurement and control system of claim 8, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, the sampling signal reading circuit are integrated on one or more substrates.

21. The measurement and control system of claim 17, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, and the sampling signal reading circuit are integrated on one or more substrates via a CMOS process.

22. A measurement and control system is characterized by comprising a quantum processor which is arranged in refrigeration equipment and connected with the refrigeration equipment

a measurement signal output circuit configured to obtain a measurement signal for the quantum processor and transmit the measurement signal to the quantum processor; the measurement signal output circuit comprises a second digital modulation module, wherein the second digital modulation module is the digital modulation module of any one of claims 1-6, digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust a qubit state regulation output signal input into the quantum processor;

23. The measurement and control system of claim 22, wherein the measurement signal output circuit further comprises

24. The measurement and control system of claim 23, wherein the qubit state regulation circuit comprises:

25. The measurement and control system of claim 22, wherein the sampling signal reading circuit comprises:

26. The measurement and control system of claim 25, wherein the isolation amplification module comprises:

27. The measurement and control system of claim 25, wherein the digital demodulation module comprises:

28. The measurement and control system of claim 22, further comprising a memory module configured to send a frequency control word into a corresponding digital modulation module or digital demodulation module, to send phase information and amplitude information into a phase modulator and amplitude modulator, and to send sine and cosine values of a corresponding frequency into a demodulation sine and cosine look-up table.

29. The measurement and control system of claim 22, further comprising a plurality of attenuator modules configured to attenuate the qubit state regulation circuit, the analog signal input into the quantum processor by the measurement signal output circuit, and the feedback signal output by the quantum processor, respectively.

30. The measurement and control system of claim 22, further comprising a plurality of filter modules configured to filter out interfering signals from the qubit state regulation circuit, the interfering signals input into the quantum processor by the measurement signal output circuit, and the feedback signals output by the quantum processor, respectively.

31. The measurement and control system of claim 22, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, the sampling signal reading circuit are integrated on one or more substrates.

32. The measurement and control system of claim 31, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, and the sampling signal reading circuit are integrated on one or more substrates via a CMOS process.

33. A measurement and control system is characterized by comprising a quantum processor which is arranged in refrigeration equipment and connected with the refrigeration equipment

A qubit frequency regulation circuit configured to regulate a frequency parameter of the quantum processor;

a measurement signal output circuit configured to obtain a measurement signal for a quantum processor and transmit the measurement signal to the quantum processor; the measurement signal output circuit comprises a second digital modulation module, wherein the second digital modulation module is the digital modulation module of any one of claims 1-6, digital signals output by the second digital modulation module are a third digital signal and a fourth digital signal, and the second digital modulation module is configured to adjust a qubit state regulation output signal input into the quantum processor;

34. The measurement and control system of claim 33, wherein the qubit frequency regulation circuit comprises:

A pulse source module configured to output a pulse signal;

the bias means is provided with a pair of biasing means, configured to bias the low frequency collimated stream signal and the pulse signal, and processing the low frequency collimated stream signal and transmitting a pulse signal to the quantum processor.

35. The measurement and control system of claim 34, wherein the voltage value output by the voltage source module varies within a set positive and negative interval.

36. The measurement and control system of claim 33, it is characterized in that the method comprises the steps of, the measuring signal the output circuit further includes:

second digital-to-analog conversion the number of modules to be connected to each other is the same, configured to convert the third digital signal and the fourth digital signal the digital signal is processed into a third analog signal and a third analog signal;

second one Signal signal the processing module is used for processing the processed data, which is configured to convert the third and fourth analog signals in dependence on the frequency of the qubit and processing and outputting a qubit state regulation output signal which is input to the quantum processor as a regulation circuit.

37. The measurement and control system of claim 33, wherein, the device also comprises a qubit state regulating circuit which is arranged in the refrigeration equipment and is connected with the quantum processor in the refrigeration equipment, the quantum processor is configured to regulate quantum state information of the quantum processor; the qubit state regulation circuit comprises a first digital modulation module, wherein the first digital modulation module is the digital modulation module of any one of claims 2-4, digital signals output by the first digital modulation module are a first digital signal and a second digital signal, and the first digital modulation module is configured to regulate the qubit state regulation signal input into the quantum processor.

38. The measurement and control system of claim 37, wherein the qubit state regulation circuit further comprises:

39. The measurement and control system of claim 33, wherein the sampling signal reading circuit comprises:

40. The measurement and control system of claim 39, wherein the isolation amplification module comprises:

41. The measurement and control system of claim 39, wherein the digital demodulation module comprises:

a multiplexer for use in the demodulation, a digital signal for selecting one of a set of preset frequencies;

an IQ demodulator configured to IQ demodulate the digital signal output by the analog-to-digital conversion module according to the fifth digital signal and the sixth digital signal output by the Jie Diaoyong sine-cosine lookup table, digital information characterizing the state of the qubit is obtained.

42. The measurement and control system of claim 33, further comprising a memory module configured to send a frequency control word into a corresponding digital modulation module or digital demodulation module, to send phase information and amplitude information into a phase modulator and amplitude modulator, and to send sine and cosine values of a corresponding frequency into a demodulation sine and cosine look-up table.

43. The measurement and control system of claim 37, wherein the control system further comprises a plurality of attenuator modules, which is configured to attenuate an analog signal input into the quantum processor by the qubit state regulation circuit, the measurement signal output circuit, and a feedback signal output by the quantum processor, respectively.

44. The measurement and control system of claim 33, wherein the control system further comprises a plurality of filter modules configured to filter out interfering signals from the qubit state regulation circuit, the measuring signal output circuit, and the feedback signal output by the quantum processor, respectively.

45. The measurement and control system of claim 44, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, the sampling signal reading circuit are integrated on one or more substrates.

46. The measurement and control system of claim 45, wherein the qubit state regulation circuit, the qubit frequency regulation circuit, the measurement signal output circuit, and the sampling signal reading circuit are integrated on one or more substrates via a CMOS process.

47. A quantum computer, wherein control signals and measurement signals are sent to the quantum processor using the measurement and control system of any one of claims 8-46, and feedback signals output by the quantum processor are processed.