CN220402000U - Duty ratio adjusting module and circuit capable of adjusting LED brightness - Google Patents
Duty ratio adjusting module and circuit capable of adjusting LED brightness Download PDFInfo
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- CN220402000U CN220402000U CN202321541313.9U CN202321541313U CN220402000U CN 220402000 U CN220402000 U CN 220402000U CN 202321541313 U CN202321541313 U CN 202321541313U CN 220402000 U CN220402000 U CN 220402000U
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Abstract
The utility model provides a duty ratio adjusting module and a circuit capable of adjusting LED brightness. Wherein, the duty cycle adjustment module includes: a data conversion unit for converting an input analog signal into a digital signal; an encoding unit for encoding the digital signal into a control signal; a clock unit for outputting a clock signal group including two kinds of clock signals; a counting unit for generating a count value group including two count values according to the control signal and the clock signal group; a comparison output unit for generating a duty cycle signal according to the count value group; the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit, so that the technical scheme that different duty ratio signals can be output simply by inputting different analog signals is realized.
Description
Technical Field
The utility model relates to the technical field of LED illumination, in particular to a duty ratio adjusting module and a circuit capable of adjusting LED brightness.
Background
In a typical LED lighting system, the portion of the power supply is typically accomplished by a battery. In some standby lighting or emergency lighting systems, in order to maximize the system operating time or reduce the cost of the system battery, the application requirements of different current value outputs such as 100% -0% are generated.
In order to achieve the above purpose, the existing solution is to add an MCU control unit to change the current value of the steady state operation of the LED according to an internally compiled program. However, the MCU chip in the MCU control unit is expensive, and in order to cooperate with the MCU chip, the logic control inside the lighting system becomes complex, increasing the cost of the system scheme, and also increasing the design complexity of the PCB.
Thus, there is a need for a low cost and simpler integrated solution for PCB design to facilitate mass production and inventory for end customers.
Disclosure of Invention
In order to solve the technical problems, the utility model provides a duty ratio adjusting module and a circuit capable of adjusting the brightness of an LED, and the structure of the duty ratio adjusting module is simplified, so that an integration scheme with low cost and simpler PCB design is realized.
The utility model provides a duty cycle adjustment module, comprising:
a data conversion unit for converting an input analog signal into a digital signal;
an encoding unit for encoding the digital signal into a control signal;
a clock unit for outputting a clock signal group including two kinds of clock signals;
a counting unit for generating a count value group including two count values according to the control signal and the clock signal group;
a comparison output unit for generating a duty cycle signal according to the count value group;
the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit.
Further, the clock unit comprises a first clock generator and a second clock generator;
the counting unit comprises a first counter and a second counter;
the output end of the first clock generator is coupled with the clock input end of the first counter;
the output end of the second clock generator is coupled with the clock input end of the second counter;
the output end of the first counter is coupled with the first input end of the comparison output unit;
the output end of the second counter is coupled with the second input end of the comparison output unit;
the control end of the second counter is coupled with the coding unit;
the output end of the comparison output unit is used for outputting the duty ratio signal.
Further, the data conversion unit adopts an analog-to-digital converter.
Further, the encoding unit adopts an encoder.
Further, the comparison output unit adopts a digital comparator.
The application also provides a circuit capable of adjusting the brightness of the LED, which comprises an adjusting resistor, an IV conversion module, a duty ratio adjusting module, an LED driving module and an MOS tube;
the adjusting resistor is coupled with the IV conversion module;
the IV conversion module is coupled with the duty ratio adjustment module;
the duty ratio adjustment module is coupled with the LED driving module;
the LED driving module is coupled with the MOS tube;
the duty cycle adjustment module includes:
a data conversion unit for converting an input analog signal into a digital signal;
an encoding unit for encoding the digital signal into a control signal;
a clock unit for outputting a clock signal group including two kinds of clock signals;
a counting unit for generating a count value group including two count values according to the control signal and the clock signal group;
a comparison output unit for generating a duty cycle signal according to the count value group;
the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit.
Further, the MOS tube adopts an NMOS tube;
the grid electrode of the NMOS tube is coupled with the LED driving module;
the source electrode of the NMOS tube is coupled with one end of the regulating resistor in an equipotential manner;
the drain electrode of the NMOS tube is used for being coupled with an LED;
the other end of the regulating resistor is coupled with the IV conversion module.
Further, the LED driving module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first NPN triode, a first PNP triode, a second NPN triode, a second PNP triode, and a third NPN triode;
one end of the first resistor is coupled with the duty ratio adjusting module, and the other end of the first resistor is coupled with the emitter of the first NPN triode and the emitter of the first PNP triode respectively;
one end of the second resistor, the emitter of the second NPN triode, the emitter of the third NPN triode and one end of the sixth resistor are all coupled to the ground, and the other end of the second resistor is coupled to the base electrode of the first NPN triode, the base electrode of the first PNP triode, the collector electrode of the third NPN triode and one end of the third resistor respectively;
the other end of the third resistor is coupled with the emitter of the second PNP triode and is connected with the positive electrode of the power supply;
one end of the fourth resistor is respectively coupled with the collector of the second NPN triode and the collector of the second PNP triode, and the other end of the fourth resistor is respectively coupled with one end of the fifth resistor and the grid electrode of the NMOS tube;
the other end of the fifth resistor is respectively coupled with the base electrode of the third NPN triode and the other end of the sixth resistor;
the collector electrode of the first NPN triode is coupled with the base electrode of the second PNP triode;
the collector of the first PNP triode is coupled with the base of the second NPN triode.
Further, the clock unit comprises a first clock generator and a second clock generator;
the counting unit comprises a first counter and a second counter;
the output end of the first clock generator is coupled with the clock input end of the first counter;
the output end of the second clock generator is coupled with the clock input end of the second counter;
the output end of the first counter is coupled with the first input end of the comparison output unit;
the output end of the second counter is coupled with the second input end of the comparison output unit;
the control end of the second counter is coupled with the coding unit;
the output end of the comparison output unit is used for outputting the duty ratio signal.
Further, the data conversion unit adopts an analog-to-digital converter.
The technical scheme provided by the utility model has at least the following beneficial effects:
the input analog signals are converted into digital signals through the data conversion unit, and the duty ratio signals corresponding to the input analog signals are generated by means of common processing of the coding unit, the clock unit, the counting unit and the comparison output unit, so that the technical scheme of generating the duty ratio signals with a simple structure is realized, the production cost is reduced, and the PCB design is simplified.
Drawings
Fig. 1 is a schematic diagram of a frame structure of a duty cycle adjustment module according to the present utility model;
fig. 2 is a schematic diagram of a specific frame structure of a duty cycle adjustment module according to the present utility model;
FIG. 3 is a schematic diagram of a circuit for adjusting brightness of an LED according to the present utility model;
FIG. 4 is a schematic diagram of an NMOS transistor included in a circuit for adjusting LED brightness according to the present utility model;
fig. 5 is a schematic circuit diagram of an LED driving module according to the present utility model.
Detailed Description
The present utility model will be further described in detail with reference to the drawings and examples, which are only for the purpose of illustrating the utility model and are not to be construed as limiting the scope of the utility model.
Referring to fig. 1, the present utility model provides a duty cycle adjustment module, which includes:
a data conversion unit for converting an input analog signal into a digital signal;
an encoding unit for encoding the digital signal into a control signal;
a clock unit for outputting a clock signal group including two kinds of clock signals;
a counting unit for generating a count value group including two count values according to the control signal and the clock signal group;
a comparison output unit for generating a duty cycle signal according to the count value group;
the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit.
In this embodiment, the duty ratio adjustment module may automatically process an input analog signal and output a duty ratio signal corresponding to the analog signal, so as to control the current of the LED. The data conversion unit can adopt an ADC (analog-to-digital converter), and can also be combined by a corresponding logic device. The encoding unit may be a conventional encoder, the clock unit may be implemented based on a crystal, the counting unit may be a counter, and the comparison output unit may be a digital comparator. The data conversion unit is provided with an analog signal input port and a digital signal output port, the encoding unit is provided with a signal input port and a signal output port, the clock unit is provided with a clock signal output port, the counting unit is provided with a clock signal input port, a counting output port, a control port and an enabling port, and the comparison output unit is provided with a data input port and a comparison signal output port. The analog signal input port of the data conversion unit is used for receiving an external analog signal. The digital signal output port of the data conversion unit is coupled with the signal input port of the encoding unit. The signal output port of the coding unit is coupled with the control port of the counting unit. The clock signal output port of the clock unit and the clock signal input port of the counting unit are respectively provided with two, and the clock signal output port of the clock unit is coupled with the clock signal input port of the counting unit one to one. The counting unit is provided with an enabling port, and the working on and off of the counting unit can be controlled by an enabling signal. The counting output port of the counting unit and the data input port of the comparison output unit are respectively provided with two, and the counting output port of the counting unit and the data input port of the comparison output unit are coupled one to one. The comparison signal output port of the comparison output unit is used for outputting the generated duty ratio signal.
In a specific embodiment, the data conversion unit receives an analog signal through an analog signal input port, converts the analog signal into a digital signal, and transmits the digital signal to a signal input port of the encoding unit through a digital signal output port. The coding unit codes the digital signal to obtain a control signal, and the control signal is transmitted to the control port of the counting unit through the signal output port. The clock unit transmits clock signals to two clock signal input ports of the counting unit through two clock signal output ports respectively. During normal operation, the enabling port of the counting unit receives the enabling signal to start the working mode, the counting unit processes and counts one of the received clock signal groups according to the received control signal, the other clock signal is normally counted, and finally two count values are obtained. The counting unit respectively transmits the two count values to the two data input ports of the comparison output unit through the two count output ports. The comparison output unit compares two count values in the received count value group, generates corresponding duty ratio signals, and transmits the corresponding duty ratio signals outwards through the comparison signal output port.
Further, referring to fig. 2, the clock unit includes a first clock generator and a second clock generator;
the counting unit comprises a first counter and a second counter;
the output end of the first clock generator is coupled with the clock input end of the first counter;
the output end of the second clock generator is coupled with the clock input end of the second counter;
the output end of the first counter is coupled with the first input end of the comparison output unit;
the output end of the second counter is coupled with the second input end of the comparison output unit;
the control end of the second counter is coupled with the coding unit;
the output end of the comparison output unit is used for outputting the duty ratio signal.
In this embodiment, the first clock generator and the second clock generator may be conventional clock generators, for example, the output of the clock signal may be implemented by using a crystal, or other conventional manners may be adopted. The first counter and the second counter here may be conventional counters. The enable signal is received at the enable terminal on the second counter. In specific implementation, the coding unit transmits the control signal to the control end of the second counter through the signal output port. The first clock generator provides a clock signal for the first counter, the first counter performs counting processing, and the corresponding count value is transmitted to the comparison output unit. The second clock generator provides another clock signal to the second counter, the second counter processes the clock signal according to the control signal and counts, and the corresponding count value is transmitted to the comparison output unit. The comparison output unit performs comparison processing on the received two count values, and can finally output a duty ratio signal. Further, the duty cycle adjustment module may further set a timer, where the timer is coupled to the second counter and provides a timing period for the second counter, and the second counter may perform an equal proportion processing on the received clock signal according to the timing period according to the control signal, and generate a value with an equal proportion changing the count value until the second counter outputs a stable count value, and the count value is not changed any more, so as to control the comparison output unit to reduce the duty cycle in equal proportion according to the timing period.
Further, the data conversion unit adopts an analog-to-digital converter.
In this embodiment, the analog-to-digital converter may convert a received analog signal into a digital signal, and the analog-to-digital converter may be understood as an analog-to-digital converter, i.e. an a/D converter, abbreviated as an ADC, and may select a corresponding specification and model according to actual needs when in specific use.
Further, the encoding unit adopts an encoder.
In this embodiment, the encoder may use a conventional device capable of encoding a digital signal into a control signal, and the specific specification and model may be selected according to actual needs.
Further, the comparison output unit adopts a digital comparator.
In this embodiment, the digital comparator may compare the magnitudes of the received two count values, so as to implement the output of the duty cycle signal. By adjusting the respective count values, the respective duty cycle signals may be changed.
Referring to fig. 3, the present application further provides a circuit capable of adjusting LED brightness, including an adjusting resistor R, IV conversion module, a duty cycle adjustment module, an LED driving module, and a MOS tube;
the adjusting resistor R is coupled with the IV conversion module;
the IV conversion module is coupled with the duty ratio adjustment module;
the duty ratio adjustment module is coupled with the LED driving module;
the LED driving module is coupled with the MOS tube;
the duty cycle adjustment module includes:
a data conversion unit for converting an input analog signal into a digital signal;
an encoding unit for encoding the digital signal into a control signal;
a clock unit for outputting a clock signal group including two kinds of clock signals;
a counting unit for generating a count value group including two count values according to the control signal and the clock signal group;
a comparison output unit for generating a duty cycle signal according to the count value group;
the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit.
In this embodiment, the adjusting resistor R may be a common resistor with an adjustable resistance value, and specific model specifications may be selected according to actual needs. The IV conversion module may employ conventional IV conversion circuitry, i.e., conventional circuitry that converts a current signal to a voltage signal, such as: the circuit can be directly realized by using a precise resistor, and can also be realized by an operational amplifier. The LED driving module may employ a conventional LED driving circuit. The MOS tube can be a PMOS tube or an NMOS tube. The LED driving circuit is required to be matched with the type of the MOS tube, namely, the LED driving circuits corresponding to the PMOS tube and the NMOS tube are different. In specific implementation, by adjusting the resistance value of the adjusting resistor R, different analog voltage signals can be provided for the duty ratio adjusting module under the cooperation of the IV converting module. The duty ratio adjustment module generates a duty ratio signal corresponding to a resistance value of the adjustment resistor R based on the analog voltage signal. The LED driving module provides an LED current value corresponding to the resistance value of the adjusting resistor R for the luminous LED under the cooperation of the MOS tube based on the duty ratio signal. Through setting up adjusting resistor R, realized the adjustable of LED output current size, significantly reduced chip outlying components and parts, and satisfied the customer and to the output demand of LED different current value, improved the quality and the competitiveness of product.
Further, referring to fig. 4, the MOS transistor is an NMOS transistor Q;
the grid electrode of the NMOS tube Q is coupled with the LED driving module;
the source electrode of the NMOS tube Q is coupled with one end of the regulating resistor R in an equipotential manner;
the drain electrode of the NMOS tube Q is used for being coupled with an LED;
the other end of the regulating resistor R is coupled with the IV conversion module.
In this embodiment, the LED current output by the LED driving module acts on the gate of the NMOS transistor Q, and the LED current output by the LED driving module can be changed by adjusting the resistance value of the adjusting resistor R, so that the on-off time between the drain and the source of the NMOS transistor Q can be adjusted, thereby realizing control of the LED light-emitting brightness. It should be noted that, in the design of the lighting system, the brightness of the lighting system can be changed at any time according to the actual requirement by setting the adjusting resistor R. And by setting the regulating resistor R, the production management and the stock preparation of customers are also facilitated, and the production cost is reduced. In the implementation, the initial resistance value of the adjusting resistor R may be set to the highest value or may be set to an intermediate value with adjustable upper and lower amplitudes.
Further, referring to fig. 5, the LED driving module includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first NPN triode QN1, a first PNP triode QP1, a second NPN triode QN2, a second PNP triode QP2, and a third NPN triode QN3;
one end of the first resistor R1 is coupled to the duty cycle adjustment module, and the other end of the first resistor R1 is coupled to the emitter of the first NPN triode QN1 and the emitter of the first PNP triode QP1, respectively;
one end of the second resistor R2, the emitter of the second NPN triode QN2, the emitter of the third NPN triode QN3, and one end of the sixth resistor R6 are all coupled to ground, and the other end of the second resistor R2 is coupled to the base of the first NPN triode QN1, the base of the first PNP triode QP1, the collector of the third NPN triode QN3, and one end of the third resistor R3, respectively;
the other end of the third resistor R3 is coupled with the emitter of the second PNP triode QP2 and is connected with the positive electrode VCC of the power supply;
one end of the fourth resistor R4 is coupled to the collector of the second NPN triode QN2 and the collector of the second PNP triode QP2, respectively, and the other end of the fourth resistor R4 is coupled to one end of the fifth resistor R5 and the gate of the NMOS tube Q, respectively;
the other end of the fifth resistor R5 is respectively coupled with the base electrode of the third NPN triode QN3 and the other end of the sixth resistor R6;
the collector of the first NPN triode QN1 is coupled with the base of the second PNP triode QP 2;
the collector of the first PNP transistor QP1 is coupled to the base of the second NPN transistor QN 2.
In this embodiment, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 are all conventional resistors, which may be a single resistor or a combination of multiple resistors, and may be specifically selected according to actual needs. The first NPN triode QN1, the second NPN triode QN2 and the third NPN triode QN3 are all conventional NPN triodes, and specific model specifications can be selected according to actual needs. The first PNP triode QP1 and the second PNP triode QP2 are conventional PNP triodes, and specific model specifications can be selected according to actual needs.
Further, in the circuit capable of adjusting the brightness of the LED, the clock unit comprises a first clock generator and a second clock generator;
the counting unit comprises a first counter and a second counter;
the output end of the first clock generator is coupled with the clock input end of the first counter;
the output end of the second clock generator is coupled with the clock input end of the second counter;
the output end of the first counter is coupled with the first input end of the comparison output unit;
the output end of the second counter is coupled with the second input end of the comparison output unit;
the control end of the second counter is coupled with the coding unit;
the output end of the comparison output unit is used for outputting the duty ratio signal.
Further, in the circuit capable of adjusting the brightness of the LED, the data conversion unit adopts an analog-to-digital converter.
The above embodiments should not limit the present utility model in any way, and all technical solutions obtained by equivalent substitution or equivalent conversion fall within the protection scope of the present utility model.
Claims (7)
1. A duty cycle adjustment module, comprising:
a data conversion unit for converting an input analog signal into a digital signal;
an encoding unit for encoding the digital signal into a control signal;
a clock unit for outputting a clock signal group including two kinds of clock signals;
a counting unit for generating a count value group including two count values according to the control signal and the clock signal group;
a comparison output unit for generating a duty cycle signal according to the count value group;
the data conversion unit is coupled with the coding unit, the coding unit and the clock unit are respectively coupled with the counting unit, and the counting unit is coupled with the comparison output unit;
the clock unit comprises a first clock generator and a second clock generator;
the counting unit comprises a first counter and a second counter;
the output end of the first clock generator is coupled with the clock input end of the first counter;
the output end of the second clock generator is coupled with the clock input end of the second counter;
the output end of the first counter is coupled with the first input end of the comparison output unit;
the output end of the second counter is coupled with the second input end of the comparison output unit;
the control end of the second counter is coupled with the coding unit;
the output end of the comparison output unit is used for outputting the duty ratio signal;
the comparison output unit adopts a digital comparator.
2. The duty cycle adjustment module of claim 1, wherein the data conversion unit employs an analog-to-digital converter.
3. The duty cycle adjustment module of claim 1, wherein the encoding unit employs an encoder.
4. The circuit capable of adjusting the brightness of the LED is characterized by comprising an adjusting resistor, an IV conversion module, the duty ratio adjusting module, the LED driving module and an MOS tube according to claim 1;
the adjusting resistor is coupled with the IV conversion module;
the IV conversion module is coupled with the duty ratio adjustment module;
the duty ratio adjustment module is coupled with the LED driving module;
the LED driving module is coupled with the MOS tube.
5. The circuit of claim 4, wherein the MOS transistor is an NMOS transistor;
the grid electrode of the NMOS tube is coupled with the LED driving module;
the source electrode of the NMOS tube is coupled with one end of the regulating resistor in an equipotential manner;
the drain electrode of the NMOS tube is used for being coupled with an LED;
the other end of the regulating resistor is coupled with the IV conversion module.
6. The circuit of claim 5, wherein the LED driving module comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first NPN transistor, a first PNP transistor, a second NPN transistor, a second PNP transistor, a third NPN transistor;
one end of the first resistor is coupled with the duty ratio adjusting module, and the other end of the first resistor is coupled with the emitter of the first NPN triode and the emitter of the first PNP triode respectively;
one end of the second resistor, the emitter of the second NPN triode, the emitter of the third NPN triode and one end of the sixth resistor are all coupled to the ground, and the other end of the second resistor is coupled to the base electrode of the first NPN triode, the base electrode of the first PNP triode, the collector electrode of the third NPN triode and one end of the third resistor respectively;
the other end of the third resistor is coupled with the emitter of the second PNP triode and is connected with the positive electrode of the power supply;
one end of the fourth resistor is respectively coupled with the collector of the second NPN triode and the collector of the second PNP triode, and the other end of the fourth resistor is respectively coupled with one end of the fifth resistor and the grid electrode of the NMOS tube;
the other end of the fifth resistor is respectively coupled with the base electrode of the third NPN triode and the other end of the sixth resistor;
the collector electrode of the first NPN triode is coupled with the base electrode of the second PNP triode;
the collector of the first PNP triode is coupled with the base of the second NPN triode.
7. The circuit of claim 4, wherein the data conversion unit employs an analog-to-digital converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321541313.9U CN220402000U (en) | 2023-06-16 | 2023-06-16 | Duty ratio adjusting module and circuit capable of adjusting LED brightness |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321541313.9U CN220402000U (en) | 2023-06-16 | 2023-06-16 | Duty ratio adjusting module and circuit capable of adjusting LED brightness |
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| Publication Number | Publication Date |
|---|---|
| CN220402000U true CN220402000U (en) | 2024-01-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202321541313.9U Active CN220402000U (en) | 2023-06-16 | 2023-06-16 | Duty ratio adjusting module and circuit capable of adjusting LED brightness |
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| Country | Link |
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| CN (1) | CN220402000U (en) |
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2023
- 2023-06-16 CN CN202321541313.9U patent/CN220402000U/en active Active
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