CN220359131U - Solid-state pulse power amplifier protection module and device - Google Patents
Solid-state pulse power amplifier protection module and device Download PDFInfo
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- CN220359131U CN220359131U CN202322069280.9U CN202322069280U CN220359131U CN 220359131 U CN220359131 U CN 220359131U CN 202322069280 U CN202322069280 U CN 202322069280U CN 220359131 U CN220359131 U CN 220359131U
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- 239000003990 capacitor Substances 0.000 claims description 49
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- 238000001514 detection method Methods 0.000 claims description 19
- 239000007787 solid Substances 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The utility model discloses a solid-state pulse power amplifier protection module and a device, and relates to the technical field of radio frequency circuits. The utility model can quickly and effectively protect the solid-state pulse power amplifier.
Description
Technical Field
The utility model belongs to the technical field of radio frequency circuits, and particularly relates to a solid-state pulse power amplifier protection module and device.
Background
The solid-state pulse amplifier is the most basic and widely used microwave circuit functional unit in radio frequency and microwave systems, and has been widely used in various fields of radio frequency microwaves. The current trend of the solid-state pulse amplifier is that single pulse is developed to repeat high-frequency switching power pulse, but so far, the safety is reduced in higher power use due to the controllability of output power and the risk of the product, the difficulty is increased in the manufacturing process of the product, and certain solid-state pulse power amplifier devices do not have good protection functions due to the self characteristics of the pulse output power. Therefore, the solid-state pulse amplifier can safely, effectively and controllably output power, and is a very important research topic at home and abroad at present.
In instrument and equipment, the reliability of products is an important index of the solid-state pulse amplifier, but a solid-state pulse power amplifier protection mode with simple circuit, low cost and simple design is also lacking in the prior art.
Disclosure of Invention
The utility model aims to overcome the defects of the prior art, and provides a solid-state pulse power amplifier protection module and a solid-state pulse power amplifier protection device, which are convenient to design, simple in circuit, low in cost, high in reliability, wide in application range and strong in practicability, and can be widely applied to the design and equipment of various solid-state pulse power amplifiers.
The aim of the utility model is realized by the following technical scheme:
a solid state pulse power amplifier protection module comprising: the system comprises an enabling signal output unit, an enabling trigger signal limiting output unit, a pulse excitation source unit and a logic control unit, wherein the enabling signal output unit is connected with the enabling trigger signal limiting output unit, the feedback end of the enabling trigger signal limiting output unit is connected with the signal receiving end of the logic control unit, and the signal output end of the logic control unit is connected with the control signal input end of the switch of the pulse excitation source unit.
Further, the enabling signal output unit comprises a plurality of capacitors, a plurality of resistors and a first operational amplifier, one end of a capacitor C5 is connected with the enabling signal input end of the power amplifier, the other end of the capacitor C5 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with one end of a resistor R7, the other end of the resistor R7 is grounded, one end of a capacitor C4 is connected between the resistor 7 and the resistor R8, and the other end of the capacitor C4 is grounded; the first end of the first operational amplifier is connected with the capacitor C4, the second end of the first operational amplifier is connected with one end of the resistor R10, the other end of the resistor R10 is connected with one end of the resistor R11, and the other end of the resistor R11 is grounded; the second end of the first operational amplifier is also connected with one end of a resistor R12, the other end of the resistor R12 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; the third end of the first operational amplifier is connected with one end of a resistor R9, and the other end of the resistor R9 is used as an enabling signal output end.
Further, the enabling trigger signal limiting output unit comprises a plurality of capacitors, a plurality of resistors and a second operational amplifier, one end of the capacitor C2 is connected, the other end of the capacitor C2 is connected with one end of the resistor R5, the other end of the resistor R5 is connected with one end of the resistor R6, the other end of the resistor R6 is grounded, one end of the resistor R6 is also connected with the second end of the second operational amplifier, one end of the capacitor C3 is connected between the resistor R6 and the second end of the second operational amplifier, and the other end of the capacitor C3 is grounded; the first end of the second operational amplifier is connected with one end of a resistor R3, the other end of the resistor R3 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is grounded; one end of the resistor R2 is connected between the resistor R3 and the first end of the second operational amplifier, the other end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R1 is grounded; the third end of the second operational amplifier is connected with one end of a resistor R4, and the other end of the resistor R4 is used as an enabling trigger signal output end.
Further, the pulse excitation source unit comprises a pulse excitation source unit radio frequency switch, the logic control unit comprises an AND gate and a power supply detection unit, the enabling trigger signal output end is connected with the first end of the AND gate, the enabling signal output end is connected with the second section of the AND gate, the third end of the AND gate is connected with the pulse excitation source unit radio frequency switch, and the power supply detection unit is connected between the first end of the AND gate and the pulse excitation source unit radio frequency switch.
Further, the logic control unit includes, the power supply detection unit includes a voltage detection unit.
Further, the logic control unit includes, the power supply detection unit includes an electric current detection unit.
Further, the method further comprises the step of arranging a first signal limiting unit at the enabling signal output end.
Further, a second signal limiting unit is provided between the enable trigger signal output terminal and the power supply detecting unit.
Further, the enabling signal is an alternating current signal.
An electronic device comprising a solid state pulse power amplifier protection module as claimed in any one of the preceding claims
The beneficial effects of the utility model are as follows:
the utility model has the advantages of convenient realization, simple circuit, low cost, high reliability, wide application range and strong practicability, and can be widely applied to various power amplifiers which need pulse width modulation and over pulse width duty cycle protection.
The utility model utilizes alternating current signals and blocking capacitors to stop the working phenomenon of outputting continuous wave signals caused by the fact that the continuous wave signals are input into power amplifier equipment, adopts a power amplifier enabling control pulse signal double-envelope adding mode to ensure that no condition of outputting signals with larger pulse width and duty ratio occurs when any one control signal is abnormal, achieves the aim of secondary protection, and adds a pulse excitation source into pulse emission envelope signals, so that when the logic errors of the control signals occur, the pulse excitation source can be rapidly turned off to achieve tertiary protection; the power amplifier device is in a non-working state, static power consumption is reduced to the minimum, and therefore average power consumption of the device working is reduced, and risks are reduced.
Drawings
FIG. 1 is a frame diagram of a module of the present utility model;
FIG. 2 is a schematic diagram of an enable signal output unit;
FIG. 3 is a schematic diagram of an enable trigger signal limit output unit;
fig. 4 is a functional block diagram of a pulse excitation source unit and logic control.
Detailed Description
All of the features disclosed in all of the embodiments of this specification, or all of the structures disclosed implicitly, may be combined or substituted in any manner other than by mutually exclusive features.
The technical solution of the present utility model will be described in further detail with reference to the accompanying drawings, but the scope of the present utility model is not limited to the following description. Any feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. That is, each feature is one example only of a generic series of equivalent or similar features, unless expressly stated otherwise.
Before describing the embodiments, some necessary terms need to be explained. For example:
if the terms "first," "second," etc. are used in the present specification to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Accordingly, a "first" element discussed below could also be termed a "second" element without departing from the teachings of the present utility model. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.
The various terms presented in this specification are used solely for the purpose of describing particular embodiments and are not intended to be limiting of the utility model.
When the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence and/or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The detailed embodiments and working principles of the present utility model are described below:
as shown in fig. 1, when the output of the pulse power amplifier is limited by the enable signal and the enable trigger signal and is at a high level, when the enable signal is at a high level all the time, the effective duration of the output signal is at a high level stage of the enable trigger signal due to the limitation of the pulse width of the enable trigger signal, the condition of outputting the signal with larger pulse width and duty ratio will not occur, and similarly, when the enable trigger signal is at a high level all the time, the effective duration of the output signal is at a high level stage of the enable signal due to the limitation of the pulse width of the enable signal, the condition of outputting the signal with larger pulse width and duty ratio will not occur, and the protection effect on signal abnormality is realized.
As shown in fig. 2, C5 is a schematic diagram of the enabling signal output unit circuit, when the enabling signal is an ac signal, the enabling signal passes through normally, when the enabling signal is a dc signal, the enabling signal does not pass through, the output of the op amp is always low, the power amplifier does not output, the R8 resistor has a buffering function on voltage, the R7 and C4 voltage stabilizing filtering function, and one end is grounded, so that ripple signals in the circuit are filtered. And C6 is a power supply filter capacitor, R10 and R11 are connected in series and are divided by R12 to be used as an operational amplifier comparison voltage reference value, when the level of an enabling signal is higher than the reference voltage, a high level is output, otherwise, a low level is output, and the signal is converted into a square wave signal.
As shown in fig. 3, in order to enable the trigger signal to limit the circuit schematic diagram of the output unit, C2 is a blocking capacitor, when the enable signal is an ac signal, the enable signal passes through normally, when the enable trigger signal is a dc signal, the output of the operational amplifier is always low without passing through the enable signal, the power amplifier is not output, the R5 resistor has a buffering function on the voltage, the R6 and C3 voltage stabilizing filtering function, and one end is grounded to filter the ripple signal in the circuit. And C1 is a power supply filter capacitor, R1 and R2 are connected in series and are divided by R3 to be used as an operational amplifier comparison voltage reference value, when the level of an enabling signal is higher than the reference voltage, a high level is output, otherwise, a low level is output, and the signal is converted into a square wave signal.
In fig. 4, for the working schematic block diagram of the pulse excitation source unit and the logic control, the enabling signal and the enabling trigger signal are output through the and gate to control the radio frequency switch, the control module outputs the signal, and meanwhile, the enabling trigger signal is limited, and when the enabling trigger signal is abnormal, the power supply is monitored and fed back to the radio frequency switch for protection.
Example 1
A solid state pulse power amplifier protection module comprising: the system comprises an enabling signal output unit, an enabling trigger signal limiting output unit, a pulse excitation source unit and a logic control unit, wherein the enabling signal output unit is connected with the enabling trigger signal limiting output unit, the feedback end of the enabling trigger signal limiting output unit is connected with the signal receiving end of the logic control unit, and the signal output end of the logic control unit is connected with the control signal input end of the switch of the pulse excitation source unit.
Example 2
On the basis of embodiment 1, the enabling signal output unit comprises a plurality of capacitors, a plurality of resistors and a first operational amplifier, one end of a capacitor C5 is connected with the enabling signal input end of the power amplifier, the other end of the capacitor C5 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with one end of a resistor R7, the other end of the resistor R7 is grounded, one end of a capacitor C4 is connected between the resistor 7 and the resistor R8, and the other end of the capacitor C4 is grounded; the first end of the first operational amplifier is connected with the capacitor C4, the second end of the first operational amplifier is connected with one end of the resistor R10, the other end of the resistor R10 is connected with one end of the resistor R11, and the other end of the resistor R11 is grounded; the second end of the first operational amplifier is also connected with one end of a resistor R12, the other end of the resistor R12 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; the third end of the first operational amplifier is connected with one end of a resistor R9, and the other end of the resistor R9 is used as an enabling signal output end.
Example 3
On the basis of embodiment 1, the enabling trigger signal limiting output unit comprises a plurality of capacitors, a plurality of resistors and a second operational amplifier, one end of the capacitor C2 is connected, the other end of the capacitor C2 is connected with one end of the resistor R5, the other end of the resistor R5 is connected with one end of the resistor R6, the other end of the resistor R6 is grounded, one end of the resistor R6 is also connected with a second end of the second operational amplifier, one end of the capacitor C3 is connected between the resistor R6 and the second end of the second operational amplifier, and the other end of the capacitor C3 is grounded; the first end of the second operational amplifier is connected with one end of a resistor R3, the other end of the resistor R3 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is grounded; one end of the resistor R2 is connected between the resistor R3 and the first end of the second operational amplifier, the other end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R1 is grounded; the third end of the second operational amplifier is connected with one end of a resistor R4, and the other end of the resistor R4 is used as an enabling trigger signal output end.
Example 4
On the basis of embodiment 1, the pulse excitation source unit comprises a pulse excitation source unit radio frequency switch, the logic control unit comprises an and gate and a power supply detection unit, the enabling trigger signal output end is connected with the first end of the and gate, the enabling signal output end is connected with the second section of the and gate, the third end of the and gate is connected with the pulse excitation source unit radio frequency switch, and the power supply detection unit is connected between the first end of the and gate and the pulse excitation source unit radio frequency switch.
Example 5
On the basis of embodiment 4, the logic control unit includes, the power supply detection unit includes a voltage detection unit.
Example 6
On the basis of embodiment 4, the logic control unit includes, the power supply detection unit includes an electric current detection unit.
Example 7
On the basis of embodiment 2, the method further comprises providing a first signal limiting unit at the enable signal output terminal.
Example 8
On the basis of embodiment 4, a second signal limiting unit is provided between the enable trigger signal output terminal and the power supply detecting unit.
Example 9
On the basis of embodiment 1, the enable signal is an ac signal.
Example 10
An electronic device comprising the solid state pulse power amplifier protection module of any one of embodiments 1-9.
The other technical features in the embodiment of the utility model can be flexibly selected by the person skilled in the art according to the actual situation so as to meet different specific actual requirements. However, it will be apparent to one of ordinary skill in the art that: no such specific details are necessary to practice the utility model. In other instances, well-known compositions, structures, or components have not been described in detail so as not to obscure the utility model, and are within the scope of the utility model as defined by the appended claims.
In the description of the utility model, the terms "disposed," "mounted," "connected," and "connected" are used in a broad sense, and should be construed broadly by those skilled in the art, unless explicitly stated or limited otherwise. For example, the present utility model may be fixedly connected, movably connected, integrally connected, or partially connected, mechanically connected, electrically connected, directly connected, indirectly connected through an intermediate medium, or connected between two elements, etc., and it is understood by those skilled in the art that the specific meaning of the terms in the present utility model, i.e., the expression of the word language and the implementation of the actual technology may be flexibly corresponding, and the expression of the word language (including the drawing) in the specification of the present utility model does not constitute any single limiting interpretation of the claims.
The foregoing is merely a preferred embodiment of the utility model, and it is to be understood that the utility model is not limited to the form disclosed herein but is not to be construed as excluding other embodiments, but is capable of numerous other combinations, modifications and environments and is capable of modifications within the scope of the inventive concept, either as taught or as a matter of routine skill or knowledge in the relevant art. And that modifications and variations which do not depart from the spirit and scope of the utility model are intended to be within the scope of the appended claims.
Claims (10)
1. A solid state pulse power amplifier protection module comprising: the system comprises an enabling signal output unit, an enabling trigger signal limiting output unit, a pulse excitation source unit and a logic control unit, wherein the enabling signal output unit is connected with the enabling trigger signal limiting output unit, the feedback end of the enabling trigger signal limiting output unit is connected with the signal receiving end of the logic control unit, and the signal output end of the logic control unit is connected with the control signal input end of the switch of the pulse excitation source unit.
2. The solid-state pulse power amplifier protection module according to claim 1, wherein the enable signal output unit comprises a plurality of capacitors, a plurality of resistors and a first operational amplifier, one end of a capacitor C5 is connected with the power amplifier enable signal input end, the other end of the capacitor C5 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with one end of a resistor R7, the other end of the resistor R7 is grounded, one end of a capacitor C4 is connected between the resistor 7 and the resistor R8, and the other end of the capacitor C4 is grounded; the first end of the first operational amplifier is connected with the capacitor C4, the second end of the first operational amplifier is connected with one end of the resistor R10, the other end of the resistor R10 is connected with one end of the resistor R11, and the other end of the resistor R11 is grounded; the second end of the first operational amplifier is also connected with one end of a resistor R12, the other end of the resistor R12 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; the third end of the first operational amplifier is connected with one end of a resistor R9, and the other end of the resistor R9 is used as an enabling signal output end.
3. The solid-state pulse power amplifier protection module according to claim 1, wherein the enabling trigger signal limiting output unit comprises a plurality of capacitors, a plurality of resistors and a second operational amplifier, one end of the capacitor C2 is connected, the other end of the capacitor C2 is connected with one end of the resistor R5, the other end of the resistor R5 is connected with one end of the resistor R6, the other end of the resistor R6 is grounded, one end of the resistor R6 is also connected with a second end of the second operational amplifier, one end of the capacitor C3 is connected between the resistor R6 and the second end of the second operational amplifier, and the other end of the capacitor C3 is grounded; the first end of the second operational amplifier is connected with one end of a resistor R3, the other end of the resistor R3 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is grounded; one end of the resistor R2 is connected between the resistor R3 and the first end of the second operational amplifier, the other end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R1 is grounded; the third end of the second operational amplifier is connected with one end of a resistor R4, and the other end of the resistor R4 is used as an enabling trigger signal output end.
4. The solid-state pulse power amplifier protection module of claim 1, wherein the pulse excitation source unit comprises a pulse excitation source unit radio frequency switch, the logic control unit comprises an and gate and a power detection unit, the enable trigger signal output end is connected with a first end of the and gate, the enable signal output end is connected with a second section of the and gate, a third end of the and gate is connected with the pulse excitation source unit radio frequency switch, and the power detection unit is connected between the first end of the and gate and the pulse excitation source unit radio frequency switch.
5. The solid state pulse power amplifier protection module of claim 4, wherein the logic control unit comprises, the power supply detection unit comprises a voltage detection unit.
6. The solid state pulse power amplifier protection module of claim 4, wherein the logic control unit comprises, the power supply detection unit comprises an electrical current detection unit.
7. The solid state pulse power amplifier protection module of claim 2, further comprising a first signal limiting unit disposed at the enable signal output.
8. The solid state pulse power amplifier protection module of claim 4, wherein a second signal limiting unit is provided between the enable trigger signal output and the power supply detection unit.
9. The solid state pulse power amplifier protection module of claim 1, wherein the enable signal is an ac signal.
10. An electronic device comprising a solid state pulse power amplifier protection module as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322069280.9U CN220359131U (en) | 2023-08-03 | 2023-08-03 | Solid-state pulse power amplifier protection module and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322069280.9U CN220359131U (en) | 2023-08-03 | 2023-08-03 | Solid-state pulse power amplifier protection module and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220359131U true CN220359131U (en) | 2024-01-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322069280.9U Active CN220359131U (en) | 2023-08-03 | 2023-08-03 | Solid-state pulse power amplifier protection module and device |
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| CN (1) | CN220359131U (en) |
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2023
- 2023-08-03 CN CN202322069280.9U patent/CN220359131U/en active Active
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